usb: typec: wcove: start using tcpm for USB PD support
This patch makes the driver work with USB Type-C Port Manager (tcpm.c) to provide USB PD functionality. Signed-off-by: Heikki Krogerus <heikki.krogerus@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Heikki Krogerus
Greg Kroah-Hartman
parent
598b98f24a
commit
3c4fb9f169
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@ -16,8 +16,6 @@ if TYPEC_TCPM
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source "drivers/usb/typec/fusb302/Kconfig"
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endif
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config TYPEC_WCOVE
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tristate "Intel WhiskeyCove PMIC USB Type-C PHY driver"
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depends on ACPI
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@ -33,6 +31,8 @@ config TYPEC_WCOVE
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To compile this driver as module, choose M here: the module will be
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called typec_wcove
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endif
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source "drivers/usb/typec/ucsi/Kconfig"
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endmenu
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@ -11,14 +11,13 @@
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#include <linux/acpi.h>
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#include <linux/module.h>
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#include <linux/usb/tcpm.h>
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#include <linux/interrupt.h>
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#include <linux/usb/typec.h>
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#include <linux/platform_device.h>
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#include <linux/mfd/intel_soc_pmic.h>
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/* Register offsets */
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#define WCOVE_CHGRIRQ0 0x4e09
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#define WCOVE_PHYCTRL 0x5e07
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#define USBC_CONTROL1 0x7001
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#define USBC_CONTROL2 0x7002
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@ -28,22 +27,57 @@
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#define USBC_STATUS1 0x7007
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#define USBC_STATUS2 0x7008
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#define USBC_STATUS3 0x7009
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#define USBC_CC1 0x700a
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#define USBC_CC2 0x700b
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#define USBC_CC1_STATUS 0x700c
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#define USBC_CC2_STATUS 0x700d
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#define USBC_IRQ1 0x7015
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#define USBC_IRQ2 0x7016
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#define USBC_IRQMASK1 0x7017
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#define USBC_IRQMASK2 0x7018
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#define USBC_PDCFG2 0x701a
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#define USBC_PDCFG3 0x701b
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#define USBC_PDSTATUS 0x701c
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#define USBC_RXSTATUS 0x701d
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#define USBC_RXINFO 0x701e
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#define USBC_TXCMD 0x701f
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#define USBC_TXINFO 0x7020
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#define USBC_RX_DATA 0x7028
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#define USBC_TX_DATA 0x7047
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/* Register bits */
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#define USBC_CONTROL1_MODE_DRP(r) (((r) & ~0x7) | 4)
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#define USBC_CONTROL1_MODE_MASK 0x3
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#define USBC_CONTROL1_MODE_SNK 0
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#define USBC_CONTROL1_MODE_SNKACC 1
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#define USBC_CONTROL1_MODE_SRC 2
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#define USBC_CONTROL1_MODE_SRCACC 3
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#define USBC_CONTROL1_MODE_DRP 4
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#define USBC_CONTROL1_MODE_DRPACC 5
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#define USBC_CONTROL1_MODE_TEST 7
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#define USBC_CONTROL1_CURSRC_MASK 0xc
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#define USBC_CONTROL1_CURSRC_UA_0 (0 << 3)
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#define USBC_CONTROL1_CURSRC_UA_80 (1 << 3)
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#define USBC_CONTROL1_CURSRC_UA_180 (2 << 3)
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#define USBC_CONTROL1_CURSRC_UA_330 (3 << 3)
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#define USBC_CONTROL1_DRPTOGGLE_RANDOM 0xe0
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#define USBC_CONTROL2_UNATT_SNK BIT(0)
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#define USBC_CONTROL2_UNATT_SRC BIT(1)
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#define USBC_CONTROL2_DIS_ST BIT(2)
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#define USBC_CONTROL3_DET_DIS BIT(0)
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#define USBC_CONTROL3_PD_DIS BIT(1)
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#define USBC_CONTROL3_RESETPHY BIT(2)
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#define USBC_CC_CTRL_PU_EN BIT(0)
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#define USBC_CC_CTRL_VCONN_EN BIT(1)
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#define USBC_CC_CTRL_TX_EN BIT(2)
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#define USBC_CC_CTRL_PD_EN BIT(3)
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#define USBC_CC_CTRL_CDET_EN BIT(4)
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#define USBC_CC_CTRL_RDET_EN BIT(5)
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#define USBC_CC_CTRL_ADC_EN BIT(6)
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#define USBC_CC_CTRL_VBUSOK BIT(7)
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#define USBC_STATUS1_DET_ONGOING BIT(6)
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#define USBC_STATUS1_RSLT(r) ((r) & 0xf)
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@ -61,6 +95,15 @@
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#define USBC_STATUS2_VBUS_REQ BIT(5)
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#define UCSC_CC_STATUS_SNK_RP BIT(0)
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#define UCSC_CC_STATUS_PWRDEFSNK BIT(1)
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#define UCSC_CC_STATUS_PWR_1P5A_SNK BIT(2)
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#define UCSC_CC_STATUS_PWR_3A_SNK BIT(3)
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#define UCSC_CC_STATUS_SRC_RP BIT(4)
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#define UCSC_CC_STATUS_RX(r) (((r) >> 5) & 0x3)
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#define USBC_CC_STATUS_RD 1
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#define USBC_CC_STATUS_RA 2
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#define USBC_IRQ1_ADCDONE1 BIT(2)
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#define USBC_IRQ1_OVERTEMP BIT(1)
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#define USBC_IRQ1_SHORT BIT(0)
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@ -79,15 +122,44 @@
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USBC_IRQ2_RX_HR | USBC_IRQ2_RX_CR | \
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USBC_IRQ2_TX_SUCCESS | USBC_IRQ2_TX_FAIL)
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#define USBC_PDCFG2_SOP BIT(0)
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#define USBC_PDCFG2_SOP_P BIT(1)
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#define USBC_PDCFG2_SOP_PP BIT(2)
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#define USBC_PDCFG2_SOP_P_DEBUG BIT(3)
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#define USBC_PDCFG2_SOP_PP_DEBUG BIT(4)
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#define USBC_PDCFG3_DATAROLE_SHIFT 1
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#define USBC_PDCFG3_SOP_SHIFT 2
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#define USBC_RXSTATUS_RXCLEAR BIT(0)
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#define USBC_RXSTATUS_RXDATA BIT(7)
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#define USBC_RXINFO_RXBYTES(i) (((i) >> 3) & 0x1f)
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#define USBC_TXCMD_BUF_RDY BIT(0)
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#define USBC_TXCMD_START BIT(1)
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#define USBC_TXCMD_NOP (0 << 5)
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#define USBC_TXCMD_MSG (1 << 5)
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#define USBC_TXCMD_CR (2 << 5)
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#define USBC_TXCMD_HR (3 << 5)
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#define USBC_TXCMD_BIST (4 << 5)
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#define USBC_TXINFO_RETRIES(d) (d << 3)
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struct wcove_typec {
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struct mutex lock; /* device lock */
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struct device *dev;
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struct regmap *regmap;
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struct typec_port *port;
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struct typec_capability cap;
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struct typec_partner *partner;
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guid_t guid;
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bool vbus;
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struct tcpc_dev tcpc;
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struct tcpm_port *tcpm;
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};
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#define tcpc_to_wcove(_tcpc_) container_of(_tcpc_, struct wcove_typec, tcpc)
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enum wcove_typec_func {
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WCOVE_FUNC_DRIVE_VBUS = 1,
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WCOVE_FUNC_ORIENTATION,
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@ -105,8 +177,7 @@ enum wcove_typec_role {
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WCOVE_ROLE_DEVICE,
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};
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static guid_t guid = GUID_INIT(0x482383f0, 0x2876, 0x4e49,
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0x86, 0x85, 0xdb, 0x66, 0x21, 0x1a, 0xf0, 0x37);
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#define WCOVE_DSM_UUID "482383f0-2876-4e49-8685-db66211af037"
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static int wcove_typec_func(struct wcove_typec *wcove,
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enum wcove_typec_func func, int param)
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@ -118,7 +189,7 @@ static int wcove_typec_func(struct wcove_typec *wcove,
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tmp.type = ACPI_TYPE_INTEGER;
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tmp.integer.value = param;
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obj = acpi_evaluate_dsm(ACPI_HANDLE(wcove->dev), &guid, 1, func,
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obj = acpi_evaluate_dsm(ACPI_HANDLE(wcove->dev), &wcove->guid, 1, func,
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&argv4);
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if (!obj) {
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dev_err(wcove->dev, "%s: failed to evaluate _DSM\n", __func__);
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@ -129,158 +200,349 @@ static int wcove_typec_func(struct wcove_typec *wcove,
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return 0;
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}
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static int wcove_init(struct tcpc_dev *tcpc)
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{
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struct wcove_typec *wcove = tcpc_to_wcove(tcpc);
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int ret;
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/* Unmask everything */
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ret = regmap_write(wcove->regmap, USBC_IRQMASK1, 0);
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if (ret)
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return ret;
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return regmap_write(wcove->regmap, USBC_IRQMASK2, 0);
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}
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static int wcove_get_vbus(struct tcpc_dev *tcpc)
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{
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struct wcove_typec *wcove = tcpc_to_wcove(tcpc);
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unsigned int cc1ctrl;
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int ret;
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ret = regmap_read(wcove->regmap, USBC_CC1_CTRL, &cc1ctrl);
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if (ret)
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return ret;
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wcove->vbus = !!(cc1ctrl & USBC_CC_CTRL_VBUSOK);
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return wcove->vbus;
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}
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static int wcove_set_vbus(struct tcpc_dev *tcpc, bool on, bool sink)
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{
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struct wcove_typec *wcove = tcpc_to_wcove(tcpc);
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return wcove_typec_func(wcove, WCOVE_FUNC_DRIVE_VBUS, on);
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}
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static int wcove_set_vconn(struct tcpc_dev *tcpc, bool on)
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{
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struct wcove_typec *wcove = tcpc_to_wcove(tcpc);
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return wcove_typec_func(wcove, WCOVE_FUNC_DRIVE_VCONN, on);
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}
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static enum typec_cc_status wcove_to_typec_cc(unsigned int cc)
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{
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if (cc & UCSC_CC_STATUS_SNK_RP) {
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if (cc & UCSC_CC_STATUS_PWRDEFSNK)
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return TYPEC_CC_RP_DEF;
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else if (cc & UCSC_CC_STATUS_PWR_1P5A_SNK)
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return TYPEC_CC_RP_1_5;
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else if (cc & UCSC_CC_STATUS_PWR_3A_SNK)
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return TYPEC_CC_RP_3_0;
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} else {
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switch (UCSC_CC_STATUS_RX(cc)) {
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case USBC_CC_STATUS_RD:
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return TYPEC_CC_RD;
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case USBC_CC_STATUS_RA:
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return TYPEC_CC_RA;
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default:
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break;
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}
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}
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return TYPEC_CC_OPEN;
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}
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static int wcove_get_cc(struct tcpc_dev *tcpc, enum typec_cc_status *cc1,
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enum typec_cc_status *cc2)
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{
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struct wcove_typec *wcove = tcpc_to_wcove(tcpc);
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unsigned int cc1_status;
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unsigned int cc2_status;
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int ret;
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ret = regmap_read(wcove->regmap, USBC_CC1_STATUS, &cc1_status);
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if (ret)
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return ret;
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ret = regmap_read(wcove->regmap, USBC_CC2_STATUS, &cc2_status);
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if (ret)
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return ret;
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*cc1 = wcove_to_typec_cc(cc1_status);
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*cc2 = wcove_to_typec_cc(cc2_status);
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return 0;
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}
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static int wcove_set_cc(struct tcpc_dev *tcpc, enum typec_cc_status cc)
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{
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/* XXX: Relying on the HW FSM to configure things correctly for now */
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return 0;
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}
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static int wcove_set_polarity(struct tcpc_dev *tcpc, enum typec_cc_polarity pol)
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{
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struct wcove_typec *wcove = tcpc_to_wcove(tcpc);
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return wcove_typec_func(wcove, WCOVE_FUNC_ORIENTATION, pol);
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}
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static int wcove_set_current_limit(struct tcpc_dev *tcpc, u32 max_ma, u32 mv)
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{
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return 0;
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}
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static int wcove_set_roles(struct tcpc_dev *tcpc, bool attached,
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enum typec_role role, enum typec_data_role data)
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{
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struct wcove_typec *wcove = tcpc_to_wcove(tcpc);
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unsigned int val;
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int ret;
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ret = wcove_typec_func(wcove, WCOVE_FUNC_ROLE, data == TYPEC_HOST ?
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WCOVE_ROLE_HOST : WCOVE_ROLE_DEVICE);
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if (ret)
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return ret;
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val = role;
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val |= data << USBC_PDCFG3_DATAROLE_SHIFT;
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val |= PD_REV20 << USBC_PDCFG3_SOP_SHIFT;
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return regmap_write(wcove->regmap, USBC_PDCFG3, val);
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}
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static int wcove_set_pd_rx(struct tcpc_dev *tcpc, bool on)
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{
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struct wcove_typec *wcove = tcpc_to_wcove(tcpc);
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return regmap_write(wcove->regmap, USBC_PDCFG2,
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on ? USBC_PDCFG2_SOP : 0);
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}
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static int wcove_pd_transmit(struct tcpc_dev *tcpc,
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enum tcpm_transmit_type type,
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const struct pd_message *msg)
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{
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struct wcove_typec *wcove = tcpc_to_wcove(tcpc);
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unsigned int info = 0;
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unsigned int cmd;
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int ret;
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ret = regmap_read(wcove->regmap, USBC_TXCMD, &cmd);
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if (ret)
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return ret;
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if (!(cmd & USBC_TXCMD_BUF_RDY)) {
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dev_warn(wcove->dev, "%s: Last transmission still ongoing!",
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__func__);
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return -EBUSY;
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}
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if (msg) {
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const u8 *data = (void *)msg;
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int i;
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for (i = 0; i < pd_header_cnt(msg->header) * 4 + 2; i++) {
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ret = regmap_write(wcove->regmap, USBC_TX_DATA + i,
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data[i]);
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if (ret)
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return ret;
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}
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}
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switch (type) {
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case TCPC_TX_SOP:
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case TCPC_TX_SOP_PRIME:
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case TCPC_TX_SOP_PRIME_PRIME:
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case TCPC_TX_SOP_DEBUG_PRIME:
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case TCPC_TX_SOP_DEBUG_PRIME_PRIME:
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info = type + 1;
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cmd = USBC_TXCMD_MSG;
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break;
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case TCPC_TX_HARD_RESET:
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cmd = USBC_TXCMD_HR;
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break;
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case TCPC_TX_CABLE_RESET:
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cmd = USBC_TXCMD_CR;
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break;
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case TCPC_TX_BIST_MODE_2:
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cmd = USBC_TXCMD_BIST;
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break;
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default:
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return -EINVAL;
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}
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/* NOTE Setting maximum number of retries (7) */
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ret = regmap_write(wcove->regmap, USBC_TXINFO,
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info | USBC_TXINFO_RETRIES(7));
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if (ret)
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return ret;
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return regmap_write(wcove->regmap, USBC_TXCMD, cmd | USBC_TXCMD_START);
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}
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static int wcove_start_drp_toggling(struct tcpc_dev *tcpc,
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enum typec_cc_status cc)
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{
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struct wcove_typec *wcove = tcpc_to_wcove(tcpc);
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unsigned int usbc_ctrl;
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usbc_ctrl = USBC_CONTROL1_MODE_DRP | USBC_CONTROL1_DRPTOGGLE_RANDOM;
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switch (cc) {
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case TYPEC_CC_RP_1_5:
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usbc_ctrl |= USBC_CONTROL1_CURSRC_UA_180;
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break;
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case TYPEC_CC_RP_3_0:
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usbc_ctrl |= USBC_CONTROL1_CURSRC_UA_330;
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break;
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default:
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usbc_ctrl |= USBC_CONTROL1_CURSRC_UA_80;
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break;
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}
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return regmap_write(wcove->regmap, USBC_CONTROL1, usbc_ctrl);
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}
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static int wcove_read_rx_buffer(struct wcove_typec *wcove, void *msg)
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{
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unsigned int info;
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int ret;
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int i;
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ret = regmap_read(wcove->regmap, USBC_RXINFO, &info);
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if (ret)
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return ret;
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/* FIXME: Check that USBC_RXINFO_RXBYTES(info) matches the header */
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for (i = 0; i < USBC_RXINFO_RXBYTES(info); i++) {
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ret = regmap_read(wcove->regmap, USBC_RX_DATA + i, msg + i);
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if (ret)
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return ret;
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}
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return regmap_write(wcove->regmap, USBC_RXSTATUS,
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USBC_RXSTATUS_RXCLEAR);
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}
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static irqreturn_t wcove_typec_irq(int irq, void *data)
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{
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enum typec_role role = TYPEC_SINK;
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struct typec_partner_desc partner;
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struct wcove_typec *wcove = data;
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unsigned int cc1_ctrl;
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unsigned int cc2_ctrl;
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unsigned int cc_irq1;
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unsigned int cc_irq2;
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unsigned int status1;
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unsigned int status2;
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unsigned int usbc_irq1;
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unsigned int usbc_irq2;
|
||||
unsigned int cc1ctrl;
|
||||
int ret;
|
||||
|
||||
mutex_lock(&wcove->lock);
|
||||
|
||||
ret = regmap_read(wcove->regmap, USBC_IRQ1, &cc_irq1);
|
||||
/* Read.. */
|
||||
ret = regmap_read(wcove->regmap, USBC_IRQ1, &usbc_irq1);
|
||||
if (ret)
|
||||
goto err;
|
||||
|
||||
ret = regmap_read(wcove->regmap, USBC_IRQ2, &cc_irq2);
|
||||
ret = regmap_read(wcove->regmap, USBC_IRQ2, &usbc_irq2);
|
||||
if (ret)
|
||||
goto err;
|
||||
|
||||
ret = regmap_read(wcove->regmap, USBC_STATUS1, &status1);
|
||||
ret = regmap_read(wcove->regmap, USBC_CC1_CTRL, &cc1ctrl);
|
||||
if (ret)
|
||||
goto err;
|
||||
|
||||
ret = regmap_read(wcove->regmap, USBC_STATUS2, &status2);
|
||||
if (ret)
|
||||
if (!wcove->tcpm)
|
||||
goto err;
|
||||
|
||||
ret = regmap_read(wcove->regmap, USBC_CC1_CTRL, &cc1_ctrl);
|
||||
if (ret)
|
||||
goto err;
|
||||
|
||||
ret = regmap_read(wcove->regmap, USBC_CC2_CTRL, &cc2_ctrl);
|
||||
if (ret)
|
||||
goto err;
|
||||
|
||||
if (cc_irq1) {
|
||||
if (cc_irq1 & USBC_IRQ1_OVERTEMP)
|
||||
/* ..check.. */
|
||||
if (usbc_irq1 & USBC_IRQ1_OVERTEMP) {
|
||||
dev_err(wcove->dev, "VCONN Switch Over Temperature!\n");
|
||||
if (cc_irq1 & USBC_IRQ1_SHORT)
|
||||
dev_err(wcove->dev, "VCONN Switch Short Circuit!\n");
|
||||
ret = regmap_write(wcove->regmap, USBC_IRQ1, cc_irq1);
|
||||
if (ret)
|
||||
goto err;
|
||||
}
|
||||
|
||||
if (cc_irq2) {
|
||||
ret = regmap_write(wcove->regmap, USBC_IRQ2, cc_irq2);
|
||||
if (ret)
|
||||
goto err;
|
||||
/*
|
||||
* Ignoring any PD communication interrupts until the PD support
|
||||
* is available
|
||||
*/
|
||||
if (cc_irq2 & ~USBC_IRQ2_CC_CHANGE) {
|
||||
dev_WARN(wcove->dev, "USB PD handling missing\n");
|
||||
goto err;
|
||||
}
|
||||
}
|
||||
|
||||
if (status1 & USBC_STATUS1_DET_ONGOING)
|
||||
goto out;
|
||||
|
||||
if (USBC_STATUS1_RSLT(status1) == USBC_RSLT_NOTHING) {
|
||||
if (wcove->partner) {
|
||||
typec_unregister_partner(wcove->partner);
|
||||
wcove->partner = NULL;
|
||||
}
|
||||
|
||||
wcove_typec_func(wcove, WCOVE_FUNC_ORIENTATION,
|
||||
WCOVE_ORIENTATION_NORMAL);
|
||||
|
||||
/* This makes sure the device controller is disconnected */
|
||||
wcove_typec_func(wcove, WCOVE_FUNC_ROLE, WCOVE_ROLE_HOST);
|
||||
|
||||
/* Port to default role */
|
||||
typec_set_data_role(wcove->port, TYPEC_DEVICE);
|
||||
typec_set_pwr_role(wcove->port, TYPEC_SINK);
|
||||
typec_set_pwr_opmode(wcove->port, TYPEC_PWR_MODE_USB);
|
||||
|
||||
goto out;
|
||||
}
|
||||
|
||||
if (wcove->partner)
|
||||
goto out;
|
||||
|
||||
switch (USBC_STATUS1_ORIENT(status1)) {
|
||||
case USBC_ORIENT_NORMAL:
|
||||
wcove_typec_func(wcove, WCOVE_FUNC_ORIENTATION,
|
||||
WCOVE_ORIENTATION_NORMAL);
|
||||
break;
|
||||
case USBC_ORIENT_REVERSE:
|
||||
wcove_typec_func(wcove, WCOVE_FUNC_ORIENTATION,
|
||||
WCOVE_ORIENTATION_REVERSE);
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
memset(&partner, 0, sizeof(partner));
|
||||
|
||||
switch (USBC_STATUS1_RSLT(status1)) {
|
||||
case USBC_RSLT_SRC_DEFAULT:
|
||||
typec_set_pwr_opmode(wcove->port, TYPEC_PWR_MODE_USB);
|
||||
break;
|
||||
case USBC_RSLT_SRC_1_5A:
|
||||
typec_set_pwr_opmode(wcove->port, TYPEC_PWR_MODE_1_5A);
|
||||
break;
|
||||
case USBC_RSLT_SRC_3_0A:
|
||||
typec_set_pwr_opmode(wcove->port, TYPEC_PWR_MODE_3_0A);
|
||||
break;
|
||||
case USBC_RSLT_SNK:
|
||||
role = TYPEC_SOURCE;
|
||||
break;
|
||||
case USBC_RSLT_DEBUG_ACC:
|
||||
partner.accessory = TYPEC_ACCESSORY_DEBUG;
|
||||
break;
|
||||
case USBC_RSLT_AUDIO_ACC:
|
||||
partner.accessory = TYPEC_ACCESSORY_AUDIO;
|
||||
break;
|
||||
default:
|
||||
dev_WARN(wcove->dev, "%s Undefined result\n", __func__);
|
||||
goto err;
|
||||
}
|
||||
|
||||
if (role == TYPEC_SINK) {
|
||||
wcove_typec_func(wcove, WCOVE_FUNC_ROLE, WCOVE_ROLE_DEVICE);
|
||||
typec_set_data_role(wcove->port, TYPEC_DEVICE);
|
||||
typec_set_pwr_role(wcove->port, TYPEC_SINK);
|
||||
} else {
|
||||
wcove_typec_func(wcove, WCOVE_FUNC_ROLE, WCOVE_ROLE_HOST);
|
||||
typec_set_pwr_role(wcove->port, TYPEC_SOURCE);
|
||||
typec_set_data_role(wcove->port, TYPEC_HOST);
|
||||
}
|
||||
|
||||
wcove->partner = typec_register_partner(wcove->port, &partner);
|
||||
if (!wcove->partner)
|
||||
dev_err(wcove->dev, "failed register partner\n");
|
||||
out:
|
||||
/* If either CC pins is requesting VCONN, we turn it on */
|
||||
if ((cc1_ctrl & USBC_CC_CTRL_VCONN_EN) ||
|
||||
(cc2_ctrl & USBC_CC_CTRL_VCONN_EN))
|
||||
wcove_typec_func(wcove, WCOVE_FUNC_DRIVE_VCONN, true);
|
||||
else
|
||||
wcove_typec_func(wcove, WCOVE_FUNC_DRIVE_VCONN, false);
|
||||
/* REVISIT: Report an error? */
|
||||
}
|
||||
|
||||
if (usbc_irq1 & USBC_IRQ1_SHORT) {
|
||||
dev_err(wcove->dev, "VCONN Switch Short Circuit!\n");
|
||||
wcove_typec_func(wcove, WCOVE_FUNC_DRIVE_VCONN, false);
|
||||
/* REVISIT: Report an error? */
|
||||
}
|
||||
|
||||
if (wcove->vbus != !!(cc1ctrl & USBC_CC_CTRL_VBUSOK))
|
||||
tcpm_vbus_change(wcove->tcpm);
|
||||
|
||||
/* REVISIT: See if tcpm code can be made to consider Type-C HW FSMs */
|
||||
if (usbc_irq2 & USBC_IRQ2_CC_CHANGE)
|
||||
tcpm_cc_change(wcove->tcpm);
|
||||
|
||||
if (usbc_irq2 & USBC_IRQ2_RX_PD) {
|
||||
unsigned int status;
|
||||
|
||||
/*
|
||||
* FIXME: Need to check if TX is ongoing and report
|
||||
* TX_DIREGARDED if needed?
|
||||
*/
|
||||
|
||||
ret = regmap_read(wcove->regmap, USBC_RXSTATUS, &status);
|
||||
if (ret)
|
||||
goto err;
|
||||
|
||||
/* Flush all buffers */
|
||||
while (status & USBC_RXSTATUS_RXDATA) {
|
||||
struct pd_message msg;
|
||||
|
||||
ret = wcove_read_rx_buffer(wcove, &msg);
|
||||
if (ret) {
|
||||
dev_err(wcove->dev, "%s: RX read failed\n",
|
||||
__func__);
|
||||
goto err;
|
||||
}
|
||||
|
||||
tcpm_pd_receive(wcove->tcpm, &msg);
|
||||
|
||||
ret = regmap_read(wcove->regmap, USBC_RXSTATUS,
|
||||
&status);
|
||||
if (ret)
|
||||
goto err;
|
||||
}
|
||||
}
|
||||
|
||||
if (usbc_irq2 & USBC_IRQ2_RX_HR)
|
||||
tcpm_pd_hard_reset(wcove->tcpm);
|
||||
|
||||
/* REVISIT: if (usbc_irq2 & USBC_IRQ2_RX_CR) */
|
||||
|
||||
if (usbc_irq2 & USBC_IRQ2_TX_SUCCESS)
|
||||
tcpm_pd_transmit_complete(wcove->tcpm, TCPC_TX_SUCCESS);
|
||||
|
||||
if (usbc_irq2 & USBC_IRQ2_TX_FAIL)
|
||||
tcpm_pd_transmit_complete(wcove->tcpm, TCPC_TX_FAILED);
|
||||
|
||||
/* Relying on the FSM to know when we need to drive VBUS. */
|
||||
wcove_typec_func(wcove, WCOVE_FUNC_DRIVE_VBUS,
|
||||
!!(status2 & USBC_STATUS2_VBUS_REQ));
|
||||
err:
|
||||
/* ..and clear. */
|
||||
if (usbc_irq1) {
|
||||
ret = regmap_write(wcove->regmap, USBC_IRQ1, usbc_irq1);
|
||||
if (ret)
|
||||
dev_WARN(wcove->dev, "%s failed to clear IRQ1\n",
|
||||
__func__);
|
||||
}
|
||||
|
||||
if (usbc_irq2) {
|
||||
ret = regmap_write(wcove->regmap, USBC_IRQ2, usbc_irq2);
|
||||
if (ret)
|
||||
dev_WARN(wcove->dev, "%s failed to clear IRQ2\n",
|
||||
__func__);
|
||||
}
|
||||
|
||||
/* REVISIT: Clear WhiskeyCove CHGR Type-C interrupt */
|
||||
regmap_write(wcove->regmap, WCOVE_CHGRIRQ0, BIT(5));
|
||||
|
||||
|
|
@ -288,11 +550,41 @@ err:
|
|||
return IRQ_HANDLED;
|
||||
}
|
||||
|
||||
/*
|
||||
* The following power levels should be safe to use with Joule board.
|
||||
*/
|
||||
static const u32 src_pdo[] = {
|
||||
PDO_FIXED(5000, 1500, PDO_FIXED_DUAL_ROLE | PDO_FIXED_DATA_SWAP |
|
||||
PDO_FIXED_USB_COMM),
|
||||
};
|
||||
|
||||
static const u32 snk_pdo[] = {
|
||||
PDO_FIXED(12000, 3000, PDO_FIXED_DUAL_ROLE | PDO_FIXED_DATA_SWAP |
|
||||
PDO_FIXED_USB_COMM),
|
||||
PDO_BATT(4750, 12000, 15000),
|
||||
PDO_VAR(4750, 12000, 3000),
|
||||
};
|
||||
|
||||
static struct tcpc_config wcove_typec_config = {
|
||||
.src_pdo = src_pdo,
|
||||
.nr_src_pdo = ARRAY_SIZE(src_pdo),
|
||||
.snk_pdo = snk_pdo,
|
||||
.nr_snk_pdo = ARRAY_SIZE(snk_pdo),
|
||||
|
||||
.max_snk_mv = 12000,
|
||||
.max_snk_ma = 3000,
|
||||
.max_snk_mw = 36000,
|
||||
.operating_snk_mw = 15000,
|
||||
|
||||
.type = TYPEC_PORT_DRP,
|
||||
.default_role = TYPEC_SINK,
|
||||
};
|
||||
|
||||
static int wcove_typec_probe(struct platform_device *pdev)
|
||||
{
|
||||
struct intel_soc_pmic *pmic = dev_get_drvdata(pdev->dev.parent);
|
||||
struct wcove_typec *wcove;
|
||||
unsigned int val;
|
||||
int irq;
|
||||
int ret;
|
||||
|
||||
wcove = devm_kzalloc(&pdev->dev, sizeof(*wcove), GFP_KERNEL);
|
||||
|
|
@ -303,43 +595,47 @@ static int wcove_typec_probe(struct platform_device *pdev)
|
|||
wcove->dev = &pdev->dev;
|
||||
wcove->regmap = pmic->regmap;
|
||||
|
||||
ret = regmap_irq_get_virq(pmic->irq_chip_data_chgr,
|
||||
irq = regmap_irq_get_virq(pmic->irq_chip_data_chgr,
|
||||
platform_get_irq(pdev, 0));
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
if (irq < 0)
|
||||
return irq;
|
||||
|
||||
ret = devm_request_threaded_irq(&pdev->dev, ret, NULL,
|
||||
wcove_typec_irq, IRQF_ONESHOT,
|
||||
"wcove_typec", wcove);
|
||||
ret = guid_parse(WCOVE_DSM_UUID, &wcove->guid);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
if (!acpi_check_dsm(ACPI_HANDLE(&pdev->dev), &guid, 0, 0x1f)) {
|
||||
if (!acpi_check_dsm(ACPI_HANDLE(&pdev->dev), &wcove->guid, 0, 0x1f)) {
|
||||
dev_err(&pdev->dev, "Missing _DSM functions\n");
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
wcove->cap.type = TYPEC_PORT_DRP;
|
||||
wcove->cap.revision = USB_TYPEC_REV_1_1;
|
||||
wcove->cap.prefer_role = TYPEC_NO_PREFERRED_ROLE;
|
||||
wcove->tcpc.init = wcove_init;
|
||||
wcove->tcpc.get_vbus = wcove_get_vbus;
|
||||
wcove->tcpc.set_vbus = wcove_set_vbus;
|
||||
wcove->tcpc.set_cc = wcove_set_cc;
|
||||
wcove->tcpc.get_cc = wcove_get_cc;
|
||||
wcove->tcpc.set_polarity = wcove_set_polarity;
|
||||
wcove->tcpc.set_vconn = wcove_set_vconn;
|
||||
wcove->tcpc.set_current_limit = wcove_set_current_limit;
|
||||
wcove->tcpc.start_drp_toggling = wcove_start_drp_toggling;
|
||||
|
||||
/* Make sure the PD PHY is disabled until USB PD is available */
|
||||
regmap_read(wcove->regmap, USBC_CONTROL3, &val);
|
||||
regmap_write(wcove->regmap, USBC_CONTROL3, val | USBC_CONTROL3_PD_DIS);
|
||||
wcove->tcpc.set_pd_rx = wcove_set_pd_rx;
|
||||
wcove->tcpc.set_roles = wcove_set_roles;
|
||||
wcove->tcpc.pd_transmit = wcove_pd_transmit;
|
||||
|
||||
/* DRP mode without accessory support */
|
||||
regmap_read(wcove->regmap, USBC_CONTROL1, &val);
|
||||
regmap_write(wcove->regmap, USBC_CONTROL1, USBC_CONTROL1_MODE_DRP(val));
|
||||
wcove->tcpc.config = &wcove_typec_config;
|
||||
|
||||
wcove->port = typec_register_port(&pdev->dev, &wcove->cap);
|
||||
if (!wcove->port)
|
||||
return -ENODEV;
|
||||
wcove->tcpm = tcpm_register_port(wcove->dev, &wcove->tcpc);
|
||||
if (IS_ERR(wcove->tcpm))
|
||||
return PTR_ERR(wcove->tcpm);
|
||||
|
||||
/* Unmask everything */
|
||||
regmap_read(wcove->regmap, USBC_IRQMASK1, &val);
|
||||
regmap_write(wcove->regmap, USBC_IRQMASK1, val & ~USBC_IRQMASK1_ALL);
|
||||
regmap_read(wcove->regmap, USBC_IRQMASK2, &val);
|
||||
regmap_write(wcove->regmap, USBC_IRQMASK2, val & ~USBC_IRQMASK2_ALL);
|
||||
ret = devm_request_threaded_irq(&pdev->dev, irq, NULL,
|
||||
wcove_typec_irq, IRQF_ONESHOT,
|
||||
"wcove_typec", wcove);
|
||||
if (ret) {
|
||||
tcpm_unregister_port(wcove->tcpm);
|
||||
return ret;
|
||||
}
|
||||
|
||||
platform_set_drvdata(pdev, wcove);
|
||||
return 0;
|
||||
|
|
@ -356,8 +652,8 @@ static int wcove_typec_remove(struct platform_device *pdev)
|
|||
regmap_read(wcove->regmap, USBC_IRQMASK2, &val);
|
||||
regmap_write(wcove->regmap, USBC_IRQMASK2, val | USBC_IRQMASK2_ALL);
|
||||
|
||||
typec_unregister_partner(wcove->partner);
|
||||
typec_unregister_port(wcove->port);
|
||||
tcpm_unregister_port(wcove->tcpm);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
|
|||
Loading…
Reference in New Issue