ALSA: hda - Add driver for Tegra SoC HDA
This adds a driver for the HDA block in Tegra SoCs. The HDA bus is used to communicate with the HDMI codec on Tegra124. Most of the code is re-used from the Intel/PCI HDA driver. It brings over only two of the module params, power_save and probe_mask. Signed-off-by: Dylan Reid <dgreid@chromium.org> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Takashi Iwai <tiwai@suse.de>
This commit is contained in:
Dylan Reid
Takashi Iwai
parent
9674678633
commit
3c320f3f56
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@ -0,0 +1,28 @@
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NVIDIA Tegra30 HDA controller
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Required properties:
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- compatible : "nvidia,tegra30-hda"
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- reg : Should contain the HDA registers location and length.
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- interrupts : The interrupt from the HDA controller.
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- clocks : Must contain an entry for each required entry in clock-names.
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See ../clocks/clock-bindings.txt for details.
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- clock-names : Must include the following entries: hda, hdacodec_2x, hda2hdmi
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- resets : Must contain an entry for each entry in reset-names.
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See ../reset/reset.txt for details.
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- reset-names : Must include the following entries: hda, hdacodec_2x, hda2hdmi
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Example:
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hda@0,70030000 {
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compatible = "nvidia,tegra124-hda", "nvidia,tegra30-hda";
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reg = <0x0 0x70030000 0x0 0x10000>;
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interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&tegra_car TEGRA124_CLK_HDA>,
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<&tegra_car TEGRA124_CLK_HDA2HDMI>,
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<&tegra_car TEGRA124_CLK_HDA2CODEC_2X>;
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clock-names = "hda", "hda2hdmi", "hdacodec_2x";
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resets = <&tegra_car 125>, /* hda */
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<&tegra_car 128>; /* hda2hdmi */
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<&tegra_car 111>, /* hda2codec_2x */
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reset-names = "hda", "hda2hdmi", "hdacodec_2x";
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};
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@ -20,6 +20,21 @@ config SND_HDA_INTEL
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To compile this driver as a module, choose M here: the module
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will be called snd-hda-intel.
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config SND_HDA_TEGRA
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tristate "NVIDIA Tegra HD Audio"
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depends on ARCH_TEGRA
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select SND_HDA
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help
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Say Y here to support the HDA controller present in NVIDIA
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Tegra SoCs
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This options enables support for the HD Audio controller
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present in some NVIDIA Tegra SoCs, used to communicate audio
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to the HDMI output.
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To compile this driver as a module, choose M here: the module
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will be called snd-hda-tegra.
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if SND_HDA
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config SND_HDA_DSP_LOADER
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@ -1,5 +1,6 @@
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snd-hda-intel-objs := hda_intel.o
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snd-hda-controller-objs := hda_controller.o
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snd-hda-tegra-objs := hda_tegra.o
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# for haswell power well
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snd-hda-intel-$(CONFIG_SND_HDA_I915) += hda_i915.o
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@ -47,3 +48,4 @@ obj-$(CONFIG_SND_HDA_CODEC_HDMI) += snd-hda-codec-hdmi.o
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# otherwise the codec patches won't be hooked before the PCI probe
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# when built in kernel
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obj-$(CONFIG_SND_HDA_INTEL) += snd-hda-intel.o
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obj-$(CONFIG_SND_HDA_TEGRA) += snd-hda-tegra.o
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@ -0,0 +1,584 @@
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/*
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*
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* Implementation of primary ALSA driver code base for NVIDIA Tegra HDA.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*
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*/
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#include <linux/clk.h>
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#include <linux/clocksource.h>
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#include <linux/completion.h>
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#include <linux/delay.h>
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#include <linux/dma-mapping.h>
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#include <linux/init.h>
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#include <linux/interrupt.h>
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#include <linux/io.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/moduleparam.h>
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#include <linux/mutex.h>
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#include <linux/of_device.h>
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#include <linux/reboot.h>
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#include <linux/slab.h>
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#include <linux/time.h>
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#include <sound/core.h>
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#include <sound/initval.h>
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#include "hda_codec.h"
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#include "hda_controller.h"
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#include "hda_priv.h"
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/* Defines for Nvidia Tegra HDA support */
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#define HDA_BAR0 0x8000
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#define HDA_CFG_CMD 0x1004
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#define HDA_CFG_BAR0 0x1010
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#define HDA_ENABLE_IO_SPACE (1 << 0)
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#define HDA_ENABLE_MEM_SPACE (1 << 1)
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#define HDA_ENABLE_BUS_MASTER (1 << 2)
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#define HDA_ENABLE_SERR (1 << 8)
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#define HDA_DISABLE_INTR (1 << 10)
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#define HDA_BAR0_INIT_PROGRAM 0xFFFFFFFF
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#define HDA_BAR0_FINAL_PROGRAM (1 << 14)
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/* IPFS */
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#define HDA_IPFS_CONFIG 0x180
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#define HDA_IPFS_EN_FPCI 0x1
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#define HDA_IPFS_FPCI_BAR0 0x80
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#define HDA_FPCI_BAR0_START 0x40
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#define HDA_IPFS_INTR_MASK 0x188
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#define HDA_IPFS_EN_INTR (1 << 16)
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/* max number of SDs */
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#define NUM_CAPTURE_SD 1
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#define NUM_PLAYBACK_SD 1
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struct hda_tegra {
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struct azx chip;
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struct device *dev;
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struct clk *hda_clk;
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struct clk *hda2codec_2x_clk;
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struct clk *hda2hdmi_clk;
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void __iomem *regs;
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};
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static int power_save = CONFIG_SND_HDA_POWER_SAVE_DEFAULT;
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module_param(power_save, bint, 0644);
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MODULE_PARM_DESC(power_save,
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"Automatic power-saving timeout (in seconds, 0 = disable).");
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/*
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* DMA page allocation ops.
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*/
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static int dma_alloc_pages(struct azx *chip, int type, size_t size,
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struct snd_dma_buffer *buf)
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{
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return snd_dma_alloc_pages(type, chip->card->dev, size, buf);
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}
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static void dma_free_pages(struct azx *chip, struct snd_dma_buffer *buf)
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{
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snd_dma_free_pages(buf);
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}
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static int substream_alloc_pages(struct azx *chip,
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struct snd_pcm_substream *substream,
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size_t size)
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{
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struct azx_dev *azx_dev = get_azx_dev(substream);
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azx_dev->bufsize = 0;
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azx_dev->period_bytes = 0;
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azx_dev->format_val = 0;
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return snd_pcm_lib_malloc_pages(substream, size);
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}
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static int substream_free_pages(struct azx *chip,
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struct snd_pcm_substream *substream)
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{
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return snd_pcm_lib_free_pages(substream);
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}
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/*
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* Register access ops. Tegra HDA register access is DWORD only.
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*/
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static void hda_tegra_writel(u32 value, u32 *addr)
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{
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writel(value, addr);
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}
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static u32 hda_tegra_readl(u32 *addr)
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{
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return readl(addr);
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}
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static void hda_tegra_writew(u16 value, u16 *addr)
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{
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unsigned int shift = ((unsigned long)(addr) & 0x3) << 3;
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void *dword_addr = (void *)((unsigned long)(addr) & ~0x3);
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u32 v;
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v = readl(dword_addr);
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v &= ~(0xffff << shift);
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v |= value << shift;
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writel(v, dword_addr);
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}
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static u16 hda_tegra_readw(u16 *addr)
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{
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unsigned int shift = ((unsigned long)(addr) & 0x3) << 3;
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void *dword_addr = (void *)((unsigned long)(addr) & ~0x3);
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u32 v;
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v = readl(dword_addr);
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return (v >> shift) & 0xffff;
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}
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static void hda_tegra_writeb(u8 value, u8 *addr)
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{
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unsigned int shift = ((unsigned long)(addr) & 0x3) << 3;
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void *dword_addr = (void *)((unsigned long)(addr) & ~0x3);
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u32 v;
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v = readl(dword_addr);
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v &= ~(0xff << shift);
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v |= value << shift;
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writel(v, dword_addr);
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}
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static u8 hda_tegra_readb(u8 *addr)
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{
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unsigned int shift = ((unsigned long)(addr) & 0x3) << 3;
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void *dword_addr = (void *)((unsigned long)(addr) & ~0x3);
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u32 v;
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v = readl(dword_addr);
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return (v >> shift) & 0xff;
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}
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static const struct hda_controller_ops hda_tegra_ops = {
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.reg_writel = hda_tegra_writel,
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.reg_readl = hda_tegra_readl,
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.reg_writew = hda_tegra_writew,
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.reg_readw = hda_tegra_readw,
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.reg_writeb = hda_tegra_writeb,
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.reg_readb = hda_tegra_readb,
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.dma_alloc_pages = dma_alloc_pages,
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.dma_free_pages = dma_free_pages,
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.substream_alloc_pages = substream_alloc_pages,
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.substream_free_pages = substream_free_pages,
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};
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static void hda_tegra_init(struct hda_tegra *hda)
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{
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u32 v;
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/* Enable PCI access */
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v = readl(hda->regs + HDA_IPFS_CONFIG);
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v |= HDA_IPFS_EN_FPCI;
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writel(v, hda->regs + HDA_IPFS_CONFIG);
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/* Enable MEM/IO space and bus master */
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v = readl(hda->regs + HDA_CFG_CMD);
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v &= ~HDA_DISABLE_INTR;
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v |= HDA_ENABLE_MEM_SPACE | HDA_ENABLE_IO_SPACE |
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HDA_ENABLE_BUS_MASTER | HDA_ENABLE_SERR;
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writel(v, hda->regs + HDA_CFG_CMD);
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writel(HDA_BAR0_INIT_PROGRAM, hda->regs + HDA_CFG_BAR0);
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writel(HDA_BAR0_FINAL_PROGRAM, hda->regs + HDA_CFG_BAR0);
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writel(HDA_FPCI_BAR0_START, hda->regs + HDA_IPFS_FPCI_BAR0);
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v = readl(hda->regs + HDA_IPFS_INTR_MASK);
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v |= HDA_IPFS_EN_INTR;
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writel(v, hda->regs + HDA_IPFS_INTR_MASK);
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}
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static int hda_tegra_enable_clocks(struct hda_tegra *data)
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{
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int rc;
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rc = clk_prepare_enable(data->hda_clk);
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if (rc)
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return rc;
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rc = clk_prepare_enable(data->hda2codec_2x_clk);
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if (rc)
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goto disable_hda;
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rc = clk_prepare_enable(data->hda2hdmi_clk);
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if (rc)
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goto disable_codec_2x;
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return 0;
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disable_codec_2x:
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clk_disable_unprepare(data->hda2codec_2x_clk);
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disable_hda:
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clk_disable_unprepare(data->hda_clk);
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return rc;
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}
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static void hda_tegra_disable_clocks(struct hda_tegra *data)
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{
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clk_disable_unprepare(data->hda2hdmi_clk);
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clk_disable_unprepare(data->hda2codec_2x_clk);
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clk_disable_unprepare(data->hda_clk);
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}
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#ifdef CONFIG_PM_SLEEP
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/*
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* power management
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*/
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static int hda_tegra_suspend(struct device *dev)
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{
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struct snd_card *card = dev_get_drvdata(dev);
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struct azx *chip = card->private_data;
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struct azx_pcm *p;
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struct hda_tegra *hda = container_of(chip, struct hda_tegra, chip);
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snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
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list_for_each_entry(p, &chip->pcm_list, list)
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snd_pcm_suspend_all(p->pcm);
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if (chip->initialized)
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snd_hda_suspend(chip->bus);
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azx_stop_chip(chip);
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azx_enter_link_reset(chip);
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hda_tegra_disable_clocks(hda);
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return 0;
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}
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static int hda_tegra_resume(struct device *dev)
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{
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struct snd_card *card = dev_get_drvdata(dev);
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struct azx *chip = card->private_data;
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struct hda_tegra *hda = container_of(chip, struct hda_tegra, chip);
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int status;
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hda_tegra_enable_clocks(hda);
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/* Read STATESTS before controller reset */
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status = azx_readw(chip, STATESTS);
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hda_tegra_init(hda);
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azx_init_chip(chip, 1);
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snd_hda_resume(chip->bus);
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snd_power_change_state(card, SNDRV_CTL_POWER_D0);
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return 0;
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}
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#endif /* CONFIG_PM_SLEEP */
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static const struct dev_pm_ops hda_tegra_pm = {
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SET_SYSTEM_SLEEP_PM_OPS(hda_tegra_suspend, hda_tegra_resume)
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};
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/*
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* reboot notifier for hang-up problem at power-down
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*/
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static int hda_tegra_halt(struct notifier_block *nb, unsigned long event,
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void *buf)
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{
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struct azx *chip = container_of(nb, struct azx, reboot_notifier);
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snd_hda_bus_reboot_notify(chip->bus);
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azx_stop_chip(chip);
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return NOTIFY_OK;
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}
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static void hda_tegra_notifier_register(struct azx *chip)
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{
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chip->reboot_notifier.notifier_call = hda_tegra_halt;
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register_reboot_notifier(&chip->reboot_notifier);
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}
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static void hda_tegra_notifier_unregister(struct azx *chip)
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{
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if (chip->reboot_notifier.notifier_call)
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unregister_reboot_notifier(&chip->reboot_notifier);
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}
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/*
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* destructor
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*/
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static int hda_tegra_dev_free(struct snd_device *device)
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{
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int i;
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struct azx *chip = device->device_data;
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hda_tegra_notifier_unregister(chip);
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if (chip->initialized) {
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for (i = 0; i < chip->num_streams; i++)
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azx_stream_stop(chip, &chip->azx_dev[i]);
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azx_stop_chip(chip);
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}
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azx_free_stream_pages(chip);
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return 0;
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}
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static int hda_tegra_init_chip(struct azx *chip, struct platform_device *pdev)
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{
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struct hda_tegra *hda = container_of(chip, struct hda_tegra, chip);
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struct device *dev = hda->dev;
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struct resource *res;
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int err;
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hda->hda_clk = devm_clk_get(dev, "hda");
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if (IS_ERR(hda->hda_clk))
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return PTR_ERR(hda->hda_clk);
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hda->hda2codec_2x_clk = devm_clk_get(dev, "hda2codec_2x");
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if (IS_ERR(hda->hda2codec_2x_clk))
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return PTR_ERR(hda->hda2codec_2x_clk);
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hda->hda2hdmi_clk = devm_clk_get(dev, "hda2hdmi");
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if (IS_ERR(hda->hda2hdmi_clk))
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return PTR_ERR(hda->hda2hdmi_clk);
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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hda->regs = devm_ioremap_resource(dev, res);
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if (IS_ERR(chip->remap_addr))
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return PTR_ERR(chip->remap_addr);
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chip->remap_addr = hda->regs + HDA_BAR0;
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chip->addr = res->start + HDA_BAR0;
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err = hda_tegra_enable_clocks(hda);
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if (err)
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return err;
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hda_tegra_init(hda);
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return 0;
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}
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/*
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* The codecs were powered up in snd_hda_codec_new().
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* Now all initialization done, so turn them down if possible
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*/
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static void power_down_all_codecs(struct azx *chip)
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{
|
||||
struct hda_codec *codec;
|
||||
list_for_each_entry(codec, &chip->bus->codec_list, list)
|
||||
snd_hda_power_down(codec);
|
||||
}
|
||||
|
||||
static int hda_tegra_first_init(struct azx *chip, struct platform_device *pdev)
|
||||
{
|
||||
struct snd_card *card = chip->card;
|
||||
int err;
|
||||
unsigned short gcap;
|
||||
int irq_id = platform_get_irq(pdev, 0);
|
||||
|
||||
err = hda_tegra_init_chip(chip, pdev);
|
||||
if (err)
|
||||
return err;
|
||||
|
||||
err = devm_request_irq(chip->card->dev, irq_id, azx_interrupt,
|
||||
IRQF_SHARED, KBUILD_MODNAME, chip);
|
||||
if (err) {
|
||||
dev_err(chip->card->dev,
|
||||
"unable to request IRQ %d, disabling device\n",
|
||||
irq_id);
|
||||
return err;
|
||||
}
|
||||
chip->irq = irq_id;
|
||||
|
||||
synchronize_irq(chip->irq);
|
||||
|
||||
gcap = azx_readw(chip, GCAP);
|
||||
dev_dbg(card->dev, "chipset global capabilities = 0x%x\n", gcap);
|
||||
|
||||
/* read number of streams from GCAP register instead of using
|
||||
* hardcoded value
|
||||
*/
|
||||
chip->capture_streams = (gcap >> 8) & 0x0f;
|
||||
chip->playback_streams = (gcap >> 12) & 0x0f;
|
||||
if (!chip->playback_streams && !chip->capture_streams) {
|
||||
/* gcap didn't give any info, switching to old method */
|
||||
chip->playback_streams = NUM_PLAYBACK_SD;
|
||||
chip->capture_streams = NUM_CAPTURE_SD;
|
||||
}
|
||||
chip->capture_index_offset = 0;
|
||||
chip->playback_index_offset = chip->capture_streams;
|
||||
chip->num_streams = chip->playback_streams + chip->capture_streams;
|
||||
chip->azx_dev = devm_kcalloc(card->dev, chip->num_streams,
|
||||
sizeof(*chip->azx_dev), GFP_KERNEL);
|
||||
if (!chip->azx_dev)
|
||||
return -ENOMEM;
|
||||
|
||||
err = azx_alloc_stream_pages(chip);
|
||||
if (err < 0)
|
||||
return err;
|
||||
|
||||
/* initialize streams */
|
||||
azx_init_stream(chip);
|
||||
|
||||
/* initialize chip */
|
||||
azx_init_chip(chip, 1);
|
||||
|
||||
/* codec detection */
|
||||
if (!chip->codec_mask) {
|
||||
dev_err(card->dev, "no codecs found!\n");
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
strcpy(card->driver, "tegra-hda");
|
||||
strcpy(card->shortname, "tegra-hda");
|
||||
snprintf(card->longname, sizeof(card->longname),
|
||||
"%s at 0x%lx irq %i",
|
||||
card->shortname, chip->addr, chip->irq);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* constructor
|
||||
*/
|
||||
static int hda_tegra_create(struct snd_card *card,
|
||||
unsigned int driver_caps,
|
||||
const struct hda_controller_ops *hda_ops,
|
||||
struct hda_tegra *hda)
|
||||
{
|
||||
static struct snd_device_ops ops = {
|
||||
.dev_free = hda_tegra_dev_free,
|
||||
};
|
||||
struct azx *chip;
|
||||
int err;
|
||||
|
||||
chip = &hda->chip;
|
||||
|
||||
spin_lock_init(&chip->reg_lock);
|
||||
mutex_init(&chip->open_mutex);
|
||||
chip->card = card;
|
||||
chip->ops = hda_ops;
|
||||
chip->irq = -1;
|
||||
chip->driver_caps = driver_caps;
|
||||
chip->driver_type = driver_caps & 0xff;
|
||||
chip->dev_index = 0;
|
||||
INIT_LIST_HEAD(&chip->pcm_list);
|
||||
INIT_LIST_HEAD(&chip->list);
|
||||
|
||||
chip->position_fix[0] = POS_FIX_AUTO;
|
||||
chip->position_fix[1] = POS_FIX_AUTO;
|
||||
chip->codec_probe_mask = -1;
|
||||
|
||||
chip->single_cmd = false;
|
||||
chip->snoop = true;
|
||||
|
||||
err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops);
|
||||
if (err < 0) {
|
||||
dev_err(card->dev, "Error creating device\n");
|
||||
return err;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const struct of_device_id hda_tegra_match[] = {
|
||||
{ .compatible = "nvidia,tegra30-hda" },
|
||||
{},
|
||||
};
|
||||
MODULE_DEVICE_TABLE(of, tegra_platform_hda_match);
|
||||
|
||||
static int hda_tegra_probe(struct platform_device *pdev)
|
||||
{
|
||||
struct snd_card *card;
|
||||
struct azx *chip;
|
||||
struct hda_tegra *hda;
|
||||
int err;
|
||||
const unsigned int driver_flags = AZX_DCAPS_RIRB_DELAY;
|
||||
|
||||
hda = devm_kzalloc(&pdev->dev, sizeof(*hda), GFP_KERNEL);
|
||||
if (!hda)
|
||||
return -ENOMEM;
|
||||
hda->dev = &pdev->dev;
|
||||
chip = &hda->chip;
|
||||
|
||||
err = snd_card_new(&pdev->dev, SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1,
|
||||
THIS_MODULE, 0, &card);
|
||||
if (err < 0) {
|
||||
dev_err(&pdev->dev, "Error creating card!\n");
|
||||
return err;
|
||||
}
|
||||
|
||||
err = hda_tegra_create(card, driver_flags, &hda_tegra_ops, hda);
|
||||
if (err < 0)
|
||||
goto out_free;
|
||||
card->private_data = chip;
|
||||
|
||||
dev_set_drvdata(&pdev->dev, card);
|
||||
|
||||
err = hda_tegra_first_init(chip, pdev);
|
||||
if (err < 0)
|
||||
goto out_free;
|
||||
|
||||
/* create codec instances */
|
||||
err = azx_codec_create(chip, NULL, 0, &power_save);
|
||||
if (err < 0)
|
||||
goto out_free;
|
||||
|
||||
err = azx_codec_configure(chip);
|
||||
if (err < 0)
|
||||
goto out_free;
|
||||
|
||||
/* create PCM streams */
|
||||
err = snd_hda_build_pcms(chip->bus);
|
||||
if (err < 0)
|
||||
goto out_free;
|
||||
|
||||
/* create mixer controls */
|
||||
err = azx_mixer_create(chip);
|
||||
if (err < 0)
|
||||
goto out_free;
|
||||
|
||||
err = snd_card_register(chip->card);
|
||||
if (err < 0)
|
||||
goto out_free;
|
||||
|
||||
chip->running = 1;
|
||||
power_down_all_codecs(chip);
|
||||
hda_tegra_notifier_register(chip);
|
||||
|
||||
return 0;
|
||||
|
||||
out_free:
|
||||
snd_card_free(card);
|
||||
return err;
|
||||
}
|
||||
|
||||
static int hda_tegra_remove(struct platform_device *pdev)
|
||||
{
|
||||
return snd_card_free(dev_get_drvdata(&pdev->dev));
|
||||
}
|
||||
|
||||
static struct platform_driver tegra_platform_hda = {
|
||||
.driver = {
|
||||
.name = "tegra-hda",
|
||||
.pm = &hda_tegra_pm,
|
||||
.of_match_table = hda_tegra_match,
|
||||
},
|
||||
.probe = hda_tegra_probe,
|
||||
.remove = hda_tegra_remove,
|
||||
};
|
||||
module_platform_driver(tegra_platform_hda);
|
||||
|
||||
MODULE_DESCRIPTION("Tegra HDA bus driver");
|
||||
MODULE_LICENSE("GPL v2");
|
||||
Loading…
Reference in New Issue