powerpc/setup_64: fix -Wempty-body warnings
At the beginning of setup_64.c, it has, #ifdef DEBUG #define DBG(fmt...) udbg_printf(fmt) #else #define DBG(fmt...) #endif where DBG() could be compiled away, and generate warnings, arch/powerpc/kernel/setup_64.c: In function 'initialize_cache_info': arch/powerpc/kernel/setup_64.c:579:49: warning: suggest braces around empty body in an 'if' statement [-Wempty-body] DBG("Argh, can't find dcache properties !\n"); ^ arch/powerpc/kernel/setup_64.c:582:49: warning: suggest braces around empty body in an 'if' statement [-Wempty-body] DBG("Argh, can't find icache properties !\n"); Fix it by using the suggestions from Michael: "Neither of those sites should use DBG(), that's not really early boot code, they should just use pr_warn(). And the other uses of DBG() in initialize_cache_info() should just be removed. In smp_release_cpus() the entry/exit DBG's should just be removed, and the spinning_secondaries line should just be pr_debug(). That would just leave the two calls in early_setup(). If we taught udbg_printf() to return early when udbg_putc is NULL, then we could just call udbg_printf() unconditionally and get rid of the DBG macro entirely." Suggested-by: Michael Ellerman <mpe@ellerman.id.au> Signed-off-by: Qian Cai <cai@lca.pw> [mpe: Split udbg change out into previous patch] Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/1563215552-8166-1-git-send-email-cai@lca.pw
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@ -68,12 +68,6 @@
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#include "setup.h"
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#ifdef DEBUG
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#define DBG(fmt...) udbg_printf(fmt)
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#else
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#define DBG(fmt...)
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#endif
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int spinning_secondaries;
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u64 ppc64_pft_size;
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@ -305,7 +299,7 @@ void __init early_setup(unsigned long dt_ptr)
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/* Enable early debugging if any specified (see udbg.h) */
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udbg_early_init();
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DBG(" -> early_setup(), dt_ptr: 0x%lx\n", dt_ptr);
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udbg_printf(" -> %s(), dt_ptr: 0x%lx\n", __func__, dt_ptr);
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/*
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* Do early initialization using the flattened device
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@ -362,11 +356,11 @@ void __init early_setup(unsigned long dt_ptr)
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*/
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this_cpu_enable_ftrace();
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DBG(" <- early_setup()\n");
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udbg_printf(" <- %s()\n", __func__);
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#ifdef CONFIG_PPC_EARLY_DEBUG_BOOTX
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/*
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* This needs to be done *last* (after the above DBG() even)
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* This needs to be done *last* (after the above udbg_printf() even)
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*
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* Right after we return from this function, we turn on the MMU
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* which means the real-mode access trick that btext does will
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@ -436,8 +430,6 @@ void smp_release_cpus(void)
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if (!use_spinloop())
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return;
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DBG(" -> smp_release_cpus()\n");
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/* All secondary cpus are spinning on a common spinloop, release them
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* all now so they can start to spin on their individual paca
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* spinloops. For non SMP kernels, the secondary cpus never get out
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@ -456,9 +448,7 @@ void smp_release_cpus(void)
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break;
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udelay(1);
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}
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DBG("spinning_secondaries = %d\n", spinning_secondaries);
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DBG(" <- smp_release_cpus()\n");
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pr_debug("spinning_secondaries = %d\n", spinning_secondaries);
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}
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#endif /* CONFIG_SMP || CONFIG_KEXEC_CORE */
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@ -551,8 +541,6 @@ void __init initialize_cache_info(void)
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struct device_node *cpu = NULL, *l2, *l3 = NULL;
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u32 pvr;
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DBG(" -> initialize_cache_info()\n");
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/*
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* All shipping POWER8 machines have a firmware bug that
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* puts incorrect information in the device-tree. This will
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@ -576,10 +564,10 @@ void __init initialize_cache_info(void)
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*/
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if (cpu) {
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if (!parse_cache_info(cpu, false, &ppc64_caches.l1d))
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DBG("Argh, can't find dcache properties !\n");
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pr_warn("Argh, can't find dcache properties !\n");
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if (!parse_cache_info(cpu, true, &ppc64_caches.l1i))
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DBG("Argh, can't find icache properties !\n");
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pr_warn("Argh, can't find icache properties !\n");
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/*
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* Try to find the L2 and L3 if any. Assume they are
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@ -604,8 +592,6 @@ void __init initialize_cache_info(void)
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cur_cpu_spec->dcache_bsize = dcache_bsize;
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cur_cpu_spec->icache_bsize = icache_bsize;
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DBG(" <- initialize_cache_info()\n");
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}
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/*
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