Merge 'irq/loongarch-fixes-6.4' into loongarch-next
LoongArch architecture changes for 6.4 depend on the irq changes to work on "dual-bridge" systems, so merge them to create a base.
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3b5a5672b3
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@ -280,9 +280,6 @@ static void acpi_set_vec_parent(int node, struct irq_domain *parent, struct acpi
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{
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int i;
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if (cpu_has_flatmode)
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node = cpu_to_node(node * CORES_PER_EIO_NODE);
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for (i = 0; i < MAX_IO_PICS; i++) {
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if (node == vec_group[i].node) {
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vec_group[i].parent = parent;
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@ -343,19 +340,27 @@ static int __init pch_pic_parse_madt(union acpi_subtable_headers *header,
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if (parent)
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return pch_pic_acpi_init(parent, pchpic_entry);
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return -EINVAL;
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return 0;
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}
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static int __init pch_msi_parse_madt(union acpi_subtable_headers *header,
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const unsigned long end)
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{
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struct irq_domain *parent;
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struct acpi_madt_msi_pic *pchmsi_entry = (struct acpi_madt_msi_pic *)header;
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struct irq_domain *parent = acpi_get_vec_parent(eiointc_priv[nr_pics - 1]->node, msi_group);
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int node;
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if (cpu_has_flatmode)
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node = cpu_to_node(eiointc_priv[nr_pics - 1]->node * CORES_PER_EIO_NODE);
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else
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node = eiointc_priv[nr_pics - 1]->node;
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parent = acpi_get_vec_parent(node, msi_group);
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if (parent)
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return pch_msi_acpi_init(parent, pchmsi_entry);
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return -EINVAL;
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return 0;
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}
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static int __init acpi_cascade_irqdomain_init(void)
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@ -379,6 +384,7 @@ int __init eiointc_acpi_init(struct irq_domain *parent,
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int i, ret, parent_irq;
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unsigned long node_map;
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struct eiointc_priv *priv;
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int node;
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priv = kzalloc(sizeof(*priv), GFP_KERNEL);
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if (!priv)
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@ -416,13 +422,19 @@ int __init eiointc_acpi_init(struct irq_domain *parent,
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parent_irq = irq_create_mapping(parent, acpi_eiointc->cascade);
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irq_set_chained_handler_and_data(parent_irq, eiointc_irq_dispatch, priv);
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register_syscore_ops(&eiointc_syscore_ops);
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cpuhp_setup_state_nocalls(CPUHP_AP_IRQ_LOONGARCH_STARTING,
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if (nr_pics == 1) {
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register_syscore_ops(&eiointc_syscore_ops);
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cpuhp_setup_state_nocalls(CPUHP_AP_IRQ_LOONGARCH_STARTING,
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"irqchip/loongarch/intc:starting",
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eiointc_router_init, NULL);
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}
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acpi_set_vec_parent(acpi_eiointc->node, priv->eiointc_domain, pch_group);
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acpi_set_vec_parent(acpi_eiointc->node, priv->eiointc_domain, msi_group);
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if (cpu_has_flatmode)
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node = cpu_to_node(acpi_eiointc->node * CORES_PER_EIO_NODE);
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else
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node = acpi_eiointc->node;
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acpi_set_vec_parent(node, priv->eiointc_domain, pch_group);
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acpi_set_vec_parent(node, priv->eiointc_domain, msi_group);
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ret = acpi_cascade_irqdomain_init();
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return ret;
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@ -311,7 +311,8 @@ static int pch_pic_init(phys_addr_t addr, unsigned long size, int vec_base,
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pch_pic_handle[nr_pics] = domain_handle;
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pch_pic_priv[nr_pics++] = priv;
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register_syscore_ops(&pch_pic_syscore_ops);
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if (nr_pics == 1)
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register_syscore_ops(&pch_pic_syscore_ops);
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return 0;
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@ -403,6 +404,9 @@ int __init pch_pic_acpi_init(struct irq_domain *parent,
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int ret, vec_base;
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struct fwnode_handle *domain_handle;
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if (find_pch_pic(acpi_pchpic->gsi_base) >= 0)
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return 0;
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vec_base = acpi_pchpic->gsi_base - GSI_MIN_PCH_IRQ;
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domain_handle = irq_domain_alloc_fwnode(&acpi_pchpic->address);
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