drm/amdgpu: update the method to set kcq queue mask
Use a common method to set queue mask before set kiq resource. The value of queue mask must suitablt for the designated form. Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -485,6 +485,19 @@ int amdgpu_gfx_disable_kcq(struct amdgpu_device *adev)
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return amdgpu_ring_test_helper(kiq_ring);
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return amdgpu_ring_test_helper(kiq_ring);
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}
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}
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int amdgpu_gfx_kcq_queue_mask_transform(struct amdgpu_device *adev,
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int queue_bit)
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{
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int mec, pipe, queue;
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int queue_kcq_bit = 0;
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amdgpu_gfx_bit_to_mec_queue(adev, queue_bit, &mec, &pipe, &queue);
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queue_kcq_bit = mec * 4 * 8 + pipe * 8 + queue;
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return queue_kcq_bit;
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}
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int amdgpu_gfx_enable_kcq(struct amdgpu_device *adev)
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int amdgpu_gfx_enable_kcq(struct amdgpu_device *adev)
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{
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{
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struct amdgpu_kiq *kiq = &adev->gfx.kiq;
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struct amdgpu_kiq *kiq = &adev->gfx.kiq;
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@ -507,7 +520,7 @@ int amdgpu_gfx_enable_kcq(struct amdgpu_device *adev)
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break;
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break;
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}
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}
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queue_mask |= (1ull << i);
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queue_mask |= (1ull << amdgpu_gfx_kcq_queue_mask_transform(adev, i));
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}
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}
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DRM_INFO("kiq ring mec %d pipe %d q %d\n", kiq_ring->me, kiq_ring->pipe,
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DRM_INFO("kiq ring mec %d pipe %d q %d\n", kiq_ring->me, kiq_ring->pipe,
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