ASoC: Add support for synopsys i2s controller as per ASoC framework.
This patch add support for synopsys I2S controller as per the ASoC framework. Signed-off-by: Rajeev Kumar <rajeev-dlh.kumar@st.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
This commit is contained in:
Rajeev Kumar
Mark Brown
parent
f4a6348391
commit
3a9cf8efd7
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@ -0,0 +1,69 @@
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/*
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* Copyright (ST) 2012 Rajeev Kumar (rajeev-dlh.kumar@st.com)
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*
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*/
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#ifndef __SOUND_DESIGNWARE_I2S_H
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#define __SOUND_DESIGNWARE_I2S_H
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#include <linux/dmaengine.h>
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#include <linux/types.h>
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/*
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* struct i2s_clk_config_data - represent i2s clk configuration data
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* @chan_nr: number of channel
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* @data_width: number of bits per sample (8/16/24/32 bit)
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* @sample_rate: sampling frequency (8Khz, 16Khz, 32Khz, 44Khz, 48Khz)
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*/
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struct i2s_clk_config_data {
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int chan_nr;
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u32 data_width;
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u32 sample_rate;
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};
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struct i2s_platform_data {
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#define DWC_I2S_PLAY (1 << 0)
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#define DWC_I2S_RECORD (1 << 1)
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unsigned int cap;
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int channel;
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u32 snd_fmts;
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u32 snd_rates;
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void *play_dma_data;
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void *capture_dma_data;
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bool (*filter)(struct dma_chan *chan, void *slave);
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int (*i2s_clk_cfg)(struct i2s_clk_config_data *config);
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};
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struct i2s_dma_data {
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void *data;
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dma_addr_t addr;
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u32 max_burst;
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enum dma_slave_buswidth addr_width;
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bool (*filter)(struct dma_chan *chan, void *slave);
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};
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/* I2S DMA registers */
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#define I2S_RXDMA 0x01C0
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#define I2S_TXDMA 0x01C8
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#define TWO_CHANNEL_SUPPORT 2 /* up to 2.0 */
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#define FOUR_CHANNEL_SUPPORT 4 /* up to 3.1 */
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#define SIX_CHANNEL_SUPPORT 6 /* up to 5.1 */
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#define EIGHT_CHANNEL_SUPPORT 8 /* up to 7.1 */
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#endif /* __SOUND_DESIGNWARE_I2S_H */
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@ -33,6 +33,7 @@ source "sound/soc/atmel/Kconfig"
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source "sound/soc/au1x/Kconfig"
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source "sound/soc/au1x/Kconfig"
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source "sound/soc/blackfin/Kconfig"
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source "sound/soc/blackfin/Kconfig"
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source "sound/soc/davinci/Kconfig"
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source "sound/soc/davinci/Kconfig"
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source "sound/soc/dwc/Kconfig"
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source "sound/soc/ep93xx/Kconfig"
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source "sound/soc/ep93xx/Kconfig"
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source "sound/soc/fsl/Kconfig"
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source "sound/soc/fsl/Kconfig"
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source "sound/soc/jz4740/Kconfig"
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source "sound/soc/jz4740/Kconfig"
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@ -11,6 +11,7 @@ obj-$(CONFIG_SND_SOC) += atmel/
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obj-$(CONFIG_SND_SOC) += au1x/
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obj-$(CONFIG_SND_SOC) += au1x/
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obj-$(CONFIG_SND_SOC) += blackfin/
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obj-$(CONFIG_SND_SOC) += blackfin/
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obj-$(CONFIG_SND_SOC) += davinci/
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obj-$(CONFIG_SND_SOC) += davinci/
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obj-$(CONFIG_SND_SOC) += dwc/
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obj-$(CONFIG_SND_SOC) += ep93xx/
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obj-$(CONFIG_SND_SOC) += ep93xx/
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obj-$(CONFIG_SND_SOC) += fsl/
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obj-$(CONFIG_SND_SOC) += fsl/
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obj-$(CONFIG_SND_SOC) += jz4740/
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obj-$(CONFIG_SND_SOC) += jz4740/
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@ -0,0 +1,8 @@
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config SND_DESIGNWARE_I2S
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tristate "Synopsys I2S Device Driver"
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help
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Say Y or M if you want to add support for I2S driver for
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Synopsys desigwnware I2S device. The device supports upto
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maximum of 8 channels each for play and record.
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@ -0,0 +1,3 @@
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# SYNOPSYS Platform Support
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obj-$(CONFIG_SND_DESIGNWARE_I2S) += designware_i2s.o
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@ -0,0 +1,454 @@
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/*
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* ALSA SoC Synopsys I2S Audio Layer
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*
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* sound/soc/spear/designware_i2s.c
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*
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* Copyright (C) 2010 ST Microelectronics
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* Rajeev Kumar <rajeev-dlh.kumar@st.com>
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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#include <linux/clk.h>
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#include <linux/device.h>
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#include <linux/init.h>
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#include <linux/io.h>
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#include <linux/interrupt.h>
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#include <linux/module.h>
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#include <linux/slab.h>
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#include <sound/designware_i2s.h>
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#include <sound/pcm.h>
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#include <sound/pcm_params.h>
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#include <sound/soc.h>
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/* common register for all channel */
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#define IER 0x000
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#define IRER 0x004
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#define ITER 0x008
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#define CER 0x00C
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#define CCR 0x010
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#define RXFFR 0x014
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#define TXFFR 0x018
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/* I2STxRxRegisters for all channels */
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#define LRBR_LTHR(x) (0x40 * x + 0x020)
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#define RRBR_RTHR(x) (0x40 * x + 0x024)
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#define RER(x) (0x40 * x + 0x028)
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#define TER(x) (0x40 * x + 0x02C)
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#define RCR(x) (0x40 * x + 0x030)
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#define TCR(x) (0x40 * x + 0x034)
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#define ISR(x) (0x40 * x + 0x038)
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#define IMR(x) (0x40 * x + 0x03C)
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#define ROR(x) (0x40 * x + 0x040)
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#define TOR(x) (0x40 * x + 0x044)
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#define RFCR(x) (0x40 * x + 0x048)
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#define TFCR(x) (0x40 * x + 0x04C)
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#define RFF(x) (0x40 * x + 0x050)
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#define TFF(x) (0x40 * x + 0x054)
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/* I2SCOMPRegisters */
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#define I2S_COMP_PARAM_2 0x01F0
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#define I2S_COMP_PARAM_1 0x01F4
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#define I2S_COMP_VERSION 0x01F8
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#define I2S_COMP_TYPE 0x01FC
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#define MAX_CHANNEL_NUM 8
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#define MIN_CHANNEL_NUM 2
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struct dw_i2s_dev {
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void __iomem *i2s_base;
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struct clk *clk;
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int active;
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unsigned int capability;
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struct device *dev;
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/* data related to DMA transfers b/w i2s and DMAC */
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struct i2s_dma_data play_dma_data;
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struct i2s_dma_data capture_dma_data;
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struct i2s_clk_config_data config;
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int (*i2s_clk_cfg)(struct i2s_clk_config_data *config);
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};
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static inline void i2s_write_reg(void *io_base, int reg, u32 val)
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{
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writel(val, io_base + reg);
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}
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static inline u32 i2s_read_reg(void *io_base, int reg)
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{
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return readl(io_base + reg);
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}
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static inline void i2s_disable_channels(struct dw_i2s_dev *dev, u32 stream)
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{
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u32 i = 0;
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if (stream == SNDRV_PCM_STREAM_PLAYBACK) {
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for (i = 0; i < 4; i++)
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i2s_write_reg(dev->i2s_base, TER(i), 0);
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} else {
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for (i = 0; i < 4; i++)
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i2s_write_reg(dev->i2s_base, RER(i), 0);
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}
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}
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static inline void i2s_clear_irqs(struct dw_i2s_dev *dev, u32 stream)
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{
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u32 i = 0;
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if (stream == SNDRV_PCM_STREAM_PLAYBACK) {
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for (i = 0; i < 4; i++)
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i2s_write_reg(dev->i2s_base, TOR(i), 0);
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} else {
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for (i = 0; i < 4; i++)
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i2s_write_reg(dev->i2s_base, ROR(i), 0);
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}
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}
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void i2s_start(struct dw_i2s_dev *dev, struct snd_pcm_substream *substream)
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{
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i2s_write_reg(dev->i2s_base, IER, 1);
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if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
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i2s_write_reg(dev->i2s_base, ITER, 1);
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else
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i2s_write_reg(dev->i2s_base, IRER, 1);
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i2s_write_reg(dev->i2s_base, CER, 1);
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}
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static void i2s_stop(struct dw_i2s_dev *dev,
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struct snd_pcm_substream *substream)
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{
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u32 i = 0, irq;
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i2s_clear_irqs(dev, substream->stream);
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if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
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i2s_write_reg(dev->i2s_base, ITER, 0);
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for (i = 0; i < 4; i++) {
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irq = i2s_read_reg(dev->i2s_base, IMR(i));
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i2s_write_reg(dev->i2s_base, IMR(i), irq | 0x30);
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}
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} else {
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i2s_write_reg(dev->i2s_base, IRER, 0);
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for (i = 0; i < 4; i++) {
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irq = i2s_read_reg(dev->i2s_base, IMR(i));
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i2s_write_reg(dev->i2s_base, IMR(i), irq | 0x03);
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}
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}
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if (!dev->active) {
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i2s_write_reg(dev->i2s_base, CER, 0);
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i2s_write_reg(dev->i2s_base, IER, 0);
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}
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}
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static int dw_i2s_startup(struct snd_pcm_substream *substream,
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struct snd_soc_dai *cpu_dai)
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{
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struct dw_i2s_dev *dev = snd_soc_dai_get_drvdata(cpu_dai);
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struct i2s_dma_data *dma_data = NULL;
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if (!(dev->capability & DWC_I2S_RECORD) &&
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(substream->stream == SNDRV_PCM_STREAM_CAPTURE))
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return -EINVAL;
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if (!(dev->capability & DWC_I2S_PLAY) &&
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(substream->stream == SNDRV_PCM_STREAM_PLAYBACK))
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return -EINVAL;
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if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
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dma_data = &dev->play_dma_data;
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else if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
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dma_data = &dev->capture_dma_data;
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snd_soc_dai_set_dma_data(cpu_dai, substream, (void *)dma_data);
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return 0;
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}
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static int dw_i2s_hw_params(struct snd_pcm_substream *substream,
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struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
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{
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struct dw_i2s_dev *dev = snd_soc_dai_get_drvdata(dai);
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struct i2s_clk_config_data *config = &dev->config;
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u32 ccr, xfer_resolution, ch_reg, irq;
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int ret;
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switch (params_format(params)) {
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case SNDRV_PCM_FORMAT_S16_LE:
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config->data_width = 16;
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ccr = 0x00;
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xfer_resolution = 0x02;
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break;
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case SNDRV_PCM_FORMAT_S24_LE:
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config->data_width = 24;
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ccr = 0x08;
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xfer_resolution = 0x04;
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break;
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case SNDRV_PCM_FORMAT_S32_LE:
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config->data_width = 32;
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ccr = 0x10;
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xfer_resolution = 0x05;
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break;
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default:
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dev_err(dev->dev, "designware-i2s: unsuppted PCM fmt");
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return -EINVAL;
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}
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config->chan_nr = params_channels(params);
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switch (config->chan_nr) {
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case EIGHT_CHANNEL_SUPPORT:
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ch_reg = 3;
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case SIX_CHANNEL_SUPPORT:
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ch_reg = 2;
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case FOUR_CHANNEL_SUPPORT:
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ch_reg = 1;
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case TWO_CHANNEL_SUPPORT:
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ch_reg = 0;
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break;
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default:
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dev_err(dev->dev, "channel not supported\n");
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}
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i2s_disable_channels(dev, substream->stream);
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if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
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i2s_write_reg(dev->i2s_base, TCR(ch_reg), xfer_resolution);
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i2s_write_reg(dev->i2s_base, TFCR(ch_reg), 0x02);
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irq = i2s_read_reg(dev->i2s_base, IMR(ch_reg));
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i2s_write_reg(dev->i2s_base, IMR(ch_reg), irq & ~0x30);
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i2s_write_reg(dev->i2s_base, TER(ch_reg), 1);
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} else {
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i2s_write_reg(dev->i2s_base, RCR(ch_reg), xfer_resolution);
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i2s_write_reg(dev->i2s_base, RFCR(ch_reg), 0x07);
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irq = i2s_read_reg(dev->i2s_base, IMR(ch_reg));
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i2s_write_reg(dev->i2s_base, IMR(ch_reg), irq & ~0x03);
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i2s_write_reg(dev->i2s_base, RER(ch_reg), 1);
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}
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i2s_write_reg(dev->i2s_base, CCR, ccr);
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config->sample_rate = params_rate(params);
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if (!dev->i2s_clk_cfg)
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return -EINVAL;
|
||||||
|
|
||||||
|
ret = dev->i2s_clk_cfg(config);
|
||||||
|
if (ret < 0) {
|
||||||
|
dev_err(dev->dev, "runtime audio clk config fail\n");
|
||||||
|
return ret;
|
||||||
|
}
|
||||||
|
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
static void dw_i2s_shutdown(struct snd_pcm_substream *substream,
|
||||||
|
struct snd_soc_dai *dai)
|
||||||
|
{
|
||||||
|
snd_soc_dai_set_dma_data(dai, substream, NULL);
|
||||||
|
}
|
||||||
|
|
||||||
|
static int dw_i2s_trigger(struct snd_pcm_substream *substream,
|
||||||
|
int cmd, struct snd_soc_dai *dai)
|
||||||
|
{
|
||||||
|
struct dw_i2s_dev *dev = snd_soc_dai_get_drvdata(dai);
|
||||||
|
int ret = 0;
|
||||||
|
|
||||||
|
switch (cmd) {
|
||||||
|
case SNDRV_PCM_TRIGGER_START:
|
||||||
|
case SNDRV_PCM_TRIGGER_RESUME:
|
||||||
|
case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
|
||||||
|
dev->active++;
|
||||||
|
i2s_start(dev, substream);
|
||||||
|
break;
|
||||||
|
|
||||||
|
case SNDRV_PCM_TRIGGER_STOP:
|
||||||
|
case SNDRV_PCM_TRIGGER_SUSPEND:
|
||||||
|
case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
|
||||||
|
dev->active--;
|
||||||
|
i2s_stop(dev, substream);
|
||||||
|
break;
|
||||||
|
default:
|
||||||
|
ret = -EINVAL;
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
return ret;
|
||||||
|
}
|
||||||
|
|
||||||
|
static struct snd_soc_dai_ops dw_i2s_dai_ops = {
|
||||||
|
.startup = dw_i2s_startup,
|
||||||
|
.shutdown = dw_i2s_shutdown,
|
||||||
|
.hw_params = dw_i2s_hw_params,
|
||||||
|
.trigger = dw_i2s_trigger,
|
||||||
|
};
|
||||||
|
|
||||||
|
#ifdef CONFIG_PM
|
||||||
|
|
||||||
|
static int dw_i2s_suspend(struct snd_soc_dai *dai)
|
||||||
|
{
|
||||||
|
struct dw_i2s_dev *dev = snd_soc_dai_get_drvdata(dai);
|
||||||
|
|
||||||
|
clk_disable(dev->clk);
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
static int dw_i2s_resume(struct snd_soc_dai *dai)
|
||||||
|
{
|
||||||
|
struct dw_i2s_dev *dev = snd_soc_dai_get_drvdata(dai);
|
||||||
|
|
||||||
|
clk_enable(dev->clk);
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
#else
|
||||||
|
#define dw_i2s_suspend NULL
|
||||||
|
#define dw_i2s_resume NULL
|
||||||
|
#endif
|
||||||
|
|
||||||
|
static int dw_i2s_probe(struct platform_device *pdev)
|
||||||
|
{
|
||||||
|
const struct i2s_platform_data *pdata = pdev->dev.platform_data;
|
||||||
|
struct dw_i2s_dev *dev;
|
||||||
|
struct resource *res;
|
||||||
|
int ret;
|
||||||
|
unsigned int cap;
|
||||||
|
struct snd_soc_dai_driver *dw_i2s_dai;
|
||||||
|
|
||||||
|
if (!pdata) {
|
||||||
|
dev_err(&pdev->dev, "Invalid platform data\n");
|
||||||
|
return -EINVAL;
|
||||||
|
}
|
||||||
|
|
||||||
|
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
||||||
|
if (!res) {
|
||||||
|
dev_err(&pdev->dev, "no i2s resource defined\n");
|
||||||
|
return -ENODEV;
|
||||||
|
}
|
||||||
|
|
||||||
|
if (!devm_request_mem_region(&pdev->dev, res->start,
|
||||||
|
resource_size(res), pdev->name)) {
|
||||||
|
dev_err(&pdev->dev, "i2s region already claimed\n");
|
||||||
|
return -EBUSY;
|
||||||
|
}
|
||||||
|
|
||||||
|
dev = devm_kzalloc(&pdev->dev, sizeof(*dev), GFP_KERNEL);
|
||||||
|
if (!dev) {
|
||||||
|
dev_warn(&pdev->dev, "kzalloc fail\n");
|
||||||
|
return -ENOMEM;
|
||||||
|
}
|
||||||
|
|
||||||
|
dev->i2s_base = devm_ioremap(&pdev->dev, res->start,
|
||||||
|
resource_size(res));
|
||||||
|
if (!dev->i2s_base) {
|
||||||
|
dev_err(&pdev->dev, "ioremap fail for i2s_region\n");
|
||||||
|
return -ENOMEM;
|
||||||
|
}
|
||||||
|
|
||||||
|
cap = pdata->cap;
|
||||||
|
dev->capability = cap;
|
||||||
|
dev->i2s_clk_cfg = pdata->i2s_clk_cfg;
|
||||||
|
|
||||||
|
/* Set DMA slaves info */
|
||||||
|
|
||||||
|
dev->play_dma_data.data = pdata->play_dma_data;
|
||||||
|
dev->capture_dma_data.data = pdata->capture_dma_data;
|
||||||
|
dev->play_dma_data.addr = res->start + I2S_TXDMA;
|
||||||
|
dev->capture_dma_data.addr = res->start + I2S_RXDMA;
|
||||||
|
dev->play_dma_data.max_burst = 16;
|
||||||
|
dev->capture_dma_data.max_burst = 16;
|
||||||
|
dev->play_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
|
||||||
|
dev->capture_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
|
||||||
|
dev->play_dma_data.filter = pdata->filter;
|
||||||
|
dev->capture_dma_data.filter = pdata->filter;
|
||||||
|
|
||||||
|
dev->clk = clk_get(&pdev->dev, NULL);
|
||||||
|
if (IS_ERR(dev->clk))
|
||||||
|
return PTR_ERR(dev->clk);
|
||||||
|
|
||||||
|
ret = clk_enable(dev->clk);
|
||||||
|
if (ret < 0)
|
||||||
|
goto err_clk_put;
|
||||||
|
|
||||||
|
dw_i2s_dai = devm_kzalloc(&pdev->dev, sizeof(*dw_i2s_dai), GFP_KERNEL);
|
||||||
|
if (!dw_i2s_dai) {
|
||||||
|
dev_err(&pdev->dev, "mem allocation failed for dai driver\n");
|
||||||
|
ret = -ENOMEM;
|
||||||
|
goto err_clk_disable;
|
||||||
|
}
|
||||||
|
|
||||||
|
if (cap & DWC_I2S_PLAY) {
|
||||||
|
dev_dbg(&pdev->dev, " SPEAr: play supported\n");
|
||||||
|
dw_i2s_dai->playback.channels_min = MIN_CHANNEL_NUM;
|
||||||
|
dw_i2s_dai->playback.channels_max = pdata->channel;
|
||||||
|
dw_i2s_dai->playback.formats = pdata->snd_fmts;
|
||||||
|
dw_i2s_dai->playback.rates = pdata->snd_rates;
|
||||||
|
}
|
||||||
|
|
||||||
|
if (cap & DWC_I2S_RECORD) {
|
||||||
|
dev_dbg(&pdev->dev, "SPEAr: record supported\n");
|
||||||
|
dw_i2s_dai->capture.channels_min = MIN_CHANNEL_NUM;
|
||||||
|
dw_i2s_dai->capture.channels_max = pdata->channel;
|
||||||
|
dw_i2s_dai->capture.formats = pdata->snd_fmts;
|
||||||
|
dw_i2s_dai->capture.rates = pdata->snd_rates;
|
||||||
|
}
|
||||||
|
|
||||||
|
dw_i2s_dai->ops = &dw_i2s_dai_ops;
|
||||||
|
dw_i2s_dai->suspend = dw_i2s_suspend;
|
||||||
|
dw_i2s_dai->resume = dw_i2s_resume;
|
||||||
|
|
||||||
|
dev->dev = &pdev->dev;
|
||||||
|
dev_set_drvdata(&pdev->dev, dev);
|
||||||
|
ret = snd_soc_register_dai(&pdev->dev, dw_i2s_dai);
|
||||||
|
if (ret != 0) {
|
||||||
|
dev_err(&pdev->dev, "not able to register dai\n");
|
||||||
|
goto err_set_drvdata;
|
||||||
|
}
|
||||||
|
|
||||||
|
return 0;
|
||||||
|
|
||||||
|
err_set_drvdata:
|
||||||
|
dev_set_drvdata(&pdev->dev, NULL);
|
||||||
|
err_clk_disable:
|
||||||
|
clk_disable(dev->clk);
|
||||||
|
err_clk_put:
|
||||||
|
clk_put(dev->clk);
|
||||||
|
return ret;
|
||||||
|
}
|
||||||
|
|
||||||
|
static int dw_i2s_remove(struct platform_device *pdev)
|
||||||
|
{
|
||||||
|
struct dw_i2s_dev *dev = dev_get_drvdata(&pdev->dev);
|
||||||
|
|
||||||
|
snd_soc_unregister_dai(&pdev->dev);
|
||||||
|
dev_set_drvdata(&pdev->dev, NULL);
|
||||||
|
|
||||||
|
clk_put(dev->clk);
|
||||||
|
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
static struct platform_driver dw_i2s_driver = {
|
||||||
|
.probe = dw_i2s_probe,
|
||||||
|
.remove = dw_i2s_remove,
|
||||||
|
.driver = {
|
||||||
|
.name = "designware-i2s",
|
||||||
|
.owner = THIS_MODULE,
|
||||||
|
},
|
||||||
|
};
|
||||||
|
|
||||||
|
module_platform_driver(dw_i2s_driver);
|
||||||
|
|
||||||
|
MODULE_AUTHOR("Rajeev Kumar <rajeev-dlh.kumar@st.com>");
|
||||||
|
MODULE_DESCRIPTION("DESIGNWARE I2S SoC Interface");
|
||||||
|
MODULE_LICENSE("GPL");
|
||||||
|
MODULE_ALIAS("platform:designware_i2s");
|
||||||
Loading…
Reference in New Issue