am53c974: add new driver
This patch adds a new implementation for the Tekram DC-390T / AMD AM53c974 SCSI controller, based on the generic esp_scsi infrastructure. Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Hannes Reinecke <hare@suse.de> Signed-off-by: Christoph Hellwig <hch@lst.de>
This commit is contained in:
Hannes Reinecke
Christoph Hellwig
parent
3170866f88
commit
3a7e7be2a9
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@ -1357,6 +1357,24 @@ config SCSI_DC390T
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To compile this driver as a module, choose M here: the
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module will be called tmscsim.
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config SCSI_AM53C974
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tristate "Tekram DC390(T) and Am53/79C974 SCSI support (new driver)"
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depends on PCI && SCSI
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select SCSI_SPI_ATTRS
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---help---
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This driver supports PCI SCSI host adapters based on the Am53C974A
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chip, e.g. Tekram DC390(T), DawiControl 2974 and some onboard
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PCscsi/PCnet (Am53/79C974) solutions.
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This is a new implementation base on the generic esp_scsi driver.
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Documentation can be found in <file:Documentation/scsi/tmscsim.txt>.
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Note that this driver does NOT support Tekram DC390W/U/F, which are
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based on NCR/Symbios chips. Use "NCR53C8XX SCSI support" for those.
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To compile this driver as a module, choose M here: the
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module will be called am53c974.
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config SCSI_T128
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tristate "Trantor T128/T128F/T228 SCSI support"
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depends on ISA && SCSI
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@ -101,6 +101,7 @@ obj-$(CONFIG_SCSI_7000FASST) += wd7000.o
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obj-$(CONFIG_SCSI_EATA) += eata.o
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obj-$(CONFIG_SCSI_DC395x) += dc395x.o
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obj-$(CONFIG_SCSI_DC390T) += tmscsim.o
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obj-$(CONFIG_SCSI_AM53C974) += esp_scsi.o am53c974.o
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obj-$(CONFIG_MEGARAID_LEGACY) += megaraid.o
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obj-$(CONFIG_MEGARAID_NEWGEN) += megaraid/
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obj-$(CONFIG_MEGARAID_SAS) += megaraid/
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@ -0,0 +1,537 @@
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/*
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* AMD am53c974 driver.
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* Copyright (c) 2014 Hannes Reinecke, SUSE Linux GmbH
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/delay.h>
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#include <linux/pci.h>
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#include <linux/interrupt.h>
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#include <scsi/scsi_host.h>
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#include "esp_scsi.h"
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#define DRV_MODULE_NAME "am53c974"
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#define DRV_MODULE_VERSION "1.00"
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static bool am53c974_debug;
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#define esp_dma_log(f, a...) \
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do { \
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if (am53c974_debug) \
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shost_printk(KERN_DEBUG, esp->host, f, ##a); \
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} while (0)
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#define ESP_DMA_CMD 0x10
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#define ESP_DMA_STC 0x11
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#define ESP_DMA_SPA 0x12
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#define ESP_DMA_WBC 0x13
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#define ESP_DMA_WAC 0x14
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#define ESP_DMA_STATUS 0x15
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#define ESP_DMA_SMDLA 0x16
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#define ESP_DMA_WMAC 0x17
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#define ESP_DMA_CMD_IDLE 0x00
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#define ESP_DMA_CMD_BLAST 0x01
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#define ESP_DMA_CMD_ABORT 0x02
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#define ESP_DMA_CMD_START 0x03
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#define ESP_DMA_CMD_MASK 0x03
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#define ESP_DMA_CMD_DIAG 0x04
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#define ESP_DMA_CMD_MDL 0x10
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#define ESP_DMA_CMD_INTE_P 0x20
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#define ESP_DMA_CMD_INTE_D 0x40
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#define ESP_DMA_CMD_DIR 0x80
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#define ESP_DMA_STAT_PWDN 0x01
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#define ESP_DMA_STAT_ERROR 0x02
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#define ESP_DMA_STAT_ABORT 0x04
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#define ESP_DMA_STAT_DONE 0x08
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#define ESP_DMA_STAT_SCSIINT 0x10
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#define ESP_DMA_STAT_BCMPLT 0x20
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/* EEPROM is accessed with 16-bit values */
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#define DC390_EEPROM_READ 0x80
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#define DC390_EEPROM_LEN 0x40
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/*
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* DC390 EEPROM
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*
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* 8 * 4 bytes of per-device options
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* followed by HBA specific options
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*/
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/* Per-device options */
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#define DC390_EE_MODE1 0x00
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#define DC390_EE_SPEED 0x01
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/* HBA-specific options */
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#define DC390_EE_ADAPT_SCSI_ID 0x40
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#define DC390_EE_MODE2 0x41
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#define DC390_EE_DELAY 0x42
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#define DC390_EE_TAG_CMD_NUM 0x43
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#define DC390_EE_MODE1_PARITY_CHK 0x01
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#define DC390_EE_MODE1_SYNC_NEGO 0x02
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#define DC390_EE_MODE1_EN_DISC 0x04
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#define DC390_EE_MODE1_SEND_START 0x08
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#define DC390_EE_MODE1_TCQ 0x10
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#define DC390_EE_MODE2_MORE_2DRV 0x01
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#define DC390_EE_MODE2_GREATER_1G 0x02
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#define DC390_EE_MODE2_RST_SCSI_BUS 0x04
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#define DC390_EE_MODE2_ACTIVE_NEGATION 0x08
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#define DC390_EE_MODE2_NO_SEEK 0x10
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#define DC390_EE_MODE2_LUN_CHECK 0x20
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struct pci_esp_priv {
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struct esp *esp;
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u8 dma_status;
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};
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static void pci_esp_dma_drain(struct esp *esp);
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static inline struct pci_esp_priv *pci_esp_get_priv(struct esp *esp)
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{
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struct pci_dev *pdev = esp->dev;
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return pci_get_drvdata(pdev);
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}
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static void pci_esp_write8(struct esp *esp, u8 val, unsigned long reg)
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{
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iowrite8(val, esp->regs + (reg * 4UL));
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}
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static u8 pci_esp_read8(struct esp *esp, unsigned long reg)
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{
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return ioread8(esp->regs + (reg * 4UL));
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}
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static void pci_esp_write32(struct esp *esp, u32 val, unsigned long reg)
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{
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return iowrite32(val, esp->regs + (reg * 4UL));
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}
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static dma_addr_t pci_esp_map_single(struct esp *esp, void *buf,
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size_t sz, int dir)
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{
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return pci_map_single(esp->dev, buf, sz, dir);
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}
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static int pci_esp_map_sg(struct esp *esp, struct scatterlist *sg,
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int num_sg, int dir)
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{
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return pci_map_sg(esp->dev, sg, num_sg, dir);
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}
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static void pci_esp_unmap_single(struct esp *esp, dma_addr_t addr,
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size_t sz, int dir)
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{
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pci_unmap_single(esp->dev, addr, sz, dir);
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}
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static void pci_esp_unmap_sg(struct esp *esp, struct scatterlist *sg,
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int num_sg, int dir)
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{
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pci_unmap_sg(esp->dev, sg, num_sg, dir);
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}
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static int pci_esp_irq_pending(struct esp *esp)
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{
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struct pci_esp_priv *pep = pci_esp_get_priv(esp);
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pep->dma_status = pci_esp_read8(esp, ESP_DMA_STATUS);
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esp_dma_log("dma intr dreg[%02x]\n", pep->dma_status);
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if (pep->dma_status & (ESP_DMA_STAT_ERROR |
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ESP_DMA_STAT_ABORT |
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ESP_DMA_STAT_DONE |
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ESP_DMA_STAT_SCSIINT))
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return 1;
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return 0;
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}
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static void pci_esp_reset_dma(struct esp *esp)
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{
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/* Nothing to do ? */
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}
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static void pci_esp_dma_drain(struct esp *esp)
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{
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u8 resid;
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int lim = 1000;
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if ((esp->sreg & ESP_STAT_PMASK) == ESP_DOP ||
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(esp->sreg & ESP_STAT_PMASK) == ESP_DIP)
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/* Data-In or Data-Out, nothing to be done */
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return;
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while (--lim > 0) {
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resid = pci_esp_read8(esp, ESP_FFLAGS) & ESP_FF_FBYTES;
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if (resid <= 1)
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break;
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cpu_relax();
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}
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if (resid > 1) {
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/* FIFO not cleared */
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shost_printk(KERN_INFO, esp->host,
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"FIFO not cleared, %d bytes left\n",
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resid);
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}
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/*
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* When there is a residual BCMPLT will never be set
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* (obviously). But we still have to issue the BLAST
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* command, otherwise the data will not being transferred.
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* But we'll never know when the BLAST operation is
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* finished. So check for some time and give up eventually.
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*/
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lim = 1000;
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pci_esp_write8(esp, ESP_DMA_CMD_DIR | ESP_DMA_CMD_BLAST, ESP_DMA_CMD);
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while (pci_esp_read8(esp, ESP_DMA_STATUS) & ESP_DMA_STAT_BCMPLT) {
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if (--lim == 0)
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break;
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cpu_relax();
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}
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pci_esp_write8(esp, ESP_DMA_CMD_DIR | ESP_DMA_CMD_IDLE, ESP_DMA_CMD);
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esp_dma_log("DMA blast done (%d tries, %d bytes left)\n", lim, resid);
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}
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static void pci_esp_dma_invalidate(struct esp *esp)
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{
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struct pci_esp_priv *pep = pci_esp_get_priv(esp);
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esp_dma_log("invalidate DMA\n");
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pci_esp_write8(esp, ESP_DMA_CMD_IDLE, ESP_DMA_CMD);
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pep->dma_status = 0;
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}
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static int pci_esp_dma_error(struct esp *esp)
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{
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struct pci_esp_priv *pep = pci_esp_get_priv(esp);
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if (pep->dma_status & ESP_DMA_STAT_ERROR) {
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u8 dma_cmd = pci_esp_read8(esp, ESP_DMA_CMD);
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if ((dma_cmd & ESP_DMA_CMD_MASK) == ESP_DMA_CMD_START)
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pci_esp_write8(esp, ESP_DMA_CMD_ABORT, ESP_DMA_CMD);
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return 1;
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}
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if (pep->dma_status & ESP_DMA_STAT_ABORT) {
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pci_esp_write8(esp, ESP_DMA_CMD_IDLE, ESP_DMA_CMD);
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pep->dma_status = pci_esp_read8(esp, ESP_DMA_CMD);
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return 1;
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}
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return 0;
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}
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static void pci_esp_send_dma_cmd(struct esp *esp, u32 addr, u32 esp_count,
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u32 dma_count, int write, u8 cmd)
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{
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struct pci_esp_priv *pep = pci_esp_get_priv(esp);
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u32 val = 0;
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BUG_ON(!(cmd & ESP_CMD_DMA));
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pep->dma_status = 0;
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/* Set DMA engine to IDLE */
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if (write)
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/* DMA write direction logic is inverted */
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val |= ESP_DMA_CMD_DIR;
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pci_esp_write8(esp, ESP_DMA_CMD_IDLE | val, ESP_DMA_CMD);
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pci_esp_write8(esp, (esp_count >> 0) & 0xff, ESP_TCLOW);
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pci_esp_write8(esp, (esp_count >> 8) & 0xff, ESP_TCMED);
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pci_esp_write32(esp, esp_count, ESP_DMA_STC);
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pci_esp_write32(esp, addr, ESP_DMA_SPA);
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esp_dma_log("start dma addr[%x] count[%d:%d]\n",
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addr, esp_count, dma_count);
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scsi_esp_cmd(esp, cmd);
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/* Send DMA Start command */
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pci_esp_write8(esp, ESP_DMA_CMD_START | val, ESP_DMA_CMD);
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}
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static const struct esp_driver_ops pci_esp_ops = {
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.esp_write8 = pci_esp_write8,
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.esp_read8 = pci_esp_read8,
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.map_single = pci_esp_map_single,
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.map_sg = pci_esp_map_sg,
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.unmap_single = pci_esp_unmap_single,
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.unmap_sg = pci_esp_unmap_sg,
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.irq_pending = pci_esp_irq_pending,
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.reset_dma = pci_esp_reset_dma,
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.dma_drain = pci_esp_dma_drain,
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.dma_invalidate = pci_esp_dma_invalidate,
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.send_dma_cmd = pci_esp_send_dma_cmd,
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.dma_error = pci_esp_dma_error,
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};
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/*
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* Read DC-390 eeprom
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*/
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static void dc390_eeprom_prepare_read(struct pci_dev *pdev, u8 cmd)
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{
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u8 carry_flag = 1, j = 0x80, bval;
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int i;
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for (i = 0; i < 9; i++) {
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if (carry_flag) {
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pci_write_config_byte(pdev, 0x80, 0x40);
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bval = 0xc0;
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} else
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bval = 0x80;
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udelay(160);
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pci_write_config_byte(pdev, 0x80, bval);
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udelay(160);
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pci_write_config_byte(pdev, 0x80, 0);
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udelay(160);
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carry_flag = (cmd & j) ? 1 : 0;
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j >>= 1;
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}
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}
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static u16 dc390_eeprom_get_data(struct pci_dev *pdev)
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{
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int i;
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u16 wval = 0;
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u8 bval;
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for (i = 0; i < 16; i++) {
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wval <<= 1;
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pci_write_config_byte(pdev, 0x80, 0x80);
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udelay(160);
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pci_write_config_byte(pdev, 0x80, 0x40);
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udelay(160);
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pci_read_config_byte(pdev, 0x00, &bval);
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if (bval == 0x22)
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wval |= 1;
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}
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return wval;
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}
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static void dc390_read_eeprom(struct pci_dev *pdev, u16 *ptr)
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{
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u8 cmd = DC390_EEPROM_READ, i;
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for (i = 0; i < DC390_EEPROM_LEN; i++) {
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pci_write_config_byte(pdev, 0xc0, 0);
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udelay(160);
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dc390_eeprom_prepare_read(pdev, cmd++);
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*ptr++ = dc390_eeprom_get_data(pdev);
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pci_write_config_byte(pdev, 0x80, 0);
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pci_write_config_byte(pdev, 0x80, 0);
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udelay(160);
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}
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}
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static void dc390_check_eeprom(struct esp *esp)
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{
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u8 EEbuf[128];
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u16 *ptr = (u16 *)EEbuf, wval = 0;
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int i;
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dc390_read_eeprom((struct pci_dev *)esp->dev, ptr);
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for (i = 0; i < DC390_EEPROM_LEN; i++, ptr++)
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wval += *ptr;
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/* no Tekram EEprom found */
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if (wval != 0x1234) {
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struct pci_dev *pdev = esp->dev;
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dev_printk(KERN_INFO, &pdev->dev,
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"No valid Tekram EEprom found\n");
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return;
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}
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esp->scsi_id = EEbuf[DC390_EE_ADAPT_SCSI_ID];
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esp->num_tags = 2 << EEbuf[DC390_EE_TAG_CMD_NUM];
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}
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static int pci_esp_probe_one(struct pci_dev *pdev,
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const struct pci_device_id *id)
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{
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struct scsi_host_template *hostt = &scsi_esp_template;
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int err = -ENODEV;
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struct Scsi_Host *shost;
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struct esp *esp;
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struct pci_esp_priv *pep;
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if (pci_enable_device(pdev)) {
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dev_printk(KERN_INFO, &pdev->dev, "cannot enable device\n");
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return -ENODEV;
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}
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if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32))) {
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dev_printk(KERN_INFO, &pdev->dev,
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"failed to set 32bit DMA mask\n");
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goto fail_disable_device;
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}
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shost = scsi_host_alloc(hostt, sizeof(struct esp));
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if (!shost) {
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dev_printk(KERN_INFO, &pdev->dev,
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"failed to allocate scsi host\n");
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err = -ENOMEM;
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goto fail_disable_device;
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}
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pep = kzalloc(sizeof(struct pci_esp_priv), GFP_KERNEL);
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if (!pep) {
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dev_printk(KERN_INFO, &pdev->dev,
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"failed to allocate esp_priv\n");
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err = -ENOMEM;
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goto fail_host_alloc;
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}
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esp = shost_priv(shost);
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esp->host = shost;
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esp->dev = pdev;
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esp->ops = &pci_esp_ops;
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/*
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* The am53c974 HBA has a design flaw of generating
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* spurious DMA completion interrupts when using
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* DMA for command submission.
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*/
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esp->flags |= ESP_FLAG_USE_FIFO;
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pep->esp = esp;
|
||||
|
||||
if (pci_request_regions(pdev, DRV_MODULE_NAME)) {
|
||||
dev_printk(KERN_ERR, &pdev->dev,
|
||||
"pci memory selection failed\n");
|
||||
goto fail_priv_alloc;
|
||||
}
|
||||
|
||||
esp->regs = pci_iomap(pdev, 0, pci_resource_len(pdev, 0));
|
||||
if (!esp->regs) {
|
||||
dev_printk(KERN_ERR, &pdev->dev, "pci I/O map failed\n");
|
||||
err = -EINVAL;
|
||||
goto fail_release_regions;
|
||||
}
|
||||
esp->dma_regs = esp->regs;
|
||||
|
||||
pci_set_master(pdev);
|
||||
|
||||
esp->command_block = pci_alloc_consistent(pdev, 16,
|
||||
&esp->command_block_dma);
|
||||
if (!esp->command_block) {
|
||||
dev_printk(KERN_ERR, &pdev->dev,
|
||||
"failed to allocate command block\n");
|
||||
err = -ENOMEM;
|
||||
goto fail_unmap_regs;
|
||||
}
|
||||
|
||||
err = request_irq(pdev->irq, scsi_esp_intr, IRQF_SHARED,
|
||||
DRV_MODULE_NAME, esp);
|
||||
if (err < 0) {
|
||||
dev_printk(KERN_ERR, &pdev->dev, "failed to register IRQ\n");
|
||||
goto fail_unmap_command_block;
|
||||
}
|
||||
|
||||
esp->scsi_id = 7;
|
||||
dc390_check_eeprom(esp);
|
||||
|
||||
shost->this_id = esp->scsi_id;
|
||||
shost->max_id = 8;
|
||||
shost->irq = pdev->irq;
|
||||
shost->io_port = pci_resource_start(pdev, 0);
|
||||
shost->n_io_port = pci_resource_len(pdev, 0);
|
||||
shost->unique_id = shost->io_port;
|
||||
esp->scsi_id_mask = (1 << esp->scsi_id);
|
||||
/* Assume 40MHz clock */
|
||||
esp->cfreq = 40000000;
|
||||
|
||||
pci_set_drvdata(pdev, pep);
|
||||
|
||||
err = scsi_esp_register(esp, &pdev->dev);
|
||||
if (err)
|
||||
goto fail_free_irq;
|
||||
|
||||
return 0;
|
||||
|
||||
fail_free_irq:
|
||||
free_irq(pdev->irq, esp);
|
||||
fail_unmap_command_block:
|
||||
pci_free_consistent(pdev, 16, esp->command_block,
|
||||
esp->command_block_dma);
|
||||
fail_unmap_regs:
|
||||
pci_iounmap(pdev, esp->regs);
|
||||
fail_release_regions:
|
||||
pci_release_regions(pdev);
|
||||
fail_priv_alloc:
|
||||
kfree(pep);
|
||||
fail_host_alloc:
|
||||
scsi_host_put(shost);
|
||||
fail_disable_device:
|
||||
pci_disable_device(pdev);
|
||||
|
||||
return err;
|
||||
}
|
||||
|
||||
static void pci_esp_remove_one(struct pci_dev *pdev)
|
||||
{
|
||||
struct pci_esp_priv *pep = pci_get_drvdata(pdev);
|
||||
struct esp *esp = pep->esp;
|
||||
|
||||
scsi_esp_unregister(esp);
|
||||
free_irq(pdev->irq, esp);
|
||||
pci_free_consistent(pdev, 16, esp->command_block,
|
||||
esp->command_block_dma);
|
||||
pci_iounmap(pdev, esp->regs);
|
||||
pci_release_regions(pdev);
|
||||
pci_disable_device(pdev);
|
||||
kfree(pep);
|
||||
|
||||
scsi_host_put(esp->host);
|
||||
}
|
||||
|
||||
static struct pci_device_id am53c974_pci_tbl[] = {
|
||||
{ PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_SCSI,
|
||||
PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
|
||||
{ }
|
||||
};
|
||||
MODULE_DEVICE_TABLE(pci, am53c974_pci_tbl);
|
||||
|
||||
static struct pci_driver am53c974_driver = {
|
||||
.name = DRV_MODULE_NAME,
|
||||
.id_table = am53c974_pci_tbl,
|
||||
.probe = pci_esp_probe_one,
|
||||
.remove = pci_esp_remove_one,
|
||||
};
|
||||
|
||||
static int __init am53c974_module_init(void)
|
||||
{
|
||||
return pci_register_driver(&am53c974_driver);
|
||||
}
|
||||
|
||||
static void __exit am53c974_module_exit(void)
|
||||
{
|
||||
pci_unregister_driver(&am53c974_driver);
|
||||
}
|
||||
|
||||
MODULE_DESCRIPTION("AM53C974 SCSI driver");
|
||||
MODULE_AUTHOR("Hannes Reinecke <hare@suse.de>");
|
||||
MODULE_LICENSE("GPL");
|
||||
MODULE_VERSION(DRV_MODULE_VERSION);
|
||||
|
||||
module_param(am53c974_debug, bool, 0644);
|
||||
MODULE_PARM_DESC(am53c974_debug, "Enable debugging");
|
||||
|
||||
module_init(am53c974_module_init);
|
||||
module_exit(am53c974_module_exit);
|
||||
Loading…
Reference in New Issue