Staging: rtl8192su: remove RTL8192SU_USE_PARAM_TXPWR ifdefs
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
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@ -12,7 +12,6 @@ EXTRA_CFLAGS += -DRTL8190_Download_Firmware_From_Header=1
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EXTRA_CFLAGS += -DRTL8192S_PREPARE_FOR_NORMAL_RELEASE
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EXTRA_CFLAGS += -DRTL8192S_PREPARE_FOR_NORMAL_RELEASE
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EXTRA_CFLAGS += -DRTL8192SU_DISABLE_IQK=1
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EXTRA_CFLAGS += -DRTL8192SU_DISABLE_IQK=1
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EXTRA_CFLAGS += -DRTL8192SU_USE_PARAM_TXPWR=0
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EXTRA_CFLAGS += -DRTL8192SU_FPGA_UNSPECIFIED_NETWORK=0
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EXTRA_CFLAGS += -DRTL8192SU_FPGA_UNSPECIFIED_NETWORK=0
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#EXTRA_CFLAGS += -DRTL8192SU_FPGA_2MAC_VERIFICATION #=0
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#EXTRA_CFLAGS += -DRTL8192SU_FPGA_2MAC_VERIFICATION #=0
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EXTRA_CFLAGS += -DRTL8192SU_ASIC_VERIFICATION
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EXTRA_CFLAGS += -DRTL8192SU_ASIC_VERIFICATION
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@ -5513,12 +5513,7 @@ rtl8192SU_ReadAdapterInfo8192SUsb(struct net_device* dev)
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else
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else
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{
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{
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priv->AutoloadFailFlag=FALSE;
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priv->AutoloadFailFlag=FALSE;
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#if RTL8192SU_USE_PARAM_TXPWR
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priv->bTXPowerDataReadFromEEPORM = FALSE;
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#else
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priv->bTXPowerDataReadFromEEPORM = TRUE;
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priv->bTXPowerDataReadFromEEPORM = TRUE;
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#endif
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}
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}
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// Read IC Version && Channel Plan
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// Read IC Version && Channel Plan
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if(!priv->AutoloadFailFlag)
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if(!priv->AutoloadFailFlag)
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