DM9000: Fix delays used by EEPROM read and write
The code was using a delay of 8ms, when it should have been using the EEPROM status flag from the device to indicate the EEPROM transaction had finished. Signed-off-by: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Jeff Garzik <jeff@garzik.org>
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@ -1048,6 +1048,50 @@ dm9000_rx(struct net_device *dev)
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} while (rxbyte == DM9000_PKT_RDY);
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}
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static unsigned int
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dm9000_read_locked(board_info_t *db, int reg)
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{
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unsigned long flags;
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unsigned int ret;
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spin_lock_irqsave(&db->lock, flags);
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ret = ior(db, reg);
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spin_unlock_irqrestore(&db->lock, flags);
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return ret;
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}
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static int dm9000_wait_eeprom(board_info_t *db)
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{
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unsigned int status;
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int timeout = 8; /* wait max 8msec */
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/* The DM9000 data sheets say we should be able to
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* poll the ERRE bit in EPCR to wait for the EEPROM
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* operation. From testing several chips, this bit
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* does not seem to work.
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*
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* We attempt to use the bit, but fall back to the
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* timeout (which is why we do not return an error
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* on expiry) to say that the EEPROM operation has
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* completed.
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*/
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while (1) {
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status = dm9000_read_locked(db, DM9000_EPCR);
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if ((status & EPCR_ERRE) == 0)
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break;
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if (timeout-- < 0) {
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dev_dbg(db->dev, "timeout waiting EEPROM\n");
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break;
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}
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}
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return 0;
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}
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/*
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* Read a word data from EEPROM
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*/
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@ -1065,8 +1109,10 @@ dm9000_read_eeprom(board_info_t *db, int offset, u8 *to)
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spin_unlock_irqrestore(&db->lock, flags);
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mdelay(8); /* according to the datasheet 200us should be enough,
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but it doesn't work */
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dm9000_wait_eeprom(db);
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/* delay for at-least 150uS */
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msleep(1);
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spin_lock_irqsave(&db->lock, flags);
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@ -1097,7 +1143,9 @@ dm9000_write_eeprom(board_info_t *db, int offset, u8 *data)
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iow(db, DM9000_EPCR, EPCR_WEP | EPCR_ERPRW);
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spin_unlock_irqrestore(&db->lock, flags);
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mdelay(8); /* same shit */
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dm9000_wait_eeprom(db);
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mdelay(1); /* wait at least 150uS to clear */
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spin_lock_irqsave(&db->lock, flags);
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iow(db, DM9000_EPCR, 0);
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