Nuvoton WPCM450 BMC SoC

This adds basic support for the Nuvoton WPCM450 BMC SoC. It's an older
 SoC but still commonly found on eBay, mostly in Supermicro X9 server
 boards.
 
 Third-party documentation is available at: https://github.com/neuschaefer/wpcm450/wiki
 
 The code has been contributed by Jonathan Neuschäfer who has also
 stepped forward to maintain the soc.
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Merge tag 'bmc-5.13-wpcm450' of git://git.kernel.org/pub/scm/linux/kernel/git/joel/bmc into arm/newsoc

Nuvoton WPCM450 BMC SoC

This adds basic support for the Nuvoton WPCM450 BMC SoC. It's an older
SoC but still commonly found on eBay, mostly in Supermicro X9 server
boards.

Third-party documentation is available at: https://github.com/neuschaefer/wpcm450/wiki

The code has been contributed by Jonathan Neuschäfer who has also
stepped forward to maintain the soc.

* tag 'bmc-5.13-wpcm450' of git://git.kernel.org/pub/scm/linux/kernel/git/joel/bmc:
  ARM: config: Add WPCM to multi v5
  MAINTAINERS: Add entry for Nuvoton WPCM450
  ARM: dts: Add devicetree for Supermicro X9SCi-LN4F based on WPCM450
  ARM: dts: Add devicetree for Nuvoton WPCM450 BMC chip
  watchdog: npcm: Add support for WPCM450
  ARM: npcm: Introduce Nuvoton WPCM450 SoC
  dt-bindings: watchdog: npcm: Add nuvoton,wpcm450-wdt
  dt-bindings: arm: npcm: Add nuvoton,wpcm450 compatible string
  dt-bindings: vendor-prefixes: Add Supermicro
  ARM: dts: Add board-specific compatible string to npcm750-evb devicetree
  dt-bindings: arm: Convert nuvoton,npcm750 binding to YAML

Link: https://lore.kernel.org/r/CACPK8Xdj20TcJckH8fx757ACa4hT4j3bZEctT0Przjv8XJd7KA@mail.gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann 2021-04-09 09:02:55 +02:00
commit 39b95079f6
14 changed files with 190 additions and 9 deletions

View File

@ -1,6 +0,0 @@
NPCM Platforms Device Tree Bindings
-----------------------------------
NPCM750 SoC
Required root node properties:
- compatible = "nuvoton,npcm750";

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@ -0,0 +1,29 @@
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/arm/npcm/npcm.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: NPCM Platforms Device Tree Bindings
maintainers:
- Jonathan Neuschäfer <j.neuschaefer@gmx.net>
properties:
$nodename:
const: '/'
compatible:
oneOf:
- description: WPCM450 based boards
items:
- enum:
- supermicro,x9sci-ln4f-bmc # Supermicro X9SCI-LN4F server's BMC
- const: nuvoton,wpcm450
- description: NPCM750 based boards
items:
- enum:
- nuvoton,npcm750-evb # NPCM750 evaluation board
- const: nuvoton,npcm750
additionalProperties: true

View File

@ -1085,6 +1085,8 @@ patternProperties:
description: Shenzhen Sunchip Technology Co., Ltd
"^SUNW,.*":
description: Sun Microsystems, Inc
"^supermicro,.*":
description: Super Micro Computer, Inc.
"^silvaco,.*":
description: Silvaco, Inc.
"^swir,.*":

View File

@ -5,7 +5,8 @@ The watchdog supports a pre-timeout interrupt that fires 10ms before the
expiry.
Required properties:
- compatible : "nuvoton,npcm750-wdt" for NPCM750 (Poleg).
- compatible : "nuvoton,npcm750-wdt" for NPCM750 (Poleg), or
"nuvoton,wpcm450-wdt" for WPCM450 (Hermon).
- reg : Offset and length of the register set for the device.
- interrupts : Contain the timer interrupt with flags for
falling edge.

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@ -2194,6 +2194,15 @@ F: drivers/*/*npcm*
F: drivers/*/*/*npcm*
F: include/dt-bindings/clock/nuvoton,npcm7xx-clock.h
ARM/NUVOTON WPCM450 ARCHITECTURE
M: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
L: openbmc@lists.ozlabs.org (moderated for non-subscribers)
S: Maintained
F: Documentation/devicetree/bindings/*/*wpcm*
F: arch/arm/boot/dts/nuvoton-wpcm450*
F: arch/arm/mach-npcm/wpcm450.c
F: drivers/*/*wpcm*
ARM/OPENMOKO NEO FREERUNNER (GTA02) MACHINE SUPPORT
L: openmoko-kernel@lists.openmoko.org (subscribers-only)
S: Orphan

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@ -333,6 +333,8 @@ dtb-$(CONFIG_ARCH_LPC18XX) += \
dtb-$(CONFIG_ARCH_LPC32XX) += \
lpc3250-ea3250.dtb \
lpc3250-phy3250.dtb
dtb-$(CONFIG_ARCH_WPCM450) += \
nuvoton-wpcm450-supermicro-x9sci-ln4f.dtb
dtb-$(CONFIG_ARCH_NPCM7XX) += \
nuvoton-npcm730-gsj.dtb \
nuvoton-npcm730-kudo.dtb \

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@ -9,7 +9,7 @@
/ {
model = "Nuvoton npcm750 Development Board (Device Tree)";
compatible = "nuvoton,npcm750";
compatible = "nuvoton,npcm750-evb", "nuvoton,npcm750";
aliases {
ethernet2 = &gmac0;

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@ -0,0 +1,40 @@
// SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
// Copyright 2021 Jonathan Neuschäfer
/dts-v1/;
/* The last 16 MiB are dedicated to the GPU */
/memreserve/ 0x07000000 0x01000000;
#include "nuvoton-wpcm450.dtsi"
/ {
model = "Supermicro X9SCi-LN4F BMC";
compatible = "supermicro,x9sci-ln4f-bmc", "nuvoton,wpcm450";
chosen {
stdout-path = "serial0:115200n8";
};
memory@0 {
device_type = "memory";
reg = <0 0x08000000>; /* 128 MiB */
};
};
&serial0 {
/*
* Debug serial port. TX is exposed on the right pad of unpopulated
* resistor R1247, RX on the right pad of R1162.
*/
status = "okay";
};
&serial1 {
/* "Serial over LAN" port. Connected to ttyS2 of the host system. */
status = "okay";
};
&watchdog0 {
status = "okay";
};

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@ -0,0 +1,76 @@
// SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
// Copyright 2021 Jonathan Neuschäfer
#include <dt-bindings/interrupt-controller/irq.h>
/ {
compatible = "nuvoton,wpcm450";
#address-cells = <1>;
#size-cells = <1>;
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu@0 {
compatible = "arm,arm926ej-s";
device_type = "cpu";
reg = <0>;
};
};
clk24m: clock-24mhz {
/* 24 MHz dummy clock */
compatible = "fixed-clock";
clock-frequency = <24000000>;
#clock-cells = <0>;
};
soc {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
interrupt-parent = <&aic>;
ranges;
serial0: serial@b8000000 {
compatible = "nuvoton,wpcm450-uart";
reg = <0xb8000000 0x20>;
reg-shift = <2>;
interrupts = <7 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk24m>;
status = "disabled";
};
serial1: serial@b8000100 {
compatible = "nuvoton,wpcm450-uart";
reg = <0xb8000100 0x20>;
reg-shift = <2>;
interrupts = <8 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk24m>;
status = "disabled";
};
timer0: timer@b8001000 {
compatible = "nuvoton,wpcm450-timer";
interrupts = <12 IRQ_TYPE_LEVEL_HIGH>;
reg = <0xb8001000 0x1c>;
clocks = <&clk24m>;
};
watchdog0: watchdog@b800101c {
compatible = "nuvoton,wpcm450-wdt";
interrupts = <1 IRQ_TYPE_LEVEL_HIGH>;
reg = <0xb800101c 0x4>;
clocks = <&clk24m>;
status = "disabled";
};
aic: interrupt-controller@b8002000 {
compatible = "nuvoton,wpcm450-aic";
reg = <0xb8002000 0x1000>;
interrupt-controller;
#interrupt-cells = <2>;
};
};
};

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@ -33,6 +33,8 @@ CONFIG_SOC_IMX25=y
CONFIG_SOC_IMX27=y
CONFIG_ARCH_MVEBU=y
CONFIG_MACH_KIRKWOOD=y
CONFIG_ARCH_NPCM=y
CONFIG_ARCH_WPCM450=y
CONFIG_ARCH_ORION5X=y
CONFIG_MACH_DB88F5281=y
CONFIG_MACH_RD88F5182=y
@ -178,6 +180,7 @@ CONFIG_THERMAL=y
CONFIG_KIRKWOOD_THERMAL=y
CONFIG_AT91SAM9X_WATCHDOG=y
CONFIG_ORION_WATCHDOG=y
CONFIG_NPCM7XX_WATCHDOG=y
CONFIG_IMX2_WDT=y
CONFIG_MFD_ATMEL_HLCDC=y
# CONFIG_ABX500_CORE is not set

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@ -1,11 +1,21 @@
# SPDX-License-Identifier: GPL-2.0-only
menuconfig ARCH_NPCM
bool "Nuvoton NPCM Architecture"
depends on ARCH_MULTI_V7
depends on ARCH_MULTI_V5 || ARCH_MULTI_V7
select PINCTRL
if ARCH_NPCM
config ARCH_WPCM450
bool "Support for WPCM450 BMC (Hermon)"
depends on ARCH_MULTI_V5
select CPU_ARM926T
select NPCM7XX_TIMER
help
General support for WPCM450 BMC (Hermon).
Winbond/Nuvoton WPCM450 BMC based on the ARM926EJ-S.
config ARCH_NPCM7XX
bool "Support for NPCM7xx BMC (Poleg)"
depends on ARCH_MULTI_V7

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@ -1,5 +1,6 @@
# SPDX-License-Identifier: GPL-2.0-only
AFLAGS_headsmp.o += -march=armv7-a
obj-$(CONFIG_ARCH_WPCM450) += wpcm450.o
obj-$(CONFIG_ARCH_NPCM7XX) += npcm7xx.o
obj-$(CONFIG_SMP) += platsmp.o headsmp.o

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@ -0,0 +1,13 @@
// SPDX-License-Identifier: GPL-2.0
// Copyright 2021 Jonathan Neuschäfer
#include <asm/mach/arch.h>
static const char *const wpcm450_dt_match[] = {
"nuvoton,wpcm450",
NULL
};
DT_MACHINE_START(WPCM450_DT, "WPCM450 chip")
.dt_compat = wpcm450_dt_match,
MACHINE_END

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@ -229,6 +229,7 @@ static int npcm_wdt_probe(struct platform_device *pdev)
#ifdef CONFIG_OF
static const struct of_device_id npcm_wdt_match[] = {
{.compatible = "nuvoton,wpcm450-wdt"},
{.compatible = "nuvoton,npcm750-wdt"},
{},
};