ARM: DT changes for 6.0

As usual, the bulk of the changes for the SoC tree are devicetree file
 updates, and most of these changes are for 64-bit embedded machines.
 As before, there are a ton of style cleanups, and additional hardware
 support for existing machines.
 
 Looking only at the new SoC, the notable additions are:
 
  - A whole family of Broadcom broadband SoCs, both 32-bit and 64-bit:
    BCM63178, BCM63158, BCM4912, BCM6858, BCM6878, BCM6846, BCM63146,
    BCM6856, BCM6855, BCM6756, BCM63148, and BCM6813.
    Each SoC comes with a corresponding reference board.
 
  - The new NXP i.MX93 SoC, the follow-up to the popular i.MX6 and
    i.MX8 embedded SoCs, now using Cortex-A55 cores and the
    Ethos-U65 NPU.
 
  - Qualcomm Snapdragon 8cx Gen3 (SC8280XP), the current high end
    of Arm based Laptop SoCs, and its automotive cousin, the
    SA8540P. The SC8280XP is used in the Lenovo Thinkpad X13s
    laptop that also gets added here in addition to the reference
    boards.
 
  - Allwinner H616, a newer version of the H6 SoC, targeted at
    Set-top-box applications. It comes with dts files for the
    Orange Pi zero2 single-board computer and the X96 Mate
    set-top-box
 
  - Marvell Prestera 98DX2530 (AlleyCat5), a network switch chip
    in the Armada SoC family based on the Cortex-A55 core.
 
 New machines based on previously supported SoCs include:
 
  - Several new machines on NXP i.MX platforms: multiple Toradex
    Colibri boards using the "Iris" and "Ixora" carriers,
    DH electronics i.MX8M Plus DHCOM and PDK2, TQ-Systems
    TQMa8MPQL, and phytech phyBOARD-Polis-i.MX8MM.
 
  - Google Chameleon v3 FPGA board based on Intel Arria10 and
    Stratix 10 Software Virtual platform, both in the SoCFPGA
    platform.
 
  - Two new wireless devices based on Broadcom SoCs:
    The Asus GT-AX6000 Router and the Cisco Meraki MR26 access point
 
  - Improved Chromebook support for both the Mediatek and Qualcomm
    SoC families brought added machines: Acer Chromebook 514 (MT8192),
    Acer Chromebook Spin 513 (MT8195) and a couple of SC7180 based
    machines including the Lenovo IdeaPad Chromebook Duet 3.
 
  - Xiaomi Mi Mix2s, LG G7 and LG V35 are mobile phones based on
    Qualcomm SDM845, while Mi 5s Plus is based on MSM8996.
 
  - Finally, there are a few development board on other chips:
    PCB8309 (Microchip lan966x), Radxa Rock Pi S (Rockchips RK3308)
    DH DRC Compact (ST STM32MP1) and Inforce IFC6560 (Qualcomm
    SDM660)
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmLo+7MACgkQmmx57+YA
 GNlTQQ//QnOoW3fl2l4TvuBuP1Vxp7KW3GxZEkWBEfy7lfgkfBzksJ2GT+c96fxk
 +XEvSJcDsSo8zNYXXu/q0jjVKW4lEkiBtaB53NbLayNTFtJccKPiL4hccUkwSg1K
 zOhfu6SEgkwuYNAhtcQOfIec+gdF2PvpZSWUfuGvM2Z3rNhhyfhgoRRZCpc62eeS
 VQ+bVJH/7hG4XAJEcwmNK+8GoCcLbOclCa14oa9/LuEVjfYwOblfPjSflmfALzbM
 BoTDdeMbZoOdy3LOmLpT26Wv7zWQxLhTpiSYiSV0CI4NHUfzJj8ncNh+w9OiN+KO
 Z7cblHhveW5WSEP/jDp9YTf2XXA5UgpFQQjuXS8zQVECw5YxrSBB96GroQhvpcmT
 oSS0BVvlmp5snBRx4Oev2ldJ0BuyYYljF0DmmTrQ6s2gvB4WBlRSqplCAkDy59Im
 +mc5BBTqZYoxzCpzXEZR7VPzk1jzAO5wnYYd1mLJSHVExlSw8CQijy1a4YXxsvmK
 4Sysrm8UbmPN/0anbiyPKeIkuNuufFUvUCR3Vm2HnMzNPza8YBJ0xm6zr8J7ecXe
 QcucpXyLi17GTLOm+pcyj2fQ19yVqO3xbutP4sy9StctEXLZe3rH2hY+GPK6N+Uj
 83MbABMCmpUAyPMzR0AwTKx/RwWbf1jjYvcKg2VW8NNV5kkQQzM=
 =X6mA
 -----END PGP SIGNATURE-----

Merge tag 'arm-dt-6.0' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM DT updates from Arnd Bergmann:
 "As usual, the bulk of the changes for the SoC tree are devicetree file
  updates, and most of these changes are for 64-bit embedded machines.
  As before, there are a ton of style cleanups, and additional hardware
  support for existing machines.

  Looking only at the new SoC, the notable additions are:

   - A whole family of Broadcom broadband SoCs, both 32-bit and 64-bit:
     BCM63178, BCM63158, BCM4912, BCM6858, BCM6878, BCM6846, BCM63146,
     BCM6856, BCM6855, BCM6756, BCM63148, and BCM6813. Each SoC comes
     with a corresponding reference board.

   - The new NXP i.MX93 SoC, the follow-up to the popular i.MX6 and
     i.MX8 embedded SoCs, now using Cortex-A55 cores and the Ethos-U65
     NPU.

   - Qualcomm Snapdragon 8cx Gen3 (SC8280XP), the current high end of
     Arm based Laptop SoCs, and its automotive cousin, the SA8540P. The
     SC8280XP is used in the Lenovo Thinkpad X13s laptop that also gets
     added here in addition to the reference boards.

   - Allwinner H616, a newer version of the H6 SoC, targeted at
     Set-top-box applications. It comes with dts files for the Orange Pi
     zero2 single-board computer and the X96 Mate set-top-box

   - Marvell Prestera 98DX2530 (AlleyCat5), a network switch chip in the
     Armada SoC family based on the Cortex-A55 core.

  New machines based on previously supported SoCs include:

   - Several new machines on NXP i.MX platforms: multiple Toradex
     Colibri boards using the "Iris" and "Ixora" carriers, DH
     electronics i.MX8M Plus DHCOM and PDK2, TQ-Systems TQMa8MPQL, and
     phytech phyBOARD-Polis-i.MX8MM.

   - Google Chameleon v3 FPGA board based on Intel Arria10 and Stratix
     10 Software Virtual platform, both in the SoCFPGA platform.

   - Two new wireless devices based on Broadcom SoCs: The Asus GT-AX6000
     Router and the Cisco Meraki MR26 access point

   - Improved Chromebook support for both the Mediatek and Qualcomm SoC
     families brought added machines: Acer Chromebook 514 (MT8192), Acer
     Chromebook Spin 513 (MT8195) and a couple of SC7180 based machines
     including the Lenovo IdeaPad Chromebook Duet 3.

   - Xiaomi Mi Mix2s, LG G7 and LG V35 are mobile phones based on
     Qualcomm SDM845, while Mi 5s Plus is based on MSM8996.

   - Finally, there are a few development board on other chips: PCB8309
     (Microchip lan966x), Radxa Rock Pi S (Rockchips RK3308) DH DRC
     Compact (ST STM32MP1) and Inforce IFC6560 (Qualcomm SDM660)"

* tag 'arm-dt-6.0' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (829 commits)
  dt-bindings: soc: bcm: use absolute path to other schema
  dt-bindings: soc: bcm: drop quotes when not needed
  dt-bindings: soc: microchip: use absolute path to other schema
  dt-bindings: soc: microchip: drop quotes when not needed
  ARM: dts: lan966x: keep lan966 entries alphabetically sorted
  ARM: dts: lan966x: add support for pcb8309
  dt-bindings: arm: at91: add lan966 pcb8309 board
  ARM: dts: lan966x: Enable network driver on pcb8291
  ARM: dts: lan966x: Disable can0 on pcb8291
  ARM: dts: lan966x: Add gpio-restart
  dt-bindings: arm: aspeed: add Aspeed Evaluation boards
  arm64: dts: qcom: Add support for Xiaomi Mi Mix2s
  dt-bindings: arm: qcom: Add Xiaomi Mi Mix2s bindings
  dt-bindings: arm: qcom: Document lg,judyln and lg,judyp devices
  dt-bindings: arm: qcom: add missing SM6350 board compatibles
  dt-bindings: arm: qcom: add missing SM6125 board compatibles
  dt-bindings: arm: qcom: add missing SDM845 board compatibles
  dt-bindings: arm: qcom: add missing SDM636 board compatibles
  dt-bindings: arm: qcom: add missing SDM630 board compatibles
  dt-bindings: arm: qcom: add missing QCS404 board compatibles
  ...
This commit is contained in:
Linus Torvalds 2022-08-02 08:15:25 -07:00
commit 3976d758e0
1011 changed files with 35526 additions and 6617 deletions

View File

@ -0,0 +1,69 @@
.. SPDX-License-Identifier: GPL-2.0
======================================
Chromebook Boot Flow
======================================
Most recent Chromebooks that use device tree are using the opensource
depthcharge_ bootloader. Depthcharge_ expects the OS to be packaged as a `FIT
Image`_ which contains an OS image as well as a collection of device trees. It
is up to depthcharge_ to pick the right device tree from the `FIT Image`_ and
provide it to the OS.
The scheme that depthcharge_ uses to pick the device tree takes into account
three variables:
- Board name, specified at depthcharge_ compile time. This is $(BOARD) below.
- Board revision number, determined at runtime (perhaps by reading GPIO
strappings, perhaps via some other method). This is $(REV) below.
- SKU number, read from GPIO strappings at boot time. This is $(SKU) below.
For recent Chromebooks, depthcharge_ creates a match list that looks like this:
- google,$(BOARD)-rev$(REV)-sku$(SKU)
- google,$(BOARD)-rev$(REV)
- google,$(BOARD)-sku$(SKU)
- google,$(BOARD)
Note that some older Chromebooks use a slightly different list that may
not include SKU matching or may prioritize SKU/rev differently.
Note that for some boards there may be extra board-specific logic to inject
extra compatibles into the list, but this is uncommon.
Depthcharge_ will look through all device trees in the `FIT Image`_ trying to
find one that matches the most specific compatible. It will then look
through all device trees in the `FIT Image`_ trying to find the one that
matches the *second most* specific compatible, etc.
When searching for a device tree, depthcharge_ doesn't care where the
compatible string falls within a device tree's root compatible string array.
As an example, if we're on board "lazor", rev 4, SKU 0 and we have two device
trees:
- "google,lazor-rev5-sku0", "google,lazor-rev4-sku0", "qcom,sc7180"
- "google,lazor", "qcom,sc7180"
Then depthcharge_ will pick the first device tree even though
"google,lazor-rev4-sku0" was the second compatible listed in that device tree.
This is because it is a more specific compatible than "google,lazor".
It should be noted that depthcharge_ does not have any smarts to try to
match board or SKU revisions that are "close by". That is to say that
if depthcharge_ knows it's on "rev4" of a board but there is no "rev4"
device tree then depthcharge_ *won't* look for a "rev3" device tree.
In general when any significant changes are made to a board the board
revision number is increased even if none of those changes need to
be reflected in the device tree. Thus it's fairly common to see device
trees with multiple revisions.
It should be noted that, taking into account the above system that
depthcharge_ has, the most flexibility is achieved if the device tree
supporting the newest revision(s) of a board omits the "-rev{REV}"
compatible strings. When this is done then if you get a new board
revision and try to run old software on it then we'll at pick the
newest device tree we know about.
.. _depthcharge: https://source.chromium.org/chromiumos/chromiumos/codesearch/+/main:src/platform/depthcharge/
.. _`FIT Image`: https://doc.coreboot.org/lib/payloads/fit.html

View File

@ -31,6 +31,8 @@ SoC-specific documents
.. toctree::
:maxdepth: 1
google/chromebook-boot-flow
ixp4xx
marvell

View File

@ -25,7 +25,14 @@ properties:
items:
- enum:
- altr,socfpga-arria10-socdk
- enclustra,mercury-aa1
- const: altr,socfpga-arria10
- const: altr,socfpga
- description: Mercury+ AA1 boards
items:
- enum:
- google,chameleon-v3
- const: enclustra,mercury-aa1
- const: altr,socfpga-arria10
- const: altr,socfpga
@ -47,6 +54,7 @@ properties:
items:
- enum:
- altr,socfpga-stratix10-socdk
- altr,socfpga-stratix10-swvp
- const: altr,socfpga-stratix10
- description: SoCFPGA VT

View File

@ -0,0 +1,87 @@
# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/arm/aspeed/aspeed.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Aspeed SoC based boards
maintainers:
- Joel Stanley <joel@jms.id.au>
properties:
$nodename:
const: '/'
compatible:
oneOf:
- description: AST2400 based boards
items:
- enum:
- facebook,galaxy100-bmc
- facebook,wedge100-bmc
- facebook,wedge40-bmc
- microsoft,olympus-bmc
- quanta,q71l-bmc
- tyan,palmetto-bmc
- yadro,vesnin-bmc
- const: aspeed,ast2400
- description: AST2500 based boards
items:
- enum:
- amd,ethanolx-bmc
- ampere,mtjade-bmc
- aspeed,ast2500-evb
- asrock,e3c246d4i-bmc
- asrock,romed8hm3-bmc
- bytedance,g220a-bmc
- facebook,cmm-bmc
- facebook,minipack-bmc
- facebook,tiogapass-bmc
- facebook,yamp-bmc
- facebook,yosemitev2-bmc
- facebook,wedge400-bmc
- hxt,stardragon4800-rep2-bmc
- ibm,mihawk-bmc
- ibm,mowgli-bmc
- ibm,romulus-bmc
- ibm,swift-bmc
- ibm,witherspoon-bmc
- ingrasys,zaius-bmc
- inspur,fp5280g2-bmc
- inspur,nf5280m6-bmc
- inspur,on5263m5-bmc
- intel,s2600wf-bmc
- inventec,lanyang-bmc
- lenovo,hr630-bmc
- lenovo,hr855xg2-bmc
- portwell,neptune-bmc
- qcom,centriq2400-rep-bmc
- supermicro,x11spi-bmc
- tyan,s7106-bmc
- tyan,s8036-bmc
- yadro,nicole-bmc
- yadro,vegman-n110-bmc
- yadro,vegman-rx20-bmc
- yadro,vegman-sx20-bmc
- const: aspeed,ast2500
- description: AST2600 based boards
items:
- enum:
- aspeed,ast2600-evb
- aspeed,ast2600-evb-a1
- facebook,bletchley-bmc
- facebook,cloudripper-bmc
- facebook,elbert-bmc
- facebook,fuji-bmc
- ibm,everest-bmc
- ibm,rainier-bmc
- ibm,tacoma-bmc
- inventec,transformer-bmc
- jabil,rbp-bmc
- nuvia,dc-scm-bmc
- quanta,s6q-bmc
- const: aspeed,ast2600
additionalProperties: true

View File

@ -163,9 +163,11 @@ properties:
- const: microchip,sama7g5
- const: microchip,sama7
- description: Microchip LAN9662 PCB8291 Evaluation Board.
- description: Microchip LAN9662 Evaluation Boards.
items:
- const: microchip,lan9662-pcb8291
- enum:
- microchip,lan9662-pcb8291
- microchip,lan9662-pcb8309
- const: microchip,lan9662
- const: microchip,lan966

View File

@ -87,6 +87,13 @@ properties:
- const: brcm,bcm53012
- const: brcm,bcm4708
- description: BCM53015 based boards
items:
- enum:
- meraki,mr26
- const: brcm,bcm53015
- const: brcm,bcm4708
- description: BCM53016 based boards
items:
- enum:

View File

@ -28,6 +28,99 @@ properties:
- const: brcm,bcm47622
- const: brcm,bcmbca
- description: BCM4912 based boards
items:
- enum:
- asus,gt-ax6000
- brcm,bcm94912
- const: brcm,bcm4912
- const: brcm,bcmbca
- description: BCM63138 based boards
items:
- enum:
- brcm,bcm963138
- brcm,BCM963138DVT
- const: brcm,bcm63138
- const: brcm,bcmbca
- description: BCM63146 based boards
items:
- enum:
- brcm,bcm963146
- const: brcm,bcm63146
- const: brcm,bcmbca
- description: BCM63148 based boards
items:
- enum:
- brcm,bcm963148
- const: brcm,bcm63148
- const: brcm,bcmbca
- description: BCM63158 based boards
items:
- enum:
- brcm,bcm963158
- const: brcm,bcm63158
- const: brcm,bcmbca
- description: BCM63178 based boards
items:
- enum:
- brcm,bcm963178
- const: brcm,bcm63178
- const: brcm,bcmbca
- description: BCM6756 based boards
items:
- enum:
- brcm,bcm96756
- const: brcm,bcm6756
- const: brcm,bcmbca
- description: BCM6813 based boards
items:
- enum:
- brcm,bcm96813
- const: brcm,bcm6813
- const: brcm,bcmbca
- description: BCM6846 based boards
items:
- enum:
- brcm,bcm96846
- const: brcm,bcm6846
- const: brcm,bcmbca
- description: BCM6855 based boards
items:
- enum:
- brcm,bcm96855
- const: brcm,bcm6855
- const: brcm,bcmbca
- description: BCM6856 based boards
items:
- enum:
- brcm,bcm96856
- const: brcm,bcm6856
- const: brcm,bcmbca
- description: BCM6858 based boards
items:
- enum:
- brcm,bcm96858
- const: brcm,bcm6858
- const: brcm,bcmbca
- description: BCM6878 based boards
items:
- enum:
- brcm,bcm96878
- const: brcm,bcm6878
- const: brcm,bcmbca
additionalProperties: true
...

View File

@ -1,271 +0,0 @@
NXP i.MX System Controller Firmware (SCFW)
--------------------------------------------------------------------
The System Controller Firmware (SCFW) is a low-level system function
which runs on a dedicated Cortex-M core to provide power, clock, and
resource management. It exists on some i.MX8 processors. e.g. i.MX8QM
(QM, QP), and i.MX8QX (QXP, DX).
The AP communicates with the SC using a multi-ported MU module found
in the LSIO subsystem. The current definition of this MU module provides
5 remote AP connections to the SC to support up to 5 execution environments
(TZ, HV, standard Linux, etc.). The SC side of this MU module interfaces
with the LSIO DSC IP bus. The SC firmware will communicate with this MU
using the MSI bus.
System Controller Device Node:
============================================================
The scu node with the following properties shall be under the /firmware/ node.
Required properties:
-------------------
- compatible: should be "fsl,imx-scu".
- mbox-names: should include "tx0", "tx1", "tx2", "tx3",
"rx0", "rx1", "rx2", "rx3";
include "gip3" if want to support general MU interrupt.
- mboxes: List of phandle of 4 MU channels for tx, 4 MU channels for
rx, and 1 optional MU channel for general interrupt.
All MU channels must be in the same MU instance.
Cross instances are not allowed. The MU instance can only
be one of LSIO MU0~M4 for imx8qxp and imx8qm. Users need
to make sure use the one which is not conflict with other
execution environments. e.g. ATF.
Note:
Channel 0 must be "tx0" or "rx0".
Channel 1 must be "tx1" or "rx1".
Channel 2 must be "tx2" or "rx2".
Channel 3 must be "tx3" or "rx3".
General interrupt rx channel must be "gip3".
e.g.
mboxes = <&lsio_mu1 0 0
&lsio_mu1 0 1
&lsio_mu1 0 2
&lsio_mu1 0 3
&lsio_mu1 1 0
&lsio_mu1 1 1
&lsio_mu1 1 2
&lsio_mu1 1 3
&lsio_mu1 3 3>;
See Documentation/devicetree/bindings/mailbox/fsl,mu.yaml
for detailed mailbox binding.
Note: Each mu which supports general interrupt should have an alias correctly
numbered in "aliases" node.
e.g.
aliases {
mu1 = &lsio_mu1;
};
i.MX SCU Client Device Node:
============================================================
Client nodes are maintained as children of the relevant IMX-SCU device node.
Power domain bindings based on SCU Message Protocol
------------------------------------------------------------
This binding for the SCU power domain providers uses the generic power
domain binding[2].
Required properties:
- compatible: Should be one of:
"fsl,imx8qm-scu-pd",
"fsl,imx8qxp-scu-pd"
followed by "fsl,scu-pd"
- #power-domain-cells: Must be 1. Contains the Resource ID used by
SCU commands.
See detailed Resource ID list from:
include/dt-bindings/firmware/imx/rsrc.h
Clock bindings based on SCU Message Protocol
------------------------------------------------------------
This binding uses the common clock binding[1].
Required properties:
- compatible: Should be one of:
"fsl,imx8dxl-clk"
"fsl,imx8qm-clk"
"fsl,imx8qxp-clk"
followed by "fsl,scu-clk"
- #clock-cells: Should be 2.
Contains the Resource and Clock ID value.
- clocks: List of clock specifiers, must contain an entry for
each required entry in clock-names
- clock-names: Should include entries "xtal_32KHz", "xtal_24MHz"
The clock consumer should specify the desired clock by having the clock
ID in its "clocks" phandle cell.
See the full list of clock IDs from:
include/dt-bindings/clock/imx8qxp-clock.h
Pinctrl bindings based on SCU Message Protocol
------------------------------------------------------------
This binding uses the i.MX common pinctrl binding[3].
Required properties:
- compatible: Should be one of:
"fsl,imx8qm-iomuxc",
"fsl,imx8qxp-iomuxc",
"fsl,imx8dxl-iomuxc".
Required properties for Pinctrl sub nodes:
- fsl,pins: Each entry consists of 3 integers which represents
the mux and config setting for one pin. The first 2
integers <pin_id mux_mode> are specified using a
PIN_FUNC_ID macro, which can be found in
<dt-bindings/pinctrl/pads-imx8qm.h>,
<dt-bindings/pinctrl/pads-imx8qxp.h>,
<dt-bindings/pinctrl/pads-imx8dxl.h>.
The last integer CONFIG is the pad setting value like
pull-up on this pin.
Please refer to i.MX8QXP Reference Manual for detailed
CONFIG settings.
[1] Documentation/devicetree/bindings/clock/clock-bindings.txt
[2] Documentation/devicetree/bindings/power/power-domain.yaml
[3] Documentation/devicetree/bindings/pinctrl/fsl,imx-pinctrl.txt
RTC bindings based on SCU Message Protocol
------------------------------------------------------------
Required properties:
- compatible: should be "fsl,imx8qxp-sc-rtc";
OCOTP bindings based on SCU Message Protocol
------------------------------------------------------------
Required properties:
- compatible: Should be one of:
"fsl,imx8qm-scu-ocotp",
"fsl,imx8qxp-scu-ocotp".
- #address-cells: Must be 1. Contains byte index
- #size-cells: Must be 1. Contains byte length
Optional Child nodes:
- Data cells of ocotp:
Detailed bindings are described in bindings/nvmem/nvmem.txt
Watchdog bindings based on SCU Message Protocol
------------------------------------------------------------
Required properties:
- compatible: should be:
"fsl,imx8qxp-sc-wdt"
followed by "fsl,imx-sc-wdt";
Optional properties:
- timeout-sec: contains the watchdog timeout in seconds.
SCU key bindings based on SCU Message Protocol
------------------------------------------------------------
Required properties:
- compatible: should be:
"fsl,imx8qxp-sc-key"
followed by "fsl,imx-sc-key";
- linux,keycodes: See Documentation/devicetree/bindings/input/input.yaml
Thermal bindings based on SCU Message Protocol
------------------------------------------------------------
Required properties:
- compatible: Should be :
"fsl,imx8qxp-sc-thermal"
followed by "fsl,imx-sc-thermal";
- #thermal-sensor-cells: See Documentation/devicetree/bindings/thermal/thermal-sensor.yaml
for a description.
Example (imx8qxp):
-------------
aliases {
mu1 = &lsio_mu1;
};
lsio_mu1: mailbox@5d1c0000 {
...
#mbox-cells = <2>;
};
firmware {
scu {
compatible = "fsl,imx-scu";
mbox-names = "tx0", "tx1", "tx2", "tx3",
"rx0", "rx1", "rx2", "rx3",
"gip3";
mboxes = <&lsio_mu1 0 0
&lsio_mu1 0 1
&lsio_mu1 0 2
&lsio_mu1 0 3
&lsio_mu1 1 0
&lsio_mu1 1 1
&lsio_mu1 1 2
&lsio_mu1 1 3
&lsio_mu1 3 3>;
clk: clk {
compatible = "fsl,imx8qxp-clk", "fsl,scu-clk";
#clock-cells = <2>;
};
iomuxc {
compatible = "fsl,imx8qxp-iomuxc";
pinctrl_lpuart0: lpuart0grp {
fsl,pins = <
SC_P_UART0_RX_ADMA_UART0_RX 0x06000020
SC_P_UART0_TX_ADMA_UART0_TX 0x06000020
>;
};
...
};
ocotp: imx8qx-ocotp {
compatible = "fsl,imx8qxp-scu-ocotp";
#address-cells = <1>;
#size-cells = <1>;
fec_mac0: mac@2c4 {
reg = <0x2c4 8>;
};
};
pd: imx8qx-pd {
compatible = "fsl,imx8qxp-scu-pd", "fsl,scu-pd";
#power-domain-cells = <1>;
};
rtc: rtc {
compatible = "fsl,imx8qxp-sc-rtc";
};
scu_key: scu-key {
compatible = "fsl,imx8qxp-sc-key", "fsl,imx-sc-key";
linux,keycodes = <KEY_POWER>;
};
watchdog {
compatible = "fsl,imx8qxp-sc-wdt", "fsl,imx-sc-wdt";
timeout-sec = <60>;
};
tsens: thermal-sensor {
compatible = "fsl,imx8qxp-sc-thermal", "fsl,imx-sc-thermal";
#thermal-sensor-cells = <1>;
};
};
};
serial@5a060000 {
...
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_lpuart0>;
clocks = <&uart0_clk IMX_SC_R_UART_0 IMX_SC_PM_CLK_PER>;
clock-names = "ipg";
power-domains = <&pd IMX_SC_R_UART_0>;
};

View File

@ -321,6 +321,7 @@ properties:
- enum:
- toradex,apalis_imx6q-ixora # Apalis iMX6Q/D Module on Ixora Carrier Board
- toradex,apalis_imx6q-ixora-v1.1 # Apalis iMX6Q/D Module on Ixora V1.1 Carrier Board
- toradex,apalis_imx6q-ixora-v1.2 # Apalis iMX6Q/D Module on Ixora V1.2 Carrier Board
- toradex,apalis_imx6q-eval # Apalis iMX6Q/D Module on Apalis Evaluation Board
- const: toradex,apalis_imx6q
- const: fsl,imx6q
@ -670,30 +671,30 @@ properties:
- description: i.MX6ULL Boards with Toradex Colibri iMX6ULL Modules
items:
- enum:
- toradex,colibri-imx6ull-aster # Colibri iMX6ULL Module on Aster Carrier Board
- toradex,colibri-imx6ull-eval # Colibri iMX6ULL Module on Colibri Evaluation Board V3
- toradex,colibri-imx6ull-iris # Colibri iMX6ULL Module on Iris Carrier Board
- toradex,colibri-imx6ull-iris-v2 # Colibri iMX6ULL Module on Iris V2 Carrier Board
- toradex,colibri-imx6ull-aster # Aster Carrier Board
- toradex,colibri-imx6ull-eval # Colibri Evaluation Board V3
- toradex,colibri-imx6ull-iris # Iris Carrier Board
- toradex,colibri-imx6ull-iris-v2 # Iris V2 Carrier Board
- const: toradex,colibri-imx6ull # Colibri iMX6ULL Module
- const: fsl,imx6ull
- description: i.MX6ULL Boards with Toradex Colibri iMX6ULL 1GB (eMMC) Module
items:
- enum:
- toradex,colibri-imx6ull-emmc-aster # Colibri iMX6ULL 1G (eMMC) on Aster Carrier Board
- toradex,colibri-imx6ull-emmc-eval # Colibri iMX6ULL 1G (eMMC) on Colibri Evaluation B. V3
- toradex,colibri-imx6ull-emmc-iris # Colibri iMX6ULL 1G (eMMC) on Iris Carrier Board
- toradex,colibri-imx6ull-emmc-iris-v2 # Colibri iMX6ULL 1G (eMMC) on Iris V2 Carrier Board
- toradex,colibri-imx6ull-emmc-aster # Aster Carrier Board
- toradex,colibri-imx6ull-emmc-eval # Colibri Evaluation B. V3
- toradex,colibri-imx6ull-emmc-iris # Iris Carrier Board
- toradex,colibri-imx6ull-emmc-iris-v2 # Iris V2 Carrier Board
- const: toradex,colibri-imx6ull-emmc # Colibri iMX6ULL 1GB (eMMC) Module
- const: fsl,imx6ull
- description: i.MX6ULL Boards with Toradex Colibri iMX6ULL Wi-Fi / BT Modules
items:
- enum:
- toradex,colibri-imx6ull-wifi-eval # Colibri iMX6ULL Wi-Fi / BT M. on Colibri Eval. B. V3
- toradex,colibri-imx6ull-wifi-aster # Colibri iMX6ULL Wi-Fi / BT M. on Aster Carrier Board
- toradex,colibri-imx6ull-wifi-iris # Colibri iMX6ULL Wi-Fi / BT M. on Iris Carrier Board
- toradex,colibri-imx6ull-wifi-iris-v2 # Colibri iMX6ULL Wi-Fi / BT M. on Iris V2 Carrier Board
- toradex,colibri-imx6ull-wifi-eval # Colibri Eval. B. V3
- toradex,colibri-imx6ull-wifi-aster # Aster Carrier Board
- toradex,colibri-imx6ull-wifi-iris # Iris Carrier Board
- toradex,colibri-imx6ull-wifi-iris-v2 # Iris V2 Carrier Board
- const: toradex,colibri-imx6ull-wifi # Colibri iMX6ULL Wi-Fi / BT Module
- const: fsl,imx6ull
@ -738,6 +739,8 @@ properties:
- enum:
- toradex,colibri-imx7s-aster # Module on Aster Carrier Board
- toradex,colibri-imx7s-eval-v3 # Module on Colibri Evaluation Board V3
- toradex,colibri-imx7s-iris # Module on Iris Carrier Board
- toradex,colibri-imx7s-iris-v2 # Module on Iris Carrier Board V2
- const: toradex,colibri-imx7s
- const: fsl,imx7s
@ -789,8 +792,10 @@ properties:
- description: i.MX7D Boards with Toradex Colibri i.MX7D Module
items:
- enum:
- toradex,colibri-imx7d-aster # Colibri iMX7D Module on Aster Carrier Board
- toradex,colibri-imx7d-eval-v3 # Colibri iMX7D Module on Colibri Evaluation Board V3
- toradex,colibri-imx7d-aster # Aster Carrier Board
- toradex,colibri-imx7d-eval-v3 # Colibri Evaluation Board V3
- toradex,colibri-imx7d-iris # Iris Carrier Board
- toradex,colibri-imx7d-iris-v2 # Iris Carrier Board V2
- const: toradex,colibri-imx7d
- const: fsl,imx7d
@ -799,6 +804,8 @@ properties:
- enum:
- toradex,colibri-imx7d-emmc-aster # Module on Aster Carrier Board
- toradex,colibri-imx7d-emmc-eval-v3 # Module on Colibri Evaluation Board V3
- toradex,colibri-imx7d-emmc-iris # Module on Iris Carrier Board
- toradex,colibri-imx7d-emmc-iris-v2 # Module on Iris Carrier Board V2
- const: toradex,colibri-imx7d-emmc
- const: fsl,imx7d
@ -865,6 +872,12 @@ properties:
- const: toradex,verdin-imx8mm # Verdin iMX8M Mini Module
- const: fsl,imx8mm
- description: PHYTEC phyCORE-i.MX8MM SoM based boards
items:
- const: phytec,imx8mm-phyboard-polis-rdk # phyBOARD-Polis RDK
- const: phytec,imx8mm-phycore-som # phyCORE-i.MX8MM SoM
- const: fsl,imx8mm
- description: Variscite VAR-SOM-MX8MM based boards
items:
- const: variscite,var-som-mx8mm-symphony
@ -914,6 +927,8 @@ properties:
- description: i.MX8MP based Boards
items:
- enum:
- dh,imx8mp-dhcom-som # i.MX8MP DHCOM SoM
- dh,imx8mp-dhcom-pdk2 # i.MX8MP DHCOM SoM on PDK2 board
- fsl,imx8mp-evk # i.MX8MP EVK Board
- gateworks,imx8mp-gw74xx # i.MX8MP Gateworks Board
- toradex,verdin-imx8mp # Verdin iMX8M Plus Modules
@ -952,6 +967,18 @@ properties:
- const: toradex,verdin-imx8mp # Verdin iMX8M Plus Module
- const: fsl,imx8mp
- description:
TQMa8MPxL is a series of LGA SOM featuring NXP i.MX8MP system-on-chip
variants. It is designed to be soldered on different carrier boards.
All CPU variants use the same device tree hence only one compatible
is needed. MBa8MPxL mainboard can be used as starterkit or in a boxed
version as an industrial computing device.
items:
- enum:
- tq,imx8mp-tqma8mpql-mba8mpxl # TQ-Systems GmbH i.MX8MP TQMa8MPQL SOM on MBa8MPxL
- const: tq,imx8mp-tqma8mpql # TQ-Systems GmbH i.MX8MP TQMa8MPQL SOM
- const: fsl,imx8mp
- description: i.MX8MQ based Boards
items:
- enum:
@ -1020,6 +1047,12 @@ properties:
- fsl,imx8ulp-evk # i.MX8ULP EVK Board
- const: fsl,imx8ulp
- description: i.MX93 based Boards
items:
- enum:
- fsl,imx93-11x11-evk # i.MX93 11x11 EVK Board
- const: fsl,imx93
- description:
Freescale Vybrid Platform Device Tree Bindings

View File

@ -0,0 +1,32 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/arm/marvell/marvell,ac5.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Marvell Alleycat5/5X Platforms
maintainers:
- Chris Packham <chris.packham@alliedtelesis.co.nz>
properties:
$nodename:
const: '/'
compatible:
oneOf:
- description: Alleycat5 (98DX25xx) Reference Design
items:
- enum:
- marvell,rd-ac5
- const: marvell,ac5
- description: Alleycat5X (98DX35xx) Reference Design
items:
- enum:
- marvell,rd-ac5x
- const: marvell,ac5x
- const: marvell,ac5
additionalProperties: true
...

View File

@ -131,6 +131,36 @@ properties:
- enum:
- mediatek,mt8183-evb
- const: mediatek,mt8183
- description: Google Hayato
items:
- const: google,hayato-rev1
- const: google,hayato
- const: mediatek,mt8192
- description: Google Spherion (Acer Chromebook 514)
items:
- const: google,spherion-rev3
- const: google,spherion-rev2
- const: google,spherion-rev1
- const: google,spherion-rev0
- const: google,spherion
- const: mediatek,mt8192
- description: Acer Tomato (Acer Chromebook Spin 513 CP513-2H)
items:
- enum:
- google,tomato-rev2
- google,tomato-rev1
- const: google,tomato
- const: mediatek,mt8195
- description: Acer Tomato rev3 - 4 (Acer Chromebook Spin 513 CP513-2H)
items:
- const: google,tomato-rev4
- const: google,tomato-rev3
- const: google,tomato
- const: mediatek,mt8195
- items:
- enum:
- mediatek,mt8186-evb
- const: mediatek,mt8186
- items:
- enum:
- mediatek,mt8192-evb

View File

@ -26,6 +26,7 @@ properties:
- mediatek,mt8135-pericfg
- mediatek,mt8173-pericfg
- mediatek,mt8183-pericfg
- mediatek,mt8186-pericfg
- mediatek,mt8195-pericfg
- mediatek,mt8516-pericfg
- const: syscon

View File

@ -38,18 +38,24 @@ description: |
msm8992
msm8994
msm8996
msm8998
qcs404
sa8155p
sa8540p
sc7180
sc7280
sc8180x
sc8280xp
sda660
sdm630
sdm632
sdm636
sdm660
sdm845
sdx55
sdx65
sm6125
sm6350
sm7225
sm8150
sm8250
@ -90,6 +96,11 @@ description: |
A dragonboard board v0.1 of subtype 1 with an apq8074 SoC version 2, made in
foundry 2.
There are many devices in the list below that run the standard ChromeOS
bootloader setup and use the open source depthcharge bootloader to boot the
OS. These devices do not use the scheme described above. For details, see:
https://docs.kernel.org/arm/google/chromebook-boot-flow.html
properties:
$nodename:
const: "/"
@ -153,28 +164,50 @@ properties:
- const: qcom,msm8974
- items:
- enum:
- alcatel,idol347
- const: qcom,msm8916-mtp/1
- const: qcom,msm8916-mtp
- const: qcom,msm8916-mtp/1
- const: qcom,msm8916
- items:
- enum:
- longcheer,l8150
- alcatel,idol347
- asus,z00l
- huawei,g7
- longcheer,l8910
- samsung,a3u-eur
- samsung,a5u-eur
- samsung,j5
- samsung,serranove
- wingtech,wt88047
- const: qcom,msm8916
- items:
- const: longcheer,l8150
- const: qcom,msm8916-v1-qrd/9-v1
- const: qcom,msm8916
- items:
- enum:
- lg,bullhead
- microsoft,talkman
- xiaomi,libra
- const: qcom,msm8992
- items:
- enum:
- sony,karin_windy
- const: qcom,apq8094
- items:
- enum:
- huawei,angler
- microsoft,cityman
- sony,ivy-row
- sony,karin-row
- sony,satsuki-row
- sony,sumire-row
- sony,suzuran-row
- qcom,msm8994
- const: qcom,apq8094
- const: qcom,msm8994
- items:
- enum:
@ -190,9 +223,24 @@ properties:
- sony,kagura-row
- sony,keyaki-row
- xiaomi,gemini
- xiaomi,natrium
- xiaomi,scorpio
- const: qcom,msm8996
- items:
- enum:
- asus,novago-tp370ql
- fxtec,pro1
- hp,envy-x2
- lenovo,miix-630
- oneplus,cheeseburger
- oneplus,dumpling
- qcom,msm8998-mtp
- sony,xperia-lilac
- sony,xperia-maple
- sony,xperia-poplar
- const: qcom,msm8998
- items:
- enum:
- qcom,ipq4019-ap-dk01.1-c1
@ -214,19 +262,317 @@ properties:
- qcom,ipq8074-hk10-c2
- const: qcom,ipq8074
- items:
- description: Qualcomm Technologies, Inc. SC7180 IDP
items:
- enum:
- qcom,sc7180-idp
- const: qcom,sc7180
- items:
- enum:
- qcom,sc7280-crd
- qcom,sc7280-idp
- qcom,sc7280-idp2
- google,hoglin
- google,piglin
- google,senor
- description: HP Chromebook x2 11c (rev1 - 2)
items:
- const: google,coachz-rev1
- const: google,coachz-rev2
- const: qcom,sc7180
- description: HP Chromebook x2 11c (newest rev)
items:
- const: google,coachz
- const: qcom,sc7180
- description: HP Chromebook x2 11c with LTE (rev1 - 2)
items:
- const: google,coachz-rev1-sku0
- const: google,coachz-rev2-sku0
- const: qcom,sc7180
- description: HP Chromebook x2 11c with LTE (newest rev)
items:
- const: google,coachz-sku0
- const: qcom,sc7180
- description: Lenovo Chromebook Duet 5 13 (rev2)
items:
- const: google,homestar-rev2
- const: google,homestar-rev23
- const: qcom,sc7180
- description: Lenovo Chromebook Duet 5 13 (rev3)
items:
- const: google,homestar-rev3
- const: qcom,sc7180
- description: Lenovo Chromebook Duet 5 13 (newest rev)
items:
- const: google,homestar
- const: qcom,sc7180
- description: Google Kingoftown (rev0)
items:
- const: google,kingoftown-rev0
- const: qcom,sc7180
- description: Google Kingoftown (newest rev)
items:
- const: google,kingoftown
- const: qcom,sc7180
- description: Acer Chromebook Spin 513 (rev0)
items:
- const: google,lazor-rev0
- const: qcom,sc7180
- description: Acer Chromebook Spin 513 (rev1 - 2)
items:
- const: google,lazor-rev1
- const: google,lazor-rev2
- const: qcom,sc7180
- description: Acer Chromebook Spin 513 (rev3 - 8)
items:
- const: google,lazor-rev3
- const: google,lazor-rev4
- const: google,lazor-rev5
- const: google,lazor-rev6
- const: google,lazor-rev7
- const: google,lazor-rev8
- const: qcom,sc7180
- description: Acer Chromebook Spin 513 (newest rev)
items:
- const: google,lazor
- const: qcom,sc7180
- description: Acer Chromebook Spin 513 with KB Backlight (rev1 - 2)
items:
- const: google,lazor-rev1-sku2
- const: google,lazor-rev2-sku2
- const: qcom,sc7180
- description: Acer Chromebook Spin 513 with KB Backlight (rev3 - 8)
items:
- const: google,lazor-rev3-sku2
- const: google,lazor-rev4-sku2
- const: google,lazor-rev5-sku2
- const: google,lazor-rev6-sku2
- const: google,lazor-rev7-sku2
- const: google,lazor-rev8-sku2
- const: qcom,sc7180
- description: Acer Chromebook Spin 513 with KB Backlight (newest rev)
items:
- const: google,lazor-sku2
- const: qcom,sc7180
- description: Acer Chromebook Spin 513 with LTE (rev1 - 2)
items:
- const: google,lazor-rev1-sku0
- const: google,lazor-rev2-sku0
- const: qcom,sc7180
- description: Acer Chromebook Spin 513 with LTE (rev3 - 8)
items:
- const: google,lazor-rev3-sku0
- const: google,lazor-rev4-sku0
- const: google,lazor-rev5-sku0
- const: google,lazor-rev6-sku0
- const: google,lazor-rev7-sku0
- const: google,lazor-rev8-sku0
- const: qcom,sc7180
- description: Acer Chromebook Spin 513 with LTE (newest rev)
items:
- const: google,lazor-sku0
- const: qcom,sc7180
- description: Acer Chromebook 511 (rev4 - rev8)
items:
- const: google,lazor-rev4-sku4
- const: google,lazor-rev5-sku4
- const: google,lazor-rev6-sku4
- const: google,lazor-rev7-sku4
- const: google,lazor-rev8-sku4
- const: qcom,sc7180
- description: Acer Chromebook 511 (newest rev)
items:
- const: google,lazor-sku4
- const: qcom,sc7180
- description: Acer Chromebook 511 without Touchscreen (rev4)
items:
- const: google,lazor-rev4-sku5
- const: qcom,sc7180
- description: Acer Chromebook 511 without Touchscreen (rev5 - rev8)
items:
- const: google,lazor-rev5-sku5
- const: google,lazor-rev5-sku6
- const: google,lazor-rev6-sku6
- const: google,lazor-rev7-sku6
- const: google,lazor-rev8-sku6
- const: qcom,sc7180
- description: Acer Chromebook 511 without Touchscreen (newest rev)
items:
- const: google,lazor-sku6
- const: qcom,sc7180
- description: Google Mrbland with AUO panel (rev0)
items:
- const: google,mrbland-rev0-sku0
- const: qcom,sc7180
- description: Google Mrbland with AUO panel (newest rev)
items:
- const: google,mrbland-sku1536
- const: qcom,sc7180
- description: Google Mrbland with BOE panel (rev0)
items:
- const: google,mrbland-rev0-sku16
- const: qcom,sc7180
- description: Google Mrbland with BOE panel (newest rev)
items:
- const: google,mrbland-sku1024
- const: google,mrbland-sku768
- const: qcom,sc7180
- description: Google Pazquel with Parade (newest rev)
items:
- const: google,pazquel-sku5
- const: qcom,sc7180
- description: Google Pazquel with TI (newest rev)
items:
- const: google,pazquel-sku1
- const: qcom,sc7180
- description: Google Pazquel with LTE and Parade (newest rev)
items:
- const: google,pazquel-sku4
- const: qcom,sc7180
- description: Google Pazquel with LTE and TI (newest rev)
items:
- const: google,pazquel-sku0
- const: google,pazquel-sku2
- const: qcom,sc7180
- description: Sharp Dynabook Chromebook C1 (rev1)
items:
- const: google,pompom-rev1
- const: qcom,sc7180
- description: Sharp Dynabook Chromebook C1 (rev2)
items:
- const: google,pompom-rev2
- const: qcom,sc7180
- description: Sharp Dynabook Chromebook C1 (newest rev)
items:
- const: google,pompom
- const: qcom,sc7180
- description: Sharp Dynabook Chromebook C1 with LTE (rev1)
items:
- const: google,pompom-rev1-sku0
- const: qcom,sc7180
- description: Sharp Dynabook Chromebook C1 with LTE (rev2)
items:
- const: google,pompom-rev2-sku0
- const: qcom,sc7180
- description: Sharp Dynabook Chromebook C1 with LTE (newest rev)
items:
- const: google,pompom-sku0
- const: qcom,sc7180
- description: Google Quackingstick (newest rev)
items:
- const: google,quackingstick-sku1537
- const: qcom,sc7180
- description: Google Quackingstick with LTE (newest rev)
items:
- const: google,quackingstick-sku1536
- const: qcom,sc7180
- description: Google Trogdor (newest rev)
items:
- const: google,trogdor
- const: qcom,sc7180
- description: Google Trogdor with LTE (newest rev)
items:
- const: google,trogdor-sku0
- const: qcom,sc7180
- description: Lenovo IdeaPad Chromebook Duet 3 with BOE panel (rev0)
items:
- const: google,wormdingler-rev0-sku16
- const: qcom,sc7180
- description: Lenovo IdeaPad Chromebook Duet 3 with BOE panel (newest rev)
items:
- const: google,wormdingler-sku1024
- const: qcom,sc7180
- description: Lenovo IdeaPad Chromebook Duet 3 with BOE panel and rt5682s (newest rev)
items:
- const: google,wormdingler-sku1025
- const: qcom,sc7180
- description: Lenovo IdeaPad Chromebook Duet 3 with INX panel (rev0)
items:
- const: google,wormdingler-rev0-sku0
- const: qcom,sc7180
- description: Lenovo IdeaPad Chromebook Duet 3 with INX panel (newest rev)
items:
- const: google,wormdingler-sku0
- const: qcom,sc7180
- description: Lenovo IdeaPad Chromebook Duet 3 with INX panel and rt5682s (newest rev)
items:
- const: google,wormdingler-sku1
- const: qcom,sc7180
- description: Qualcomm Technologies, Inc. sc7280 CRD platform (rev3 - 4)
items:
- const: qcom,sc7280-crd
- const: google,hoglin-rev3
- const: google,hoglin-rev4
- const: google,piglin-rev3
- const: google,piglin-rev4
- const: qcom,sc7280
- description: Qualcomm Technologies, Inc. sc7280 CRD platform (newest rev)
items:
- const: google,hoglin
- const: qcom,sc7280
- description: Qualcomm Technologies, Inc. sc7280 IDP SKU1 platform
items:
- const: qcom,sc7280-idp
- const: google,senor
- const: qcom,sc7280
- description: Qualcomm Technologies, Inc. sc7280 IDP SKU2 platform
items:
- const: qcom,sc7280-idp2
- const: google,piglin
- const: qcom,sc7280
- description: Google Herobrine (newest rev)
items:
- const: google,herobrine
- const: qcom,sc7280
- description: Google Villager (newest rev)
items:
- const: google,villager
- const: qcom,sc7280
- items:
@ -238,14 +584,34 @@ properties:
- items:
- enum:
- lenovo,thinkpad-x13s
- qcom,sc8280xp-crd
- qcom,sc8280xp-qrd
- const: qcom,sc8280xp
- items:
- enum:
- sony,discovery-row
- sony,kirin-row
- sony,pioneer-row
- sony,voyager-row
- const: qcom,sdm630
- items:
- enum:
- inforce,ifc6560
- const: qcom,sda660
- items:
- enum:
- fairphone,fp3
- const: qcom,sdm632
- items:
- enum:
- sony,mermaid-row
- const: qcom,sdm636
- items:
- enum:
- xiaomi,lavender
@ -269,6 +635,13 @@ properties:
- qcom,ipq6018-cp01-c1
- const: qcom,ipq6018
- items:
- enum:
- qcom,qcs404-evb-1000
- qcom,qcs404-evb-4000
- const: qcom,qcs404-evb
- const: qcom,qcs404
- items:
- enum:
- qcom,sa8155p-adp
@ -279,6 +652,34 @@ properties:
- qcom,sa8295p-adp
- const: qcom,sa8540p
- items:
- enum:
- lenovo,yoga-c630
- lg,judyln
- lg,judyp
- oneplus,enchilada
- oneplus,fajita
- qcom,sdm845-mtp
- shift,axolotl
- samsung,w737
- sony,akari-row
- sony,akatsuki-row
- sony,apollo-row
- thundercomm,db845c
- xiaomi,beryllium
- xiaomi,polaris
- const: qcom,sdm845
- items:
- enum:
- sony,pdx201
- const: qcom,sm6125
- items:
- enum:
- sony,pdx213
- const: qcom,sm6350
- items:
- enum:
- fairphone,fp4
@ -286,19 +687,29 @@ properties:
- items:
- enum:
- microsoft,surface-duo
- qcom,sm8150-hdk
- qcom,sm8150-mtp
- sony,bahamut-generic
- sony,griffin-generic
- const: qcom,sm8150
- items:
- enum:
- qcom,qrb5165-rb5
- qcom,sm8250-hdk
- qcom,sm8250-mtp
- sony,pdx203-generic
- sony,pdx206-generic
- const: qcom,sm8250
- items:
- enum:
- microsoft,surface-duo2
- qcom,sm8350-hdk
- qcom,sm8350-mtp
- sony,pdx214-generic
- sony,pdx215-generic
- const: qcom,sm8350
- items:

View File

@ -554,6 +554,11 @@ properties:
- const: vamrs,rk3399pro-vmarc-som
- const: rockchip,rk3399pro
- description: Radxa ROCK Pi S
items:
- const: radxa,rockpis
- const: rockchip,rk3308
- description: Radxa Rock2 Square
items:
- const: radxa,rock2-square

View File

@ -0,0 +1,40 @@
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/arm/samsung/samsung-soc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Samsung S3C, S5P and Exynos SoC compatibles naming convention
maintainers:
- Krzysztof Kozlowski <krzk@kernel.org>
description: |
Guidelines for new compatibles for SoC blocks/components.
When adding new compatibles in new bindings, use the format::
samsung,SoC-IP
For example::
samsung,exynos5433-cmu-isp
select:
properties:
compatible:
pattern: "^samsung,.*(s3c|s5pv|exynos)[0-9a-z]+.*$"
required:
- compatible
properties:
compatible:
oneOf:
- description: Preferred naming style for compatibles of SoC components
pattern: "^samsung,(s3c|s5pv|exynos|exynosautov)[0-9]+-.*$"
# Legacy compatibles with wild-cards - list cannot grow with new bindings:
- enum:
- samsung,exynos4x12-pinctrl
- samsung,exynos4x12-usb2-phy
- samsung,s3c64xx-pinctrl
- samsung,s3c64xx-wakeup-eint
additionalProperties: true

View File

@ -59,12 +59,18 @@ properties:
- prt,prtt1s # Protonic PRTT1S
- const: st,stm32mp151
- description: DH STM32MP153 SoM based Boards
- description: DH STM32MP153 DHCOM SoM based Boards
items:
- const: dh,stm32mp153c-dhcom-drc02
- const: dh,stm32mp153c-dhcom-som
- const: st,stm32mp153
- description: DH STM32MP153 DHCOR SoM based Boards
items:
- const: dh,stm32mp153c-dhcor-drc-compact
- const: dh,stm32mp153c-dhcor-som
- const: st,stm32mp153
- items:
- enum:
- shiratech,stm32mp157a-iot-box # IoT Box

View File

@ -863,6 +863,11 @@ properties:
- const: yones-toptech,bs1078-v2
- const: allwinner,sun6i-a31s
- description: X96 Mate TV box
items:
- const: hechuang,x96-mate
- const: allwinner,sun50i-h616
- description: Xunlong OrangePi
items:
- const: xunlong,orangepi
@ -963,4 +968,9 @@ properties:
- const: xunlong,orangepi-zero-plus2-h3
- const: allwinner,sun8i-h3
- description: Xunlong OrangePi Zero 2
items:
- const: xunlong,orangepi-zero2
- const: allwinner,sun50i-h616
additionalProperties: true

View File

@ -29,10 +29,20 @@ properties:
compatible:
enum:
- allwinner,sun5i-a13-mbus
- allwinner,sun8i-a33-mbus
- allwinner,sun8i-a50-mbus
- allwinner,sun8i-a83t-mbus
- allwinner,sun8i-h3-mbus
- allwinner,sun8i-r40-mbus
- allwinner,sun8i-v3s-mbus
- allwinner,sun8i-v536-mbus
- allwinner,sun20i-d1-mbus
- allwinner,sun50i-a64-mbus
- allwinner,sun50i-a100-mbus
- allwinner,sun50i-h5-mbus
- allwinner,sun50i-h6-mbus
- allwinner,sun50i-h616-mbus
- allwinner,sun50i-r329-mbus
reg:
minItems: 1
@ -81,13 +91,13 @@ required:
- dma-ranges
if:
properties:
compatible:
contains:
enum:
- allwinner,sun8i-h3-mbus
- allwinner,sun50i-a64-mbus
- allwinner,sun50i-h5-mbus
not:
properties:
compatible:
contains:
enum:
- allwinner,sun5i-a13-mbus
- allwinner,sun8i-r40-mbus
then:
properties:

View File

@ -40,7 +40,6 @@ required:
- compatible
- reg
- nvidia,bpmp
- status
examples:
- |

View File

@ -28,6 +28,9 @@ properties:
- items:
- const: allwinner,sun8i-r40-de2-clk
- const: allwinner,sun8i-h3-de2-clk
- items:
- const: allwinner,sun20i-d1-de2-clk
- const: allwinner,sun50i-h5-de2-clk
reg:
maxItems: 1

View File

@ -0,0 +1,43 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/clock/fsl,scu-clk.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: i.MX SCU Client Device Node - Clock bindings based on SCU Message Protocol
maintainers:
- Abel Vesa <abel.vesa@nxp.com>
description: i.MX SCU Client Device Node
Client nodes are maintained as children of the relevant IMX-SCU device node.
This binding uses the common clock binding.
(Documentation/devicetree/bindings/clock/clock-bindings.txt)
The clock consumer should specify the desired clock by having the clock
ID in its "clocks" phandle cell. See the full list of clock IDs from
include/dt-bindings/clock/imx8qxp-clock.h
properties:
compatible:
items:
- enum:
- fsl,imx8dxl-clk
- fsl,imx8qm-clk
- fsl,imx8qxp-clk
- const: fsl,scu-clk
'#clock-cells':
const: 2
required:
- compatible
- '#clock-cells'
additionalProperties: false
examples:
- |
clock-controller {
compatible = "fsl,imx8qxp-clk", "fsl,scu-clk";
#clock-cells = <2>;
};

View File

@ -4,18 +4,19 @@
$id: http://devicetree.org/schemas/clock/qcom,dispcc-sm8x50.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Qualcomm Display Clock & Reset Controller Binding for SM8150/SM8250
title: Qualcomm Display Clock & Reset Controller Binding for SM8150/SM8250/SM8350
maintainers:
- Jonathan Marek <jonathan@marek.ca>
description: |
Qualcomm display clock control module which supports the clocks, resets and
power domains on SM8150 and SM8250.
power domains on SM8150/SM8250/SM8350.
See also:
dt-bindings/clock/qcom,dispcc-sm8150.h
dt-bindings/clock/qcom,dispcc-sm8250.h
dt-bindings/clock/qcom,dispcc-sm8350.h
properties:
compatible:
@ -23,6 +24,7 @@ properties:
- qcom,sc8180x-dispcc
- qcom,sm8150-dispcc
- qcom,sm8250-dispcc
- qcom,sm8350-dispcc
clocks:
items:

View File

@ -0,0 +1,72 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/clock/qcom,gpucc-sm8350.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Qualcomm Graphics Clock & Reset Controller Binding
maintainers:
- Robert Foss <robert.foss@linaro.org>
description: |
Qualcomm graphics clock control module which supports the clocks, resets and
power domains on Qualcomm SoCs.
See also:
dt-bindings/clock/qcom,gpucc-sm8350.h
properties:
compatible:
enum:
- qcom,sm8350-gpucc
clocks:
items:
- description: Board XO source
- description: GPLL0 main branch source
- description: GPLL0 div branch source
'#clock-cells':
const: 1
'#reset-cells':
const: 1
'#power-domain-cells':
const: 1
reg:
maxItems: 1
required:
- compatible
- reg
- clocks
- '#clock-cells'
- '#reset-cells'
- '#power-domain-cells'
additionalProperties: false
examples:
- |
#include <dt-bindings/clock/qcom,gcc-sm8350.h>
#include <dt-bindings/clock/qcom,rpmh.h>
soc {
#address-cells = <2>;
#size-cells = <2>;
clock-controller@3d90000 {
compatible = "qcom,sm8350-gpucc";
reg = <0 0x03d90000 0 0x9000>;
clocks = <&rpmhcc RPMH_CXO_CLK>,
<&gcc GCC_GPU_GPLL0_CLK_SRC>,
<&gcc GCC_GPU_GPLL0_DIV_CLK_SRC>;
#clock-cells = <1>;
#reset-cells = <1>;
#power-domain-cells = <1>;
};
};
...

View File

@ -0,0 +1,80 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/clock/qcom,sm8450-camcc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Qualcomm Camera Clock & Reset Controller Binding for SM8450
maintainers:
- Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
description: |
Qualcomm camera clock control module which supports the clocks, resets and
power domains on SM8450.
See also include/dt-bindings/clock/qcom,sm8450-camcc.h
properties:
compatible:
const: qcom,sm8450-camcc
clocks:
items:
- description: Camera AHB clock from GCC
- description: Board XO source
- description: Board active XO source
- description: Sleep clock source
power-domains:
maxItems: 1
description:
A phandle and PM domain specifier for the MMCX power domain.
required-opps:
description:
A phandle to an OPP node describing required MMCX performance point.
'#clock-cells':
const: 1
'#reset-cells':
const: 1
'#power-domain-cells':
const: 1
reg:
maxItems: 1
required:
- compatible
- reg
- clocks
- power-domains
- required-opps
- '#clock-cells'
- '#reset-cells'
- '#power-domain-cells'
additionalProperties: false
examples:
- |
#include <dt-bindings/clock/qcom,gcc-sm8450.h>
#include <dt-bindings/clock/qcom,rpmh.h>
#include <dt-bindings/power/qcom-rpmpd.h>
clock-controller@ade0000 {
compatible = "qcom,sm8450-camcc";
reg = <0xade0000 0x20000>;
clocks = <&gcc GCC_CAMERA_AHB_CLK>,
<&rpmhcc RPMH_CXO_CLK>,
<&rpmhcc RPMH_CXO_CLK_A>,
<&sleep_clk>;
power-domains = <&rpmhpd SM8450_MMCX>;
required-opps = <&rpmhpd_opp_low_svs>;
#clock-cells = <1>;
#reset-cells = <1>;
#power-domain-cells = <1>;
};
...

View File

@ -33,6 +33,7 @@ properties:
enum:
- samsung,exynos7885-cmu-top
- samsung,exynos7885-cmu-core
- samsung,exynos7885-cmu-fsys
- samsung,exynos7885-cmu-peri
clocks:
@ -88,6 +89,32 @@ allOf:
- const: dout_core_cci
- const: dout_core_g3d
- if:
properties:
compatible:
contains:
const: samsung,exynos7885-cmu-fsys
then:
properties:
clocks:
items:
- description: External reference clock (26 MHz)
- description: CMU_FSYS bus clock (from CMU_TOP)
- description: MMC_CARD clock (from CMU_TOP)
- description: MMC_EMBD clock (from CMU_TOP)
- description: MMC_SDIO clock (from CMU_TOP)
- description: USB30DRD clock (from CMU_TOP)
clock-names:
items:
- const: oscclk
- const: dout_fsys_bus
- const: dout_fsys_mmc_card
- const: dout_fsys_mmc_embd
- const: dout_fsys_mmc_sdio
- const: dout_fsys_usb30drd
- if:
properties:
compatible:

View File

@ -78,6 +78,7 @@ if:
contains:
enum:
- st,stm32mp1-rcc-secure
- st,stm32mp13-rcc
then:
properties:
clocks:

View File

@ -63,8 +63,8 @@ additionalProperties: true
examples:
- |
/ {
model = "Qualcomm Technologies, Inc. QCS404";
compatible = "qcom,qcs404";
model = "Qualcomm Technologies, Inc. QCS404 EVB 1000";
compatible = "qcom,qcs404-evb-1000", "qcom,qcs404-evb", "qcom,qcs404";
#address-cells = <2>;
#size-cells = <2>;

View File

@ -0,0 +1,210 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/firmware/fsl,scu.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: NXP i.MX System Controller Firmware (SCFW)
maintainers:
- Dong Aisheng <aisheng.dong@nxp.com>
description:
The System Controller Firmware (SCFW) is a low-level system function
which runs on a dedicated Cortex-M core to provide power, clock, and
resource management. It exists on some i.MX8 processors. e.g. i.MX8QM
(QM, QP), and i.MX8QX (QXP, DX).
The AP communicates with the SC using a multi-ported MU module found
in the LSIO subsystem. The current definition of this MU module provides
5 remote AP connections to the SC to support up to 5 execution environments
(TZ, HV, standard Linux, etc.). The SC side of this MU module interfaces
with the LSIO DSC IP bus. The SC firmware will communicate with this MU
using the MSI bus.
properties:
compatible:
const: fsl,imx-scu
clock-controller:
description:
Clock controller node that provides the clocks controlled by the SCU
$ref: /schemas/clock/fsl,scu-clk.yaml
ocotp:
description:
OCOTP controller node provided by the SCU
$ref: /schemas/nvmem/fsl,scu-ocotp.yaml
keys:
description:
Keys provided by the SCU
$ref: /schemas/input/fsl,scu-key.yaml
mboxes:
description:
A list of phandles of TX MU channels followed by a list of phandles of
RX MU channels. The list may include at the end one more optional MU
channel for general interrupt. The number of expected tx and rx
channels is 1 TX and 1 RX channels if MU instance is "fsl,imx8-mu-scu"
compatible, 4 TX and 4 RX channels otherwise. All MU channels must be
within the same MU instance. Cross instances are not allowed. The MU
instance can only be one of LSIO MU0~M4 for imx8qxp and imx8qm. Users
need to ensure that one is used that does not conflict with other
execution environments such as ATF.
oneOf:
- items:
- description: TX0 MU channel
- description: RX0 MU channel
- items:
- description: TX0 MU channel
- description: RX0 MU channel
- description: optional MU channel for general interrupt
- items:
- description: TX0 MU channel
- description: TX1 MU channel
- description: TX2 MU channel
- description: TX3 MU channel
- description: RX0 MU channel
- description: RX1 MU channel
- description: RX2 MU channel
- description: RX3 MU channel
- items:
- description: TX0 MU channel
- description: TX1 MU channel
- description: TX2 MU channel
- description: TX3 MU channel
- description: RX0 MU channel
- description: RX1 MU channel
- description: RX2 MU channel
- description: RX3 MU channel
- description: optional MU channel for general interrupt
mbox-names:
oneOf:
- items:
- const: tx0
- const: rx0
- items:
- const: tx0
- const: rx0
- const: gip3
- items:
- const: tx0
- const: tx1
- const: tx2
- const: tx3
- const: rx0
- const: rx1
- const: rx2
- const: rx3
- items:
- const: tx0
- const: tx1
- const: tx2
- const: tx3
- const: rx0
- const: rx1
- const: rx2
- const: rx3
- const: gip3
pinctrl:
description:
Pin controller provided by the SCU
$ref: /schemas/pinctrl/fsl,scu-pinctrl.yaml
power-controller:
description:
Power domains controller node that provides the power domains
controlled by the SCU
$ref: /schemas/power/fsl,scu-pd.yaml
rtc:
description:
RTC controller provided by the SCU
$ref: /schemas/rtc/fsl,scu-rtc.yaml
thermal-sensor:
description:
Thermal sensor provided by the SCU
$ref: /schemas/thermal/fsl,scu-thermal.yaml
watchdog:
description:
Watchdog controller provided by the SCU
$ref: /schemas/watchdog/fsl,scu-wdt.yaml
required:
- compatible
- mbox-names
- mboxes
additionalProperties: false
examples:
- |
#include <dt-bindings/firmware/imx/rsrc.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/pinctrl/pads-imx8qxp.h>
firmware {
system-controller {
compatible = "fsl,imx-scu";
mbox-names = "tx0", "tx1", "tx2", "tx3",
"rx0", "rx1", "rx2", "rx3",
"gip3";
mboxes = <&lsio_mu1 0 0 &lsio_mu1 0 1 &lsio_mu1 0 2 &lsio_mu1 0 3
&lsio_mu1 1 0 &lsio_mu1 1 1 &lsio_mu1 1 2 &lsio_mu1 1 3
&lsio_mu1 3 3>;
clock-controller {
compatible = "fsl,imx8qxp-clk", "fsl,scu-clk";
#clock-cells = <2>;
};
pinctrl {
compatible = "fsl,imx8qxp-iomuxc";
pinctrl_lpuart0: lpuart0grp {
fsl,pins = <
IMX8QXP_UART0_RX_ADMA_UART0_RX 0x06000020
IMX8QXP_UART0_TX_ADMA_UART0_TX 0x06000020
>;
};
};
ocotp {
compatible = "fsl,imx8qxp-scu-ocotp";
#address-cells = <1>;
#size-cells = <1>;
fec_mac0: mac@2c4 {
reg = <0x2c4 6>;
};
};
power-controller {
compatible = "fsl,imx8qxp-scu-pd", "fsl,scu-pd";
#power-domain-cells = <1>;
};
rtc {
compatible = "fsl,imx8qxp-sc-rtc";
};
keys {
compatible = "fsl,imx8qxp-sc-key", "fsl,imx-sc-key";
linux,keycodes = <KEY_POWER>;
};
watchdog {
compatible = "fsl,imx8qxp-sc-wdt", "fsl,imx-sc-wdt";
timeout-sec = <60>;
};
thermal-sensor {
compatible = "fsl,imx8qxp-sc-thermal", "fsl,imx-sc-thermal";
#thermal-sensor-cells = <1>;
};
};
};

View File

@ -11,7 +11,11 @@ maintainers:
properties:
compatible:
const: xlnx,zynq-gpio-1.0
enum:
- xlnx,zynq-gpio-1.0
- xlnx,zynqmp-gpio-1.0
- xlnx,versal-gpio-1.0
- xlnx,pmc-gpio-1.0
reg:
maxItems: 1
@ -24,6 +28,11 @@ properties:
gpio-controller: true
gpio-line-names:
description: strings describing the names of each gpio line
minItems: 58
maxItems: 174
interrupt-controller: true
"#interrupt-cells":
@ -32,6 +41,54 @@ properties:
clocks:
maxItems: 1
power-domains:
maxItems: 1
allOf:
- if:
properties:
compatible:
enum:
- xlnx,zynqmp-gpio-1.0
then:
properties:
gpio-line-names:
minItems: 174
maxItems: 174
- if:
properties:
compatible:
enum:
- xlnx,zynq-gpio-1.0
then:
properties:
gpio-line-names:
minItems: 118
maxItems: 118
- if:
properties:
compatible:
enum:
- xlnx,versal-gpio-1.0
then:
properties:
gpio-line-names:
minItems: 58
maxItems: 58
- if:
properties:
compatible:
enum:
- xlnx,pmc-gpio-1.0
then:
properties:
gpio-line-names:
minItems: 116
maxItems: 116
required:
- compatible
- reg

View File

@ -1,7 +1,7 @@
# SPDX-License-Identifier: GPL-2.0
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/arm/renesas,prr.yaml#
$id: http://devicetree.org/schemas/hwinfo/renesas,prr.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Renesas Product Register

View File

@ -21,10 +21,18 @@ properties:
- enum:
- allwinner,sun8i-a23-i2c
- allwinner,sun8i-a83t-i2c
- allwinner,sun8i-v536-i2c
- allwinner,sun50i-a64-i2c
- allwinner,sun50i-a100-i2c
- allwinner,sun50i-h6-i2c
- const: allwinner,sun6i-a31-i2c
- description: Allwinner SoCs with offload support
items:
- enum:
- allwinner,sun20i-d1-i2c
- allwinner,sun50i-a100-i2c
- allwinner,sun50i-h616-i2c
- allwinner,sun50i-r329-i2c
- const: allwinner,sun8i-v536-i2c
- const: allwinner,sun6i-a31-i2c
- const: marvell,mv64xxx-i2c
- const: marvell,mv78230-i2c

View File

@ -0,0 +1,40 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/input/fsl,scu-key.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: i.MX SCU Client Device Node - SCU key bindings based on SCU Message Protocol
maintainers:
- Dong Aisheng <aisheng.dong@nxp.com>
description: i.MX SCU Client Device Node
Client nodes are maintained as children of the relevant IMX-SCU device node.
allOf:
- $ref: input.yaml#
properties:
compatible:
items:
- const: fsl,imx8qxp-sc-key
- const: fsl,imx-sc-key
linux,keycodes:
maxItems: 1
required:
- compatible
- linux,keycodes
additionalProperties: false
examples:
- |
#include <dt-bindings/input/input.h>
keys {
compatible = "fsl,imx8qxp-sc-key", "fsl,imx-sc-key";
linux,keycodes = <KEY_POWER>;
};

View File

@ -22,6 +22,7 @@ properties:
- enum:
- allwinner,sun20i-d1-emac
- allwinner,sun50i-h6-emac
- allwinner,sun50i-h616-emac0
- const: allwinner,sun50i-a64-emac
reg:

View File

@ -0,0 +1,171 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/net/pcs/renesas,rzn1-miic.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Renesas RZ/N1 MII converter
maintainers:
- Clément Léger <clement.leger@bootlin.com>
description: |
This MII converter is present on the Renesas RZ/N1 SoC family. It is
responsible to do MII passthrough or convert it to RMII/RGMII.
properties:
'#address-cells':
const: 1
'#size-cells':
const: 0
compatible:
items:
- enum:
- renesas,r9a06g032-miic
- const: renesas,rzn1-miic
reg:
maxItems: 1
clocks:
items:
- description: MII reference clock
- description: RGMII reference clock
- description: RMII reference clock
- description: AHB clock used for the MII converter register interface
clock-names:
items:
- const: mii_ref
- const: rgmii_ref
- const: rmii_ref
- const: hclk
renesas,miic-switch-portin:
description: MII Switch PORTIN configuration. This value should use one of
the values defined in dt-bindings/net/pcs-rzn1-miic.h.
$ref: /schemas/types.yaml#/definitions/uint32
enum: [1, 2]
power-domains:
maxItems: 1
patternProperties:
"^mii-conv@[0-5]$":
type: object
description: MII converter port
properties:
reg:
description: MII Converter port number.
enum: [1, 2, 3, 4, 5]
renesas,miic-input:
description: Converter input port configuration. This value should use
one of the values defined in dt-bindings/net/pcs-rzn1-miic.h.
$ref: /schemas/types.yaml#/definitions/uint32
required:
- reg
- renesas,miic-input
additionalProperties: false
allOf:
- if:
properties:
reg:
const: 1
then:
properties:
renesas,miic-input:
const: 0
- if:
properties:
reg:
const: 2
then:
properties:
renesas,miic-input:
enum: [1, 11]
- if:
properties:
reg:
const: 3
then:
properties:
renesas,miic-input:
enum: [7, 10]
- if:
properties:
reg:
const: 4
then:
properties:
renesas,miic-input:
enum: [4, 6, 9, 13]
- if:
properties:
reg:
const: 5
then:
properties:
renesas,miic-input:
enum: [3, 5, 8, 12]
required:
- '#address-cells'
- '#size-cells'
- compatible
- reg
- clocks
- clock-names
- power-domains
additionalProperties: false
examples:
- |
#include <dt-bindings/net/pcs-rzn1-miic.h>
#include <dt-bindings/clock/r9a06g032-sysctrl.h>
eth-miic@44030000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "renesas,r9a06g032-miic", "renesas,rzn1-miic";
reg = <0x44030000 0x10000>;
clocks = <&sysctrl R9A06G032_CLK_MII_REF>,
<&sysctrl R9A06G032_CLK_RGMII_REF>,
<&sysctrl R9A06G032_CLK_RMII_REF>,
<&sysctrl R9A06G032_HCLK_SWITCH_RG>;
clock-names = "mii_ref", "rgmii_ref", "rmii_ref", "hclk";
renesas,miic-switch-portin = <MIIC_GMAC2_PORT>;
power-domains = <&sysctrl>;
mii_conv1: mii-conv@1 {
renesas,miic-input = <MIIC_GMAC1_PORT>;
reg = <1>;
};
mii_conv2: mii-conv@2 {
renesas,miic-input = <MIIC_SWITCH_PORTD>;
reg = <2>;
};
mii_conv3: mii-conv@3 {
renesas,miic-input = <MIIC_SWITCH_PORTC>;
reg = <3>;
};
mii_conv4: mii-conv@4 {
renesas,miic-input = <MIIC_SWITCH_PORTB>;
reg = <4>;
};
mii_conv5: mii-conv@5 {
renesas,miic-input = <MIIC_SWITCH_PORTA>;
reg = <5>;
};
};

View File

@ -0,0 +1,56 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/nvmem/fsl,scu-ocotp.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: i.MX SCU Client Device Node - OCOTP bindings based on SCU Message Protocol
maintainers:
- Dong Aisheng <aisheng.dong@nxp.com>
description: i.MX SCU Client Device Node
Client nodes are maintained as children of the relevant IMX-SCU device node.
allOf:
- $ref: nvmem.yaml#
properties:
compatible:
enum:
- fsl,imx8qm-scu-ocotp
- fsl,imx8qxp-scu-ocotp
patternProperties:
'^mac@[0-9a-f]*$':
type: object
description:
MAC address.
properties:
reg:
description:
Byte offset within OCOTP where the MAC address is stored
maxItems: 1
required:
- reg
additionalProperties: false
required:
- compatible
unevaluatedProperties: false
examples:
- |
ocotp {
compatible = "fsl,imx8qxp-scu-ocotp";
#address-cells = <1>;
#size-cells = <1>;
fec_mac0: mac@2c4 {
reg = <0x2c4 6>;
};
};

View File

@ -127,20 +127,17 @@ patternProperties:
additionalProperties: false
"^vcc-p[a-hlm]-supply$":
"^vcc-p[a-ilm]-supply$":
description:
Power supplies for pin banks.
required:
- "#gpio-cells"
- "#interrupt-cells"
- compatible
- reg
- interrupts
- clocks
- clock-names
- gpio-controller
- interrupt-controller
allOf:
# FIXME: We should have the pin bank supplies here, but not a lot of
@ -148,6 +145,19 @@ allOf:
# warnings.
- $ref: "pinctrl.yaml#"
- if:
not:
properties:
compatible:
enum:
- allwinner,sun50i-h616-r-pinctrl
then:
required:
- "#interrupt-cells"
- interrupts
- interrupt-controller
- if:
properties:
compatible:

View File

@ -0,0 +1,74 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/pinctrl/fsl,scu-pinctrl.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: i.MX SCU Client Device Node - Pinctrl bindings based on SCU Message Protocol
maintainers:
- Dong Aisheng <aisheng.dong@nxp.com>
description: i.MX SCU Client Device Node
Client nodes are maintained as children of the relevant IMX-SCU device node.
This binding uses the i.MX common pinctrl binding.
(Documentation/devicetree/bindings/pinctrl/fsl,imx-pinctrl.txt)
allOf:
- $ref: pinctrl.yaml#
properties:
compatible:
enum:
- fsl,imx8qm-iomuxc
- fsl,imx8qxp-iomuxc
- fsl,imx8dxl-iomuxc
patternProperties:
'grp$':
type: object
description:
Pinctrl node's client devices use subnodes for desired pin configuration.
Client device subnodes use below standard properties.
properties:
fsl,pins:
description:
each entry consists of 3 integers and represents the pin ID, the mux value
and pad setting for the pin. The first 2 integers - pin_id and mux_val - are
specified using a PIN_FUNC_ID macro, which can be found in
<include/dt-bindings/pinctrl/pads-imx8qxp.h>. The last integer is
the pad setting value like pull-up on this pin. Please refer to the
appropriate i.MX8 Reference Manual for detailed pad CONFIG settings.
$ref: /schemas/types.yaml#/definitions/uint32-matrix
items:
items:
- description: |
"pin_id" indicates the pin ID
- description: |
"mux_val" indicates the mux value to be applied.
- description: |
"pad_setting" indicates the pad configuration value to be applied.
required:
- fsl,pins
additionalProperties: false
required:
- compatible
additionalProperties: false
examples:
- |
pinctrl {
compatible = "fsl,imx8qxp-iomuxc";
pinctrl_lpuart0: lpuart0grp {
fsl,pins = <
111 0 0x06000020
112 0 0x06000020
>;
};
};

View File

@ -0,0 +1,41 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/power/fsl,scu-pd.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: i.MX SCU Client Device Node - Power domain bindings based on SCU Message Protocol
maintainers:
- Dong Aisheng <aisheng.dong@nxp.com>
description: i.MX SCU Client Device Node
Client nodes are maintained as children of the relevant IMX-SCU device node.
Power domain bindings based on SCU Message Protocol
allOf:
- $ref: power-domain.yaml#
properties:
compatible:
items:
- enum:
- fsl,imx8qm-scu-pd
- fsl,imx8qxp-scu-pd
- const: fsl,scu-pd
'#power-domain-cells':
const: 1
required:
- compatible
- '#power-domain-cells'
additionalProperties: false
examples:
- |
power-controller {
compatible = "fsl,imx8qxp-scu-pd", "fsl,scu-pd";
#power-domain-cells = <1>;
};

View File

@ -0,0 +1,31 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/rtc/fsl,scu-rtc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: i.MX SCU Client Device Node - RTC bindings based on SCU Message Protocol
maintainers:
- Dong Aisheng <aisheng.dong@nxp.com>
description: i.MX SCU Client Device Node
Client nodes are maintained as children of the relevant IMX-SCU device node.
allOf:
- $ref: rtc.yaml#
properties:
compatible:
const: fsl,imx8qxp-sc-rtc
required:
- compatible
additionalProperties: false
examples:
- |
rtc {
compatible = "fsl,imx8qxp-sc-rtc";
};

View File

@ -1,46 +0,0 @@
BCM2835 PM (Power domains, watchdog)
The PM block controls power domains and some reset lines, and includes
a watchdog timer. This binding supersedes the brcm,bcm2835-pm-wdt
binding which covered some of PM's register range and functionality.
Required properties:
- compatible: Should be "brcm,bcm2835-pm"
- reg: Specifies base physical address and size of the two
register ranges ("PM" and "ASYNC_BRIDGE" in that
order)
- clocks: a) v3d: The V3D clock from CPRMAN
b) peri_image: The PERI_IMAGE clock from CPRMAN
c) h264: The H264 clock from CPRMAN
d) isp: The ISP clock from CPRMAN
- #reset-cells: Should be 1. This property follows the reset controller
bindings[1].
- #power-domain-cells: Should be 1. This property follows the power domain
bindings[2].
Optional properties:
- timeout-sec: Contains the watchdog timeout in seconds
- system-power-controller: Whether the watchdog is controlling the
system power. This node follows the power controller bindings[3].
[1] Documentation/devicetree/bindings/reset/reset.txt
[2] Documentation/devicetree/bindings/power/power-domain.yaml
[3] Documentation/devicetree/bindings/power/power-controller.txt
Example:
pm {
compatible = "brcm,bcm2835-pm", "brcm,bcm2835-pm-wdt";
#power-domain-cells = <1>;
#reset-cells = <1>;
reg = <0x7e100000 0x114>,
<0x7e00a000 0x24>;
clocks = <&clocks BCM2835_CLOCK_V3D>,
<&clocks BCM2835_CLOCK_PERI_IMAGE>,
<&clocks BCM2835_CLOCK_H264>,
<&clocks BCM2835_CLOCK_ISP>;
clock-names = "v3d", "peri_image", "h264", "isp";
system-power-controller;
};

View File

@ -0,0 +1,86 @@
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/soc/bcm/brcm,bcm2835-pm.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: BCM2835 PM (Power domains, watchdog)
description: |
The PM block controls power domains and some reset lines, and includes a
watchdog timer.
maintainers:
- Nicolas Saenz Julienne <nsaenz@kernel.org>
allOf:
- $ref: /schemas/watchdog/watchdog.yaml#
properties:
compatible:
items:
- enum:
- brcm,bcm2835-pm
- brcm,bcm2711-pm
- const: brcm,bcm2835-pm-wdt
reg:
minItems: 2
maxItems: 3
reg-names:
minItems: 2
items:
- const: pm
- const: asb
- const: rpivid_asb
"#power-domain-cells":
const: 1
"#reset-cells":
const: 1
clocks:
minItems: 4
maxItems: 4
clock-names:
items:
- const: v3d
- const: peri_image
- const: h264
- const: isp
system-power-controller:
type: boolean
timeout-sec: true
required:
- compatible
- reg
- "#power-domain-cells"
- "#reset-cells"
- clocks
additionalProperties: false
examples:
- |
#include <dt-bindings/clock/bcm2835.h>
watchdog@7e100000 {
compatible = "brcm,bcm2835-pm", "brcm,bcm2835-pm-wdt";
#power-domain-cells = <1>;
#reset-cells = <1>;
reg = <0x7e100000 0x114>,
<0x7e00a000 0x24>;
reg-names = "pm", "asb";
clocks = <&clocks BCM2835_CLOCK_V3D>,
<&clocks BCM2835_CLOCK_PERI_IMAGE>,
<&clocks BCM2835_CLOCK_H264>,
<&clocks BCM2835_CLOCK_ISP>;
clock-names = "v3d", "peri_image", "h264", "isp";
system-power-controller;
};

View File

@ -1,8 +1,8 @@
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: "http://devicetree.org/schemas/soc/microchip/atmel,at91rm9200-tcb.yaml#"
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
$id: http://devicetree.org/schemas/soc/microchip/atmel,at91rm9200-tcb.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Atmel Timer Counter Block
@ -75,7 +75,7 @@ patternProperties:
"^pwm@[0-2]$":
description: The timer block channels that are used as PWMs.
$ref: ../../pwm/pwm.yaml#
$ref: /schemas/pwm/pwm.yaml#
type: object
properties:
compatible:

View File

@ -1,8 +1,8 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: "http://devicetree.org/schemas/soc/microchip/microchip,mpfs-sys-controller.yaml#"
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
$id: http://devicetree.org/schemas/soc/microchip/microchip,mpfs-sys-controller.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Microchip PolarFire SoC (MPFS) MSS (microprocessor subsystem) system controller

View File

@ -49,9 +49,6 @@ properties:
reg:
maxItems: 1
assigned-clock-parents: true
assigned-clocks: true
'#clock-cells':
const: 1
@ -77,14 +74,20 @@ properties:
Must be identical to the that of the parent interrupt controller.
const: 3
reboot-mode:
$ref: /schemas/power/reset/syscon-reboot-mode.yaml
type: object
description:
Reboot mode to alter bootloader behavior for the next boot
syscon-poweroff:
$ref: "../../power/reset/syscon-poweroff.yaml#"
$ref: /schemas/power/reset/syscon-poweroff.yaml#
type: object
description:
Node for power off method
syscon-reboot:
$ref: "../../power/reset/syscon-reboot.yaml#"
$ref: /schemas/power/reset/syscon-reboot.yaml#
type: object
description:
Node for reboot method

View File

@ -22,8 +22,12 @@ properties:
pattern: "^usi@[0-9a-f]+$"
compatible:
enum:
- samsung,exynos850-usi # for USIv2 (Exynos850, ExynosAutoV9)
oneOf:
- items:
- const: samsung,exynosautov9-usi
- const: samsung,exynos850-usi
- enum:
- samsung,exynos850-usi
reg: true

View File

@ -0,0 +1,38 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/thermal/fsl,scu-thermal.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: i.MX SCU Client Device Node - Thermal bindings based on SCU Message Protocol
maintainers:
- Dong Aisheng <aisheng.dong@nxp.com>
description: i.MX SCU Client Device Node
Client nodes are maintained as children of the relevant IMX-SCU device node.
allOf:
- $ref: thermal-sensor.yaml#
properties:
compatible:
items:
- const: fsl,imx8qxp-sc-thermal
- const: fsl,imx-sc-thermal
'#thermal-sensor-cells':
const: 1
required:
- compatible
- '#thermal-sensor-cells'
additionalProperties: false
examples:
- |
thermal-sensor {
compatible = "fsl,imx8qxp-sc-thermal", "fsl,imx-sc-thermal";
#thermal-sensor-cells = <1>;
};

View File

@ -0,0 +1,109 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: "http://devicetree.org/schemas/timer/nvidia,tegra186-timer.yaml#"
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
title: NVIDIA Tegra186 timer
maintainers:
- Thierry Reding <treding@nvidia.com>
description: >
The Tegra timer provides 29-bit timer counters and a 32-bit timestamp
counter. Each NV timer selects its timing reference signal from the 1 MHz
reference generated by USEC, TSC or either clk_m or OSC. Each TMR can be
programmed to generate one-shot, periodic, or watchdog interrupts.
properties:
compatible:
oneOf:
- const: nvidia,tegra186-timer
description: >
The Tegra186 timer provides ten 29-bit timer counters.
- const: nvidia,tegra234-timer
description: >
The Tegra234 timer provides sixteen 29-bit timer counters.
reg:
maxItems: 1
interrupts: true
allOf:
- if:
properties:
compatible:
contains:
const: nvidia,tegra186-timer
then:
properties:
interrupts:
maxItems: 10
description: >
One per each timer channels 0 through 9.
- if:
properties:
compatible:
contains:
const: nvidia,tegra234-timer
then:
properties:
interrupts:
maxItems: 16
description: >
One per each timer channels 0 through 15.
required:
- compatible
- reg
- interrupts
additionalProperties: false
examples:
- |
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/interrupt-controller/irq.h>
timer@3010000 {
compatible = "nvidia,tegra186-timer";
reg = <0x03010000 0x000e0000>;
interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
};
- |
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/interrupt-controller/irq.h>
timer@2080000 {
compatible = "nvidia,tegra234-timer";
reg = <0x02080000 0x00121000>;
interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
};

View File

@ -20,6 +20,7 @@ properties:
- items:
- enum:
- allwinner,sun8i-a83t-musb
- allwinner,sun20i-d1-musb
- allwinner,sun50i-h6-musb
- const: allwinner,sun8i-a33-musb
- items:

View File

@ -87,6 +87,9 @@ Required properties:
"atmel,at91sam9g45-udc"
"atmel,sama5d3-udc"
"microchip,sam9x60-udc"
"microchip,lan9662-udc"
For "microchip,lan9662-udc" the fallback "atmel,sama5d3-udc"
is required.
- reg: Address and length of the register set for the device
- interrupts: Should contain usba interrupt
- clocks: Should reference the peripheral and host clocks

View File

@ -38,6 +38,7 @@ properties:
- allwinner,sun8i-h3-ehci
- allwinner,sun8i-r40-ehci
- allwinner,sun9i-a80-ehci
- allwinner,sun20i-d1-ehci
- aspeed,ast2400-ehci
- aspeed,ast2500-ehci
- aspeed,ast2600-ehci

View File

@ -28,6 +28,7 @@ properties:
- allwinner,sun8i-h3-ohci
- allwinner,sun8i-r40-ohci
- allwinner,sun9i-a80-ohci
- allwinner,sun20i-d1-ohci
- brcm,bcm3384-ohci
- brcm,bcm63268-ohci
- brcm,bcm6328-ohci

View File

@ -510,6 +510,8 @@ patternProperties:
description: Haoyu Microelectronic Co. Ltd.
"^hardkernel,.*":
description: Hardkernel Co., Ltd
"^hechuang,.*":
description: Shenzhen Hechuang Intelligent Co.
"^hideep,.*":
description: HiDeep Inc.
"^himax,.*":
@ -1101,6 +1103,8 @@ patternProperties:
description: SGX Sensortech
"^sharp,.*":
description: Sharp Corporation
"^shift,.*":
description: SHIFT GmbH
"^shimafuji,.*":
description: Shimafuji Electric, Inc.
"^shiratech,.*":

View File

@ -0,0 +1,34 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/watchdog/fsl,scu-wdt.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: i.MX SCU Client Device Node - Watchdog bindings based on SCU Message Protocol
maintainers:
- Dong Aisheng <aisheng.dong@nxp.com>
description: i.MX SCU Client Device Node
Client nodes are maintained as children of the relevant IMX-SCU device node.
allOf:
- $ref: watchdog.yaml#
properties:
compatible:
items:
- const: fsl,imx8qxp-sc-wdt
- const: fsl,imx-sc-wdt
required:
- compatible
unevaluatedProperties: false
examples:
- |
watchdog {
compatible = "fsl,imx8qxp-sc-wdt", "fsl,imx-sc-wdt";
timeout-sec = <60>;
};

View File

@ -1899,6 +1899,7 @@ L: linux-aspeed@lists.ozlabs.org (moderated for non-subscribers)
S: Supported
Q: https://patchwork.ozlabs.org/project/linux-aspeed/list/
T: git git://git.kernel.org/pub/scm/linux/kernel/git/joel/aspeed.git
F: Documentation/devicetree/bindings/arm/aspeed/
F: arch/arm/boot/dts/aspeed-*
F: arch/arm/mach-aspeed/
N: aspeed
@ -2621,6 +2622,8 @@ Q: http://patchwork.kernel.org/project/linux-renesas-soc/list/
C: irc://irc.libera.chat/renesas-soc
T: git git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel.git next
F: Documentation/devicetree/bindings/arm/renesas.yaml
F: Documentation/devicetree/bindings/hwinfo/renesas,prr.yaml
F: Documentation/devicetree/bindings/soc/renesas/
F: arch/arm64/boot/dts/renesas/
F: drivers/soc/renesas/
F: include/linux/soc/renesas/
@ -2739,6 +2742,7 @@ Q: http://patchwork.kernel.org/project/linux-renesas-soc/list/
C: irc://irc.libera.chat/renesas-soc
T: git git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel.git next
F: Documentation/devicetree/bindings/arm/renesas.yaml
F: Documentation/devicetree/bindings/soc/renesas/
F: arch/arm/boot/dts/emev2*
F: arch/arm/boot/dts/gr-peach*
F: arch/arm/boot/dts/iwg20d-q7*

View File

@ -135,6 +135,7 @@ dtb-$(CONFIG_ARCH_BCM_5301X) += \
bcm47094-luxul-xwr-3150-v1.dtb \
bcm47094-netgear-r8500.dtb \
bcm47094-phicomm-k3.dtb \
bcm53015-meraki-mr26.dtb \
bcm53016-meraki-mr32.dtb \
bcm94708.dtb \
bcm94709.dtb \
@ -146,8 +147,6 @@ dtb-$(CONFIG_ARCH_BCM_53573) += \
bcm47189-luxul-xap-810.dtb \
bcm47189-tenda-ac9.dtb \
bcm947189acdbmr.dtb
dtb-$(CONFIG_ARCH_BCM_63XX) += \
bcm963138dvt.dtb
dtb-$(CONFIG_ARCH_BCM_CYGNUS) += \
bcm911360_entphn.dtb \
bcm911360k.dtb \
@ -182,7 +181,15 @@ dtb-$(CONFIG_ARCH_BERLIN) += \
dtb-$(CONFIG_ARCH_BRCMSTB) += \
bcm7445-bcm97445svmb.dtb
dtb-$(CONFIG_ARCH_BCMBCA) += \
bcm947622.dtb
bcm947622.dtb \
bcm963138.dtb \
bcm963138dvt.dtb \
bcm963148.dtb \
bcm963178.dtb \
bcm96756.dtb \
bcm96846.dtb \
bcm96855.dtb \
bcm96878.dtb
dtb-$(CONFIG_ARCH_CLPS711X) += \
ep7211-edb7211.dtb
dtb-$(CONFIG_ARCH_DAVINCI) += \
@ -550,6 +557,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
imx6q-apalis-eval.dtb \
imx6q-apalis-ixora.dtb \
imx6q-apalis-ixora-v1.1.dtb \
imx6q-apalis-ixora-v1.2.dtb \
imx6q-apf6dev.dtb \
imx6q-arm2.dtb \
imx6q-b450v3.dtb \
@ -741,8 +749,12 @@ dtb-$(CONFIG_SOC_IMX7D) += \
imx7d-cl-som-imx7.dtb \
imx7d-colibri-aster.dtb \
imx7d-colibri-emmc-aster.dtb \
imx7d-colibri-emmc-iris.dtb \
imx7d-colibri-emmc-iris-v2.dtb \
imx7d-colibri-emmc-eval-v3.dtb \
imx7d-colibri-eval-v3.dtb \
imx7d-colibri-iris.dtb \
imx7d-colibri-iris-v2.dtb \
imx7d-flex-concentrator.dtb \
imx7d-flex-concentrator-mfg.dtb \
imx7d-mba7.dtb \
@ -762,6 +774,8 @@ dtb-$(CONFIG_SOC_IMX7D) += \
imx7d-zii-rpu2.dtb \
imx7s-colibri-aster.dtb \
imx7s-colibri-eval-v3.dtb \
imx7s-colibri-iris.dtb \
imx7s-colibri-iris-v2.dtb \
imx7s-mba7.dtb \
imx7s-warp.dtb
dtb-$(CONFIG_SOC_IMX7ULP) += \
@ -770,9 +784,10 @@ dtb-$(CONFIG_SOC_IMX7ULP) += \
dtb-$(CONFIG_SOC_IMXRT) += \
imxrt1050-evk.dtb
dtb-$(CONFIG_SOC_LAN966) += \
lan966x-pcb8291.dtb \
lan966x-kontron-kswitch-d10-mmt-6g-2gs.dtb \
lan966x-kontron-kswitch-d10-mmt-8g.dtb
lan966x-kontron-kswitch-d10-mmt-8g.dtb \
lan966x-pcb8291.dtb \
lan966x-pcb8309.dtb
dtb-$(CONFIG_SOC_LS1021A) += \
ls1021a-iot.dtb \
ls1021a-moxa-uc-8410a.dtb \
@ -1148,7 +1163,7 @@ dtb-$(CONFIG_ARCH_S5PV210) += \
s5pv210-torbreck.dtb
dtb-$(CONFIG_ARCH_INTEL_SOCFPGA) += \
socfpga_arria5_socdk.dtb \
socfpga_arria10_mercury_aa1.dtb \
socfpga_arria10_chameleonv3.dtb \
socfpga_arria10_socdk_nand.dtb \
socfpga_arria10_socdk_qspi.dtb \
socfpga_arria10_socdk_sdmmc.dtb \
@ -1192,6 +1207,7 @@ dtb-$(CONFIG_ARCH_STM32) += \
stm32mp151a-prtt1c.dtb \
stm32mp151a-prtt1s.dtb \
stm32mp153c-dhcom-drc02.dtb \
stm32mp153c-dhcor-drc-compact.dtb \
stm32mp157a-avenger96.dtb \
stm32mp157a-dhcor-avenger96.dtb \
stm32mp157a-dk1.dtb \
@ -1558,7 +1574,6 @@ dtb-$(CONFIG_ARCH_ASPEED) += \
aspeed-ast2600-evb.dtb \
aspeed-bmc-amd-ethanolx.dtb \
aspeed-bmc-ampere-mtjade.dtb \
aspeed-bmc-arm-centriq2400-rep.dtb \
aspeed-bmc-arm-stardragon4800-rep2.dtb \
aspeed-bmc-asrock-e3c246d4i.dtb \
aspeed-bmc-asrock-romed8hm3.dtb \

View File

@ -154,7 +154,7 @@
reg = <0x0 0xfbc00000 0x0 0x100000>;
interrupt-map-mask = <0xf800 0 0 7>;
/* Add legacy interrupts for SATA devices only */
interrupt-map = <0x4000 0 0 1 &gic 0 43 4>,
interrupt-map = <0x4000 0 0 1 &gic 0 43 4>,
<0x4800 0 0 1 &gic 0 44 4>;
/* 32 bit non prefetchable memory space */

View File

@ -19,7 +19,7 @@
regulator-name = "wlan-en-regulator";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
startup-delay-us= <70000>;
startup-delay-us = <70000>;
/* WL_EN */
gpio = <&gpio3 9 0>;

View File

@ -168,3 +168,7 @@
"NC",
"NC";
};
&baseboard_eeprom {
vcc-supply = <&ldo4_reg>;
};

View File

@ -106,7 +106,7 @@
regulator-name = "wlan-en-regulator";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
startup-delay-us= <70000>;
startup-delay-us = <70000>;
/* WL_EN */
gpio = <&gpio3 9 0>;

View File

@ -18,7 +18,7 @@
regulator-name = "wlan-en-regulator";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
startup-delay-us= <70000>;
startup-delay-us = <70000>;
/* WL_EN */
gpio = <&gpio0 26 0>;

View File

@ -325,7 +325,7 @@ status = "okay";
tlv320aic23: codec@1a {
compatible = "ti,tlv320aic23";
reg = <0x1a>;
#sound-dai-cells= <0>;
#sound-dai-cells = <0>;
status = "okay";
};
};
@ -491,7 +491,7 @@ status = "okay";
tx-num-evt = <1>;
rx-num-evt = <1>;
#sound-dai-cells= <0>;
#sound-dai-cells = <0>;
status = "okay";
};

View File

@ -92,20 +92,18 @@
0x0201006c>; /* DOWN */
};
gpio_keys: volume_keys0 {
gpio_keys: volume-keys {
compatible = "gpio-keys";
#address-cells = <1>;
#size-cells = <0>;
autorepeat;
switch9 {
switch-9 {
label = "volume-up";
linux,code = <115>;
gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
wakeup-source;
};
switch10 {
switch-10 {
label = "volume-down";
linux,code = <114>;
gpios = <&gpio0 3 GPIO_ACTIVE_LOW>;

View File

@ -33,8 +33,6 @@
pinctrl-names = "default";
pinctrl-0 = <&guardian_button_pins>;
compatible = "gpio-keys";
#address-cells = <1>;
#size-cells = <0>;
select-button {
label = "guardian-select-button";

View File

@ -166,10 +166,8 @@
&buttons {
pinctrl-names = "default";
pinctrl-0 = <&push_button_pins>;
#address-cells = <1>;
#size-cells = <0>;
button@0 {
button-0 {
label = "push_button";
linux,code = <0x100>;
gpios = <&gpio2 23 GPIO_ACTIVE_LOW>;

View File

@ -378,10 +378,8 @@
&buttons {
pinctrl-names = "default";
pinctrl-0 = <&push_button_pins>;
#address-cells = <1>;
#size-cells = <0>;
button@0 {
button-0 {
label = "push_button";
linux,code = <0x100>;
gpios = <&gpio3 21 GPIO_ACTIVE_LOW>;

View File

@ -54,14 +54,14 @@
pinctrl-names = "default";
pinctrl-0 = <&user_buttons_pins>;
button@0 {
button-0 {
label = "home";
linux,code = <KEY_HOME>;
gpios = <&gpio3 7 GPIO_ACTIVE_HIGH>;
wakeup-source;
};
button@1 {
button-1 {
label = "menu";
linux,code = <KEY_MENU>;
gpios = <&gpio3 8 GPIO_ACTIVE_HIGH>;

View File

@ -596,24 +596,22 @@
&buttons {
pinctrl-names = "default";
pinctrl-0 = <&user_buttons_pins>;
#address-cells = <1>;
#size-cells = <0>;
button0 {
button-0 {
label = "home";
linux,code = <KEY_HOME>;
gpios = <&gpio1 22 GPIO_ACTIVE_LOW>;
wakeup-source;
};
button1 {
button-1 {
label = "menu";
linux,code = <KEY_MENU>;
gpios = <&gpio1 23 GPIO_ACTIVE_LOW>;
wakeup-source;
};
buttons2 {
button-2 {
label = "power";
linux,code = <KEY_POWER>;
gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;

View File

@ -23,7 +23,7 @@
regulator-name = "wlan-en-regulator";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
startup-delay-us= <100000>;
startup-delay-us = <100000>;
};
};

View File

@ -36,10 +36,10 @@
};
};
gpio_keys {
gpio-keys {
compatible = "gpio-keys";
back_button {
back-button {
label = "Back Button";
gpios = <&gpio1 29 GPIO_ACTIVE_HIGH>;
linux,code = <KEY_BACK>;
@ -47,7 +47,7 @@
wakeup-source;
};
front_button {
front-button {
label = "Front Button";
gpios = <&gpio1 25 GPIO_ACTIVE_HIGH>;
linux,code = <KEY_FRONT>;

View File

@ -70,61 +70,61 @@
compatible = "gpio-keys-polled";
poll-interval = <100>;
record {
key-record {
label = "Record";
/* linux,code = <BTN_0>; */
gpios = <&tca6416_2 15 GPIO_ACTIVE_LOW>;
};
play {
key-play {
label = "Play";
linux,code = <KEY_PLAY>;
gpios = <&tca6416_2 14 GPIO_ACTIVE_LOW>;
};
Stop {
key-stop {
label = "Stop";
linux,code = <KEY_STOP>;
gpios = <&tca6416_2 13 GPIO_ACTIVE_LOW>;
};
fwd {
key-fwd {
label = "FWD";
linux,code = <KEY_FASTFORWARD>;
gpios = <&tca6416_2 12 GPIO_ACTIVE_LOW>;
};
rwd {
key-rwd {
label = "RWD";
linux,code = <KEY_REWIND>;
gpios = <&tca6416_2 11 GPIO_ACTIVE_LOW>;
};
shift {
key-shift {
label = "Shift";
linux,code = <KEY_LEFTSHIFT>;
gpios = <&tca6416_2 10 GPIO_ACTIVE_LOW>;
};
Mode {
key-mode {
label = "Mode";
linux,code = <BTN_MODE>;
gpios = <&tca6416_2 9 GPIO_ACTIVE_LOW>;
};
Menu {
key-menu {
label = "Menu";
linux,code = <KEY_MENU>;
gpios = <&tca6416_2 8 GPIO_ACTIVE_LOW>;
};
Up {
key-up {
label = "Up";
linux,code = <KEY_UP>;
gpios = <&tca6416_2 7 GPIO_ACTIVE_LOW>;
};
Down {
key-down {
label = "Down";
linux,code = <KEY_DOWN>;
gpios = <&tca6416_2 6 GPIO_ACTIVE_LOW>;
@ -137,14 +137,14 @@
tlv320aic23_1: codec@1a {
compatible = "ti,tlv320aic23";
reg = <0x1a>;
#sound-dai-cells= <0>;
#sound-dai-cells = <0>;
status = "okay";
};
tlv320aic23_2: codec@1b {
compatible = "ti,tlv320aic23";
reg = <0x1b>;
#sound-dai-cells= <0>;
#sound-dai-cells = <0>;
status = "okay";
};
};
@ -154,7 +154,7 @@
tlv320aic23_3: codec@1a {
compatible = "ti,tlv320aic23";
reg = <0x1a>;
#sound-dai-cells= <0>;
#sound-dai-cells = <0>;
status = "okay";
};

View File

@ -37,55 +37,55 @@
compatible = "gpio-keys-polled";
poll-interval = <100>;
user_pb {
button-user {
label = "User Push Button";
linux,code = <BTN_0>;
gpios = <&tca6416 5 GPIO_ACTIVE_LOW>;
};
user_sw_1 {
switch-1 {
label = "User Switch 1";
linux,code = <BTN_1>;
gpios = <&tca6416 8 GPIO_ACTIVE_LOW>;
};
user_sw_2 {
switch-2 {
label = "User Switch 2";
linux,code = <BTN_2>;
gpios = <&tca6416 9 GPIO_ACTIVE_LOW>;
};
user_sw_3 {
switch-3 {
label = "User Switch 3";
linux,code = <BTN_3>;
gpios = <&tca6416 10 GPIO_ACTIVE_LOW>;
};
user_sw_4 {
switch-4 {
label = "User Switch 4";
linux,code = <BTN_4>;
gpios = <&tca6416 11 GPIO_ACTIVE_LOW>;
};
user_sw_5 {
switch-5 {
label = "User Switch 5";
linux,code = <BTN_5>;
gpios = <&tca6416 12 GPIO_ACTIVE_LOW>;
};
user_sw_6 {
switch-6 {
label = "User Switch 6";
linux,code = <BTN_6>;
gpios = <&tca6416 13 GPIO_ACTIVE_LOW>;
};
user_sw_7 {
switch-7 {
label = "User Switch 7";
linux,code = <BTN_7>;
gpios = <&tca6416 14 GPIO_ACTIVE_LOW>;
};
user_sw_8 {
switch-8 {
label = "User Switch 8";
linux,code = <BTN_8>;
gpios = <&tca6416 15 GPIO_ACTIVE_LOW>;

View File

@ -213,7 +213,7 @@
u48: pca9575@22 {
compatible = "nxp,pca9575";
reg=<0x22>;
reg = <0x22>;
gpio-controller;
#gpio-cells = <2>;
@ -232,7 +232,7 @@
u59: pca9575@23 {
compatible = "nxp,pca9575";
reg=<0x23>;
reg = <0x23>;
gpio-controller;
#gpio-cells = <2>;
gpio-line-names =

View File

@ -98,14 +98,12 @@
vin-supply = <&v1_5dreg>;
};
gpio_keys: gpio_keys {
gpio_keys: gpio-keys {
compatible = "gpio-keys";
pinctrl-names = "default";
pinctrl-0 = <&gpio_keys_pins_default>;
#address-cells = <1>;
#size-cells = <0>;
switch0 {
switch-0 {
label = "power-button";
linux,code = <KEY_POWER>;
gpios = <&gpio4 2 GPIO_ACTIVE_LOW>;

View File

@ -2407,7 +2407,7 @@
adc {
#io-channel-cells = <1>;
compatible ="ti,am4372-adc";
compatible = "ti,am4372-adc";
};
};
};

View File

@ -168,26 +168,24 @@
};
};
gpio_keys {
gpio-keys {
compatible = "gpio-keys";
#address-cells = <1>;
#size-cells = <0>;
keyswitch_in {
key-switch-in {
label = "keyswitch_in";
gpios = <&pioB 1 GPIO_ACTIVE_HIGH>;
linux,code = <28>;
wakeup-source;
};
error_in {
key-error-in {
label = "error_in";
gpios = <&pioB 2 GPIO_ACTIVE_HIGH>;
linux,code = <29>;
wakeup-source;
};
btn {
key-s {
label = "btn";
gpios = <&pioC 23 GPIO_ACTIVE_HIGH>;
linux,code = <31>;

View File

@ -75,25 +75,25 @@
pinctrl-0 = <&pmx_buttons>;
pinctrl-names = "default";
power {
button-power {
label = "Power Button";
linux,code = <KEY_POWER>;
gpios = <&gpio0 10 GPIO_ACTIVE_HIGH>;
};
reset {
button-reset {
label = "Reset Button";
linux,code = <KEY_RESTART>;
gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
};
usb1 {
button-usb1 {
label = "USB1 Button";
linux,code = <BTN_0>;
gpios = <&gpio1 0 GPIO_ACTIVE_LOW>;
};
usb2 {
button-usb2 {
label = "USB2 Button";
linux,code = <BTN_1>;
gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;

View File

@ -84,8 +84,6 @@
gpio-keys {
compatible = "gpio-keys";
#address-cells = <1>;
#size-cells = <0>;
button {
label = "Software Button";
linux,code = <KEY_POWER>;

View File

@ -108,22 +108,20 @@
gpio-keys {
compatible = "gpio-keys";
#address-cells = <1>;
#size-cells = <0>;
power {
button-power {
label = "Power button";
linux,code = <KEY_POWER>;
gpios = <&gpio1 19 GPIO_ACTIVE_LOW>;
debounce-interval = <100>;
};
backup {
button-backup {
label = "Backup button";
linux,code = <KEY_OPTION>;
gpios = <&gpio0 31 GPIO_ACTIVE_LOW>;
debounce-interval = <100>;
};
reset {
button-reset {
label = "Reset Button";
linux,code = <KEY_RESTART>;
gpios = <&gpio1 23 GPIO_ACTIVE_LOW>;

View File

@ -83,22 +83,20 @@
gpio-keys {
compatible = "gpio-keys";
#address-cells = <1>;
#size-cells = <0>;
power {
button-power {
label = "Power button";
linux,code = <KEY_POWER>;
gpios = <&gpio1 19 GPIO_ACTIVE_HIGH>;
debounce-interval = <100>;
};
reset {
button-reset {
label = "Reset Button";
linux,code = <KEY_RESTART>;
gpios = <&gpio1 23 GPIO_ACTIVE_LOW>;
debounce-interval = <100>;
};
button {
button-usb {
label = "USB VBUS error";
linux,code = <KEY_UNKNOWN>;
gpios = <&gpio1 21 GPIO_ACTIVE_LOW>;

View File

@ -24,7 +24,7 @@
pinctrl-0 = <&front_button_pins>;
pinctrl-names = "default";
factory_default {
key-factory-default {
label = "Factory Default";
gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RESTART>;

View File

@ -256,14 +256,14 @@
pinctrl-0 = <&cf_gtr_rear_button_pins &cf_gtr_front_button_pins>;
pinctrl-names = "default";
button_0 {
button-0 {
label = "Rear Button";
gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
linux,can-disable;
linux,code = <BTN_0>;
};
button_1 {
button-1 {
label = "Front Button";
gpios = <&gpio1 21 GPIO_ACTIVE_LOW>;
linux,can-disable;

View File

@ -53,13 +53,13 @@
pinctrl-0 = <&gpio_keys_pins>;
pinctrl-names = "default";
wps {
button-wps {
label = "WPS";
linux,code = <KEY_WPS_BUTTON>;
gpios = <&gpio0 24 GPIO_ACTIVE_LOW>;
};
reset {
button-reset {
label = "Factory Reset Button";
linux,code = <KEY_RESTART>;
gpios = <&gpio0 29 GPIO_ACTIVE_LOW>;

View File

@ -191,15 +191,13 @@
reg = <0x2b>;
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
/*
* LEDs are controlled by MCU (STM32F0) at
* address 0x2b.
*
* The driver does not support HW control mode
* for the LEDs yet. Disable the LEDs for now.
*
* Also LED functions are not stable yet:
* LED functions are not stable yet:
* - there are 3 LEDs connected via MCU to PCIe
* ports. One of these ports supports mSATA.
* There is no mSATA nor PCIe function.
@ -210,7 +208,6 @@
* B. Again there is no such function defined.
* For now we use LED_FUNCTION_INDICATOR
*/
status = "disabled";
multi-led@0 {
reg = <0x0>;
@ -397,7 +394,8 @@
phy1: ethernet-phy@1 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <1>;
marvell,reg-init = <3 18 0 0x4985>;
marvell,reg-init = <3 18 0 0x4985>,
<3 16 0xfff0 0x0001>;
/* irq is connected to &pcawan pin 7 */
};

View File

@ -19,7 +19,7 @@
pinctrl-0 = <&rear_button_pins>;
pinctrl-names = "default";
button_0 {
button-0 {
/* The rear SW3 button */
label = "Rear Button";
gpios = <&gpio1 12 GPIO_ACTIVE_LOW>;

View File

@ -35,7 +35,7 @@
pinctrl-0 = <&rear_button_pins>;
pinctrl-names = "default";
button_0 {
button-0 {
/* The rear SW3 button */
label = "Rear Button";
gpios = <&gpio1 2 GPIO_ACTIVE_LOW>;

View File

@ -69,14 +69,12 @@
};
};
gpio_keys {
gpio-keys {
compatible = "gpio-keys";
#address-cells = <1>;
#size-cells = <0>;
pinctrl-0 = <&keys_pin>;
pinctrl-names = "default";
reset {
button-reset {
label = "Factory Reset Button";
linux,code = <KEY_SETUP>;
gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;

View File

@ -172,20 +172,18 @@
};
};
gpio_keys {
gpio-keys {
compatible = "gpio-keys";
#address-cells = <1>;
#size-cells = <0>;
pinctrl-0 = <&keys_pin>;
pinctrl-names = "default";
wps {
button-wps {
label = "WPS";
linux,code = <KEY_WPS_BUTTON>;
gpios = <&gpio1 0 GPIO_ACTIVE_LOW>;
};
reset {
button-reset {
label = "Factory Reset Button";
linux,code = <KEY_RESTART>;
gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;

View File

@ -97,12 +97,10 @@
};
};
gpio_keys {
gpio-keys {
compatible = "gpio-keys";
#address-cells = <1>;
#size-cells = <0>;
init {
button-init {
label = "Init Button";
linux,code = <KEY_POWER>;
gpios = <&gpio1 28 GPIO_ACTIVE_HIGH>;

View File

@ -5,7 +5,7 @@
/ {
model = "AST2500 EVB";
compatible = "aspeed,ast2500";
compatible = "aspeed,ast2500-evb", "aspeed,ast2500";
aliases {
serial4 = &uart5;

View File

@ -5,6 +5,7 @@
/ {
model = "AST2600 A1 EVB";
compatible = "aspeed,ast2600-evb-a1", "aspeed,ast2600";
/delete-node/regulator-vcc-sdhci0;
/delete-node/regulator-vcc-sdhci1;

View File

@ -8,7 +8,7 @@
/ {
model = "AST2600 EVB";
compatible = "aspeed,ast2600";
compatible = "aspeed,ast2600-evb-a1", "aspeed,ast2600";
aliases {
serial4 = &uart5;

View File

@ -100,91 +100,91 @@
gpio-keys {
compatible = "gpio-keys";
shutdown_ack {
event-shutdown-ack {
label = "SHUTDOWN_ACK";
gpios = <&gpio ASPEED_GPIO(G, 2) GPIO_ACTIVE_LOW>;
linux,code = <ASPEED_GPIO(G, 2)>;
};
reboot_ack {
event-reboot-ack {
label = "REBOOT_ACK";
gpios = <&gpio ASPEED_GPIO(J, 3) GPIO_ACTIVE_LOW>;
linux,code = <ASPEED_GPIO(J, 3)>;
};
S0_overtemp {
event-s0-overtemp {
label = "S0_OVERTEMP";
gpios = <&gpio ASPEED_GPIO(G, 3) GPIO_ACTIVE_LOW>;
linux,code = <ASPEED_GPIO(G, 3)>;
};
S0_hightemp {
event-s0-hightemp {
label = "S0_HIGHTEMP";
gpios = <&gpio ASPEED_GPIO(J, 0) GPIO_ACTIVE_LOW>;
linux,code = <ASPEED_GPIO(J, 0)>;
};
S0_cpu_fault {
event-s0-cpu-fault {
label = "S0_CPU_FAULT";
gpios = <&gpio ASPEED_GPIO(J, 1) GPIO_ACTIVE_HIGH>;
linux,code = <ASPEED_GPIO(J, 1)>;
};
S0_scp_auth_fail {
event-s0-scp-auth-fail {
label = "S0_SCP_AUTH_FAIL";
gpios = <&gpio ASPEED_GPIO(J, 2) GPIO_ACTIVE_LOW>;
linux,code = <ASPEED_GPIO(J, 2)>;
};
S1_scp_auth_fail {
event-s1-scp-auth-fail {
label = "S1_SCP_AUTH_FAIL";
gpios = <&gpio ASPEED_GPIO(Z, 5) GPIO_ACTIVE_LOW>;
linux,code = <ASPEED_GPIO(Z, 5)>;
};
S1_overtemp {
event-s1-overtemp {
label = "S1_OVERTEMP";
gpios = <&gpio ASPEED_GPIO(Z, 6) GPIO_ACTIVE_LOW>;
linux,code = <ASPEED_GPIO(Z, 6)>;
};
S1_hightemp {
event-s1-hightemp {
label = "S1_HIGHTEMP";
gpios = <&gpio ASPEED_GPIO(AB, 0) GPIO_ACTIVE_LOW>;
linux,code = <ASPEED_GPIO(AB, 0)>;
};
S1_cpu_fault {
event-s1-cpu-fault {
label = "S1_CPU_FAULT";
gpios = <&gpio ASPEED_GPIO(Z, 1) GPIO_ACTIVE_HIGH>;
linux,code = <ASPEED_GPIO(Z, 1)>;
};
id_button {
event-id {
label = "ID_BUTTON";
gpios = <&gpio ASPEED_GPIO(Q, 5) GPIO_ACTIVE_LOW>;
linux,code = <ASPEED_GPIO(Q, 5)>;
};
psu1_vin_good {
event-psu1-vin-good {
label = "PSU1_VIN_GOOD";
gpios = <&gpio ASPEED_GPIO(H, 4) GPIO_ACTIVE_LOW>;
linux,code = <ASPEED_GPIO(H, 4)>;
};
psu2_vin_good {
event-psu2-vin-good {
label = "PSU2_VIN_GOOD";
gpios = <&gpio ASPEED_GPIO(H, 5) GPIO_ACTIVE_LOW>;
linux,code = <ASPEED_GPIO(H, 5)>;
};
psu1_present {
event-psu1-present {
label = "PSU1_PRESENT";
gpios = <&gpio ASPEED_GPIO(I, 0) GPIO_ACTIVE_LOW>;
linux,code = <ASPEED_GPIO(I, 0)>;
};
psu2_present {
event-psu2-present {
label = "PSU2_PRESENT";
gpios = <&gpio ASPEED_GPIO(I, 1) GPIO_ACTIVE_LOW>;
linux,code = <ASPEED_GPIO(I, 1)>;

View File

@ -1,225 +0,0 @@
// SPDX-License-Identifier: GPL-2.0+
/dts-v1/;
#include "aspeed-g5.dtsi"
#include <dt-bindings/gpio/aspeed-gpio.h>
/ {
model = "Qualcomm Centriq 2400 REP AST2520";
compatible = "qualcomm,centriq2400-rep-bmc", "aspeed,ast2500";
chosen {
stdout-path = &uart5;
bootargs = "console=ttyS4,115200 earlycon";
};
memory@80000000 {
reg = <0x80000000 0x40000000>;
};
iio-hwmon {
compatible = "iio-hwmon";
io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>,
<&adc 4>, <&adc 5>, <&adc 6>, <&adc 8>;
};
iio-hwmon-battery {
compatible = "iio-hwmon";
io-channels = <&adc 7>;
};
leds {
compatible = "gpio-leds";
uid_led {
label = "UID_LED";
gpios = <&gpio ASPEED_GPIO(Q, 5) GPIO_ACTIVE_LOW>;
};
ras_error_led {
label = "RAS_ERROR_LED";
gpios = <&gpio ASPEED_GPIO(F, 6) GPIO_ACTIVE_LOW>;
};
system_fault {
label = "System_fault";
gpios = <&gpio ASPEED_GPIO(A, 1) GPIO_ACTIVE_LOW>;
};
};
};
&fmc {
status = "okay";
flash@0 {
status = "okay";
m25p,fast-read;
label = "bmc";
#include "openbmc-flash-layout.dtsi"
};
};
&spi1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi1_default>;
flash@0 {
status = "okay";
};
};
&spi2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi2ck_default
&pinctrl_spi2miso_default
&pinctrl_spi2mosi_default
&pinctrl_spi2cs0_default>;
};
&uart3 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_txd3_default &pinctrl_rxd3_default>;
current-speed = <115200>;
};
&uart5 {
status = "okay";
};
&mac0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_rgmii1_default &pinctrl_mdio1_default>;
};
&i2c0 {
status = "okay";
};
&i2c1 {
status = "okay";
tmp421@1e {
compatible = "ti,tmp421";
reg = <0x1e>;
};
tmp421@2a {
compatible = "ti,tmp421";
reg = <0x2a>;
};
tmp421@4e {
compatible = "ti,tmp421";
reg = <0x4e>;
};
tmp421@1c {
compatible = "ti,tmp421";
reg = <0x1c>;
};
};
&i2c2 {
status = "okay";
};
&i2c3 {
status = "okay";
};
&i2c4 {
status = "okay";
};
&i2c5 {
status = "okay";
};
&i2c6 {
status = "okay";
tmp421@1d {
compatible = "ti,tmp421";
reg = <0x1d>;
};
tmp421@1f {
compatible = "ti,tmp421";
reg = <0x1f>;
};
tmp421@4d {
compatible = "ti,tmp421";
reg = <0x4d>;
};
tmp421@4f {
compatible = "ti,tmp421";
reg = <0x4f>;
};
nvt210@4c {
compatible = "nvt210";
reg = <0x4c>;
};
eeprom@50 {
compatible = "atmel,24c128";
reg = <0x50>;
pagesize = <128>;
};
};
&i2c7 {
status = "okay";
};
&i2c8 {
status = "okay";
pca9641@70 {
compatible = "nxp,pca9641";
reg = <0x70>;
i2c-arb {
#address-cells = <1>;
#size-cells = <0>;
tmp421@1d {
compatible = "tmp421";
reg = <0x1d>;
};
adm1278@12 {
compatible = "adi,adm1278";
reg = <0x12>;
Rsense = <500>;
};
eeprom@50 {
compatible = "atmel,24c02";
reg = <0x50>;
};
ds1100@58 {
compatible = "ds1100";
reg = <0x58>;
};
};
};
};
&i2c9 {
status = "okay";
};
&vuart {
status = "okay";
};
&gfx {
status = "okay";
};
&pinctrl {
aspeed,external-nodes = <&gfx &lhc>;
};
&gpio {
pin_gpio_c7 {
gpio-hog;
gpios = <ASPEED_GPIO(C, 7) GPIO_ACTIVE_HIGH>;
output;
line-name = "BIOS_SPI_MUX_S";
};
};

View File

@ -100,7 +100,7 @@
gpio-keys {
compatible = "gpio-keys";
burn-in-signal {
event-burn-in-signal {
label = "burn-in";
gpios = <&gpio ASPEED_GPIO(R, 5) GPIO_ACTIVE_LOW>;
linux,code = <ASPEED_GPIO(R, 5)>;
@ -111,139 +111,139 @@
compatible = "gpio-keys-polled";
poll-interval = <1000>;
rear-riser1-presence {
event-rear-riser1-presence {
label = "rear-riser1-presence";
gpios = <&pca0 1 GPIO_ACTIVE_LOW>;
linux,code = <1>;
};
alrt-pvddq-cpu0 {
event-alrt-pvddq-cpu0 {
label = "alrt-pvddq-cpu0";
gpios = <&pca0 8 GPIO_ACTIVE_LOW>;
linux,code = <2>;
};
rear-riser0-presence {
event-rear-riser0-presence {
label = "rear-riser0-presence";
gpios = <&pca0 9 GPIO_ACTIVE_LOW>;
linux,code = <3>;
};
fault-pvddq-cpu0 {
event-fault-pvddq-cpu0 {
label = "fault-pvddq-cpu0";
gpios = <&pca0 10 GPIO_ACTIVE_LOW>;
linux,code = <4>;
};
alrt-pvddq-cpu1 {
event-alrt-pvddq-cpu1 {
label = "alrt-pvddq-cpu1";
gpios = <&pca0 11 GPIO_ACTIVE_LOW>;
linux,code = <5>;
};
fault-pvddq-cpu1 {
event-fault-pvddq-cpu1 {
label = "alrt-pvddq-cpu1";
gpios = <&pca0 12 GPIO_ACTIVE_LOW>;
linux,code = <6>;
};
fault-pvccin-cpu1 {
event-fault-pvccin-cpu1 {
label = "fault-pvccin-cpuq";
gpios = <&pca0 13 GPIO_ACTIVE_LOW>;
linux,code = <7>;
};
bmc-rom0-wp {
event-bmc-rom0-wp {
label = "bmc-rom0-wp";
gpios = <&pca1 0 GPIO_ACTIVE_LOW>;
linux,code = <8>;
};
bmc-rom1-wp {
event-bmc-rom1-wp {
label = "bmc-rom1-wp";
gpios = <&pca1 1 GPIO_ACTIVE_LOW>;
linux,code = <9>;
};
fan0-presence {
event-fan0-presence {
label = "fan0-presence";
gpios = <&pca1 2 GPIO_ACTIVE_LOW>;
linux,code = <10>;
};
fan1-presence {
event-fan1-presence {
label = "fan1-presence";
gpios = <&pca1 3 GPIO_ACTIVE_LOW>;
linux,code = <11>;
};
fan2-presence {
event-fan2-presence {
label = "fan2-presence";
gpios = <&pca1 4 GPIO_ACTIVE_LOW>;
linux,code = <12>;
};
fan3-presence {
event-fan3-presence {
label = "fan3-presence";
gpios = <&pca1 5 GPIO_ACTIVE_LOW>;
linux,code = <13>;
};
fan4-presence {
event-fan4-presence {
label = "fan4-presence";
gpios = <&pca1 6 GPIO_ACTIVE_LOW>;
linux,code = <14>;
};
fan5-presence {
event-fan5-presence {
label = "fan5-presence";
gpios = <&pca1 7 GPIO_ACTIVE_LOW>;
linux,code = <15>;
};
front-bp1-presence {
event-front-bp1-presence {
label = "front-bp1-presence";
gpios = <&pca1 8 GPIO_ACTIVE_LOW>;
linux,code = <16>;
};
rear-bp-presence {
event-rear-bp-presence {
label = "rear-bp-presence";
gpios = <&pca1 9 GPIO_ACTIVE_LOW>;
linux,code = <17>;
};
fault-pvccin-cpu0 {
event-fault-pvccin-cpu0 {
label = "fault-pvccin-cpu0";
gpios = <&pca1 10 GPIO_ACTIVE_LOW>;
linux,code = <18>;
};
alrt-p1v05-pvcc {
event-alrt-p1v05-pvcc {
label = "alrt-p1v05-pvcc1";
gpios = <&pca1 11 GPIO_ACTIVE_LOW>;
linux,code = <19>;
};
fault-p1v05-pvccio {
event-fault-p1v05-pvccio {
label = "alrt-p1v05-pvcc1";
gpios = <&pca1 12 GPIO_ACTIVE_LOW>;
linux,code = <20>;
};
alrt-p1v8-pvccio {
event-alrt-p1v8-pvccio {
label = "alrt-p1v8-pvccio";
gpios = <&pca1 13 GPIO_ACTIVE_LOW>;
linux,code = <21>;
};
fault-p1v8-pvccio {
event-fault-p1v8-pvccio {
label = "fault-p1v8-pvccio";
gpios = <&pca1 14 GPIO_ACTIVE_LOW>;
linux,code = <22>;
};
front-bp0-presence {
event-front-bp0-presence {
label = "front-bp0-presence";
gpios = <&pca1 15 GPIO_ACTIVE_LOW>;
linux,code = <23>;

View File

@ -189,29 +189,27 @@
gpio-keys-polled {
compatible = "gpio-keys-polled";
#address-cells = <1>;
#size-cells = <0>;
poll-interval = <1000>;
fan0-presence {
event-fan0-presence {
label = "fan0-presence";
gpios = <&pca0 15 GPIO_ACTIVE_LOW>;
linux,code = <15>;
};
fan1-presence {
event-fan1-presence {
label = "fan1-presence";
gpios = <&pca0 14 GPIO_ACTIVE_LOW>;
linux,code = <14>;
};
fan2-presence {
event-fan2-presence {
label = "fan2-presence";
gpios = <&pca0 13 GPIO_ACTIVE_LOW>;
linux,code = <13>;
};
fan3-presence {
event-fan3-presence {
label = "fan3-presence";
gpios = <&pca0 12 GPIO_ACTIVE_LOW>;
linux,code = <12>;

View File

@ -179,41 +179,39 @@
gpio-keys-polled {
compatible = "gpio-keys-polled";
#address-cells = <1>;
#size-cells = <0>;
poll-interval = <1000>;
fan0-presence {
event-fan0-presence {
label = "fan0-presence";
gpios = <&pca0 6 GPIO_ACTIVE_LOW>;
linux,code = <6>;
};
fan1-presence {
event-fan1-presence {
label = "fan1-presence";
gpios = <&pca0 7 GPIO_ACTIVE_LOW>;
linux,code = <7>;
};
fan2-presence {
event-fan2-presence {
label = "fan2-presence";
gpios = <&pca0 8 GPIO_ACTIVE_LOW>;
linux,code = <8>;
};
fan3-presence {
event-fan3-presence {
label = "fan3-presence";
gpios = <&pca0 9 GPIO_ACTIVE_LOW>;
linux,code = <9>;
};
fan4-presence {
event-fan4-presence {
label = "fan4-presence";
gpios = <&pca0 10 GPIO_ACTIVE_LOW>;
linux,code = <10>;
};
fan5-presence {
event-fan5-presence {
label = "fan5-presence";
gpios = <&pca0 11 GPIO_ACTIVE_LOW>;
linux,code = <11>;

View File

@ -73,19 +73,19 @@
gpio-keys {
compatible = "gpio-keys";
checkstop {
event-checkstop {
label = "checkstop";
gpios = <&gpio ASPEED_GPIO(B, 3) GPIO_ACTIVE_LOW>;
linux,code = <ASPEED_GPIO(B, 3)>;
};
ps0-presence {
event-ps0-presence {
label = "ps0-presence";
gpios = <&gpio ASPEED_GPIO(F, 0) GPIO_ACTIVE_LOW>;
linux,code = <ASPEED_GPIO(F, 0)>;
};
ps1-presence {
event-ps1-presence {
label = "ps1-presence";
gpios = <&gpio ASPEED_GPIO(F, 1) GPIO_ACTIVE_LOW>;
linux,code = <ASPEED_GPIO(F, 1)>;
@ -97,49 +97,49 @@
compatible = "gpio-keys-polled";
poll-interval = <1000>;
fan0-presence {
event-fan0-presence {
label = "fan0-presence";
gpios = <&pca1 0 GPIO_ACTIVE_LOW>;
linux,code = <1>;
};
fan1-presence {
event-fan1-presence {
label = "fan1-presence";
gpios = <&pca1 1 GPIO_ACTIVE_LOW>;
linux,code = <2>;
};
fan2-presence {
event-fan2-presence {
label = "fan2-presence";
gpios = <&pca1 2 GPIO_ACTIVE_LOW>;
linux,code = <3>;
};
fan3-presence {
event-fan3-presence {
label = "fan3-presence";
gpios = <&pca1 3 GPIO_ACTIVE_LOW>;
linux,code = <4>;
};
fan4-presence {
event-fan4-presence {
label = "fan4-presence";
gpios = <&pca1 4 GPIO_ACTIVE_LOW>;
linux,code = <5>;
};
fan5-presence {
event-fan5-presence {
label = "fan5-presence";
gpios = <&pca1 5 GPIO_ACTIVE_LOW>;
linux,code = <6>;
};
fan6-presence {
event-fan6-presence {
label = "fan6-presence";
gpios = <&pca1 6 GPIO_ACTIVE_LOW>;
linux,code = <7>;
};
fan7-presence {
event-fan7-presence {
label = "fan7-presence";
gpios = <&pca1 7 GPIO_ACTIVE_LOW>;
linux,code = <8>;

View File

@ -92,30 +92,31 @@
gpio-keys {
compatible = "gpio-keys";
air-water {
event-air-water {
label = "air-water";
gpios = <&gpio ASPEED_GPIO(F, 6) GPIO_ACTIVE_LOW>;
linux,code = <ASPEED_GPIO(F, 6)>;
};
checkstop {
event-checkstop {
label = "checkstop";
gpios = <&gpio ASPEED_GPIO(J, 2) GPIO_ACTIVE_LOW>;
linux,code = <ASPEED_GPIO(J, 2)>;
};
ps0-presence {
event-ps0-presence {
label = "ps0-presence";
gpios = <&gpio ASPEED_GPIO(Z, 2) GPIO_ACTIVE_LOW>;
linux,code = <ASPEED_GPIO(Z, 2)>;
};
ps1-presence {
event-ps1-presence {
label = "ps1-presence";
gpios = <&gpio ASPEED_GPIO(Z, 0) GPIO_ACTIVE_LOW>;
linux,code = <ASPEED_GPIO(Z, 0)>;
};
id-button {
button-id {
label = "id-button";
gpios = <&gpio ASPEED_GPIO(F, 1) GPIO_ACTIVE_LOW>;
linux,code = <ASPEED_GPIO(F, 1)>;
@ -126,37 +127,37 @@
compatible = "gpio-keys-polled";
poll-interval = <1000>;
fan0-presence {
event-fan0-presence {
label = "fan0-presence";
gpios = <&pca9552 9 GPIO_ACTIVE_LOW>;
linux,code = <9>;
};
fan1-presence {
event-fan1-presence {
label = "fan1-presence";
gpios = <&pca9552 10 GPIO_ACTIVE_LOW>;
linux,code = <10>;
};
fan2-presence {
event-fan2-presence {
label = "fan2-presence";
gpios = <&pca9552 11 GPIO_ACTIVE_LOW>;
linux,code = <11>;
};
fan3-presence {
event-fan3-presence {
label = "fan3-presence";
gpios = <&pca9552 12 GPIO_ACTIVE_LOW>;
linux,code = <12>;
};
fan4-presence {
event-fan4-presence {
label = "fan4-presence";
gpios = <&pca9552 13 GPIO_ACTIVE_LOW>;
linux,code = <13>;
};
fan5-presence {
event-fan5-presence {
label = "fan5-presence";
gpios = <&pca9552 14 GPIO_ACTIVE_LOW>;
linux,code = <14>;

View File

@ -46,31 +46,31 @@
gpio-keys {
compatible = "gpio-keys";
air-water {
event-air-water {
label = "air-water";
gpios = <&gpio ASPEED_GPIO(F, 6) GPIO_ACTIVE_LOW>;
linux,code = <ASPEED_GPIO(F, 6)>;
};
checkstop {
event-checkstop {
label = "checkstop";
gpios = <&gpio ASPEED_GPIO(J, 2) GPIO_ACTIVE_LOW>;
linux,code = <ASPEED_GPIO(J, 2)>;
};
ps0-presence {
event-ps0-presence {
label = "ps0-presence";
gpios = <&gpio ASPEED_GPIO(Z, 2) GPIO_ACTIVE_LOW>;
linux,code = <ASPEED_GPIO(Z, 2)>;
};
ps1-presence {
event-ps1-presence {
label = "ps1-presence";
gpios = <&gpio ASPEED_GPIO(Z, 0) GPIO_ACTIVE_LOW>;
linux,code = <ASPEED_GPIO(Z, 0)>;
};
id-button {
button-id {
label = "id-button";
gpios = <&gpio ASPEED_GPIO(F, 1) GPIO_ACTIVE_LOW>;
linux,code = <ASPEED_GPIO(F, 1)>;
@ -81,31 +81,31 @@
compatible = "gpio-keys-polled";
poll-interval = <1000>;
fan0-presence {
event-fan0-presence {
label = "fan0-presence";
gpios = <&pca9552 9 GPIO_ACTIVE_LOW>;
linux,code = <9>;
};
fan1-presence {
event-fan1-presence {
label = "fan1-presence";
gpios = <&pca9552 10 GPIO_ACTIVE_LOW>;
linux,code = <10>;
};
fan2-presence {
event-fan2-presence {
label = "fan2-presence";
gpios = <&pca9552 11 GPIO_ACTIVE_LOW>;
linux,code = <11>;
};
fan3-presence {
event-fan3-presence {
label = "fan3-presence";
gpios = <&pca9552 12 GPIO_ACTIVE_LOW>;
linux,code = <12>;
};
fan4-presence {
event-fan4-presence {
label = "fan4-presence";
gpios = <&pca9552 13 GPIO_ACTIVE_LOW>;
linux,code = <13>;

View File

@ -96,7 +96,7 @@
gpio-keys {
compatible = "gpio-keys";
checkstop {
event-checkstop {
label = "checkstop";
gpios = <&gpio ASPEED_GPIO(J, 2) GPIO_ACTIVE_LOW>;
linux,code = <ASPEED_GPIO(J, 2)>;

Some files were not shown because too many files have changed in this diff Show More