powerpc/32s: use CONFIG_PPC_BOOK3S_601 instead of reading PVR
Use CONFIG_PPC_BOOK3S_601 instead of reading PVR to know if it is a 601 or not. Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/909c26db9facd7fe454695b303f952e019dd9eda.1566834712.git.christophe.leroy@c-s.fr
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@ -34,7 +34,16 @@
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#include "head_32.h"
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/* 601 only have IBAT; cr0.eq is set on 601 when using this macro */
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/* 601 only have IBAT */
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#ifdef CONFIG_PPC_BOOK3S_601
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#define LOAD_BAT(n, reg, RA, RB) \
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li RA,0; \
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mtspr SPRN_IBAT##n##U,RA; \
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lwz RA,(n*16)+0(reg); \
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lwz RB,(n*16)+4(reg); \
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mtspr SPRN_IBAT##n##U,RA; \
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mtspr SPRN_IBAT##n##L,RB
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#else
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#define LOAD_BAT(n, reg, RA, RB) \
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/* see the comment for clear_bats() -- Cort */ \
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li RA,0; \
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@ -44,12 +53,11 @@
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lwz RB,(n*16)+4(reg); \
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mtspr SPRN_IBAT##n##U,RA; \
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mtspr SPRN_IBAT##n##L,RB; \
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beq 1f; \
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lwz RA,(n*16)+8(reg); \
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lwz RB,(n*16)+12(reg); \
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mtspr SPRN_DBAT##n##U,RA; \
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mtspr SPRN_DBAT##n##L,RB; \
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1:
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mtspr SPRN_DBAT##n##L,RB
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#endif
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__HEAD
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.stabs "arch/powerpc/kernel/",N_SO,0,0,0f
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@ -820,9 +828,6 @@ load_up_mmu:
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/* Load the BAT registers with the values set up by MMU_init.
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MMU_init takes care of whether we're on a 601 or not. */
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mfpvr r3
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srwi r3,r3,16
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cmpwi r3,1
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lis r3,BATS@ha
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addi r3,r3,BATS@l
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tophys(r3,r3)
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@ -998,11 +1003,8 @@ EXPORT_SYMBOL(switch_mmu_context)
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*/
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clear_bats:
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li r10,0
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mfspr r9,SPRN_PVR
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rlwinm r9,r9,16,16,31 /* r9 = 1 for 601, 4 for 604 */
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cmpwi r9, 1
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beq 1f
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#ifndef CONFIG_PPC_BOOK3S_601
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mtspr SPRN_DBAT0U,r10
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mtspr SPRN_DBAT0L,r10
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mtspr SPRN_DBAT1U,r10
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@ -1011,7 +1013,7 @@ clear_bats:
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mtspr SPRN_DBAT2L,r10
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mtspr SPRN_DBAT3U,r10
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mtspr SPRN_DBAT3L,r10
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1:
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#endif
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mtspr SPRN_IBAT0U,r10
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mtspr SPRN_IBAT0L,r10
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mtspr SPRN_IBAT1U,r10
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@ -1106,10 +1108,7 @@ mmu_off:
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*/
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initial_bats:
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lis r11,PAGE_OFFSET@h
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mfspr r9,SPRN_PVR
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rlwinm r9,r9,16,16,31 /* r9 = 1 for 601, 4 for 604 */
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cmpwi 0,r9,1
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bne 4f
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#ifdef CONFIG_PPC_BOOK3S_601
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ori r11,r11,4 /* set up BAT registers for 601 */
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li r8,0x7f /* valid, block length = 8MB */
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mtspr SPRN_IBAT0U,r11 /* N.B. 601 has valid bit in */
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@ -1122,10 +1121,8 @@ initial_bats:
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addis r8,r8,0x800000@h
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mtspr SPRN_IBAT2U,r11
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mtspr SPRN_IBAT2L,r8
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isync
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blr
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4: tophys(r8,r11)
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#else
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tophys(r8,r11)
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#ifdef CONFIG_SMP
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ori r8,r8,0x12 /* R/W access, M=1 */
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#else
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@ -1137,10 +1134,10 @@ initial_bats:
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mtspr SPRN_DBAT0U,r11 /* bit in upper BAT register */
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mtspr SPRN_IBAT0L,r8
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mtspr SPRN_IBAT0U,r11
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#endif
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isync
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blr
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#ifdef CONFIG_BOOTX_TEXT
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setup_disp_bat:
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/*
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@ -1155,15 +1152,13 @@ setup_disp_bat:
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beqlr
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lwz r11,0(r8)
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lwz r8,4(r8)
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mfspr r9,SPRN_PVR
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rlwinm r9,r9,16,16,31 /* r9 = 1 for 601, 4 for 604 */
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cmpwi 0,r9,1
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beq 1f
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#ifndef CONFIG_PPC_BOOK3S_601
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mtspr SPRN_DBAT3L,r8
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mtspr SPRN_DBAT3U,r11
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blr
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1: mtspr SPRN_IBAT3L,r8
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#else
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mtspr SPRN_IBAT3L,r8
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mtspr SPRN_IBAT3U,r11
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#endif
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blr
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#endif /* CONFIG_BOOTX_TEXT */
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@ -303,11 +303,9 @@ END_FTR_SECTION_IFSET(CPU_FTR_UNIFIED_ID_CACHE)
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mfspr r3,SPRN_L1CSR1
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ori r3,r3,L1CSR1_ICFI|L1CSR1_ICLFR
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mtspr SPRN_L1CSR1,r3
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#elif defined(CONFIG_PPC_BOOK3S_601)
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blr /* for 601, do nothing */
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#else
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mfspr r3,SPRN_PVR
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rlwinm r3,r3,16,16,31
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cmpwi 0,r3,1
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beqlr /* for 601, do nothing */
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/* 603/604 processor - use invalidate-all bit in HID0 */
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mfspr r3,SPRN_HID0
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ori r3,r3,HID0_ICFI
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