[BNX2]: Disable parallel detect on an HP blade.
Because of some board issues, we need to disable parallel detect on an HP blade. Without this patch, the link state can become stuck when it goes into parallel detect mode. Signed-off-by: Michael Chan <mchan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -5362,11 +5362,15 @@ bnx2_test_intr(struct bnx2 *bp)
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return -ENODEV;
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}
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/* Determining link for parallel detection. */
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static int
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bnx2_5706_serdes_has_link(struct bnx2 *bp)
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{
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u32 mode_ctl, an_dbg, exp;
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if (bp->phy_flags & BNX2_PHY_FLAG_NO_PARALLEL)
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return 0;
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bnx2_write_phy(bp, MII_BNX2_MISC_SHADOW, MISC_SHDW_MODE_CTL);
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bnx2_read_phy(bp, MII_BNX2_MISC_SHADOW, &mode_ctl);
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@ -7328,7 +7332,15 @@ bnx2_init_board(struct pci_dev *pdev, struct net_device *dev)
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bp->flags |= BNX2_FLAG_NO_WOL;
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bp->wol = 0;
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}
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if (CHIP_NUM(bp) != CHIP_NUM_5706) {
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if (CHIP_NUM(bp) == CHIP_NUM_5706) {
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/* Don't do parallel detect on this board because of
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* some board problems. The link will not go down
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* if we do parallel detect.
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*/
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if (pdev->subsystem_vendor == PCI_VENDOR_ID_HP &&
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pdev->subsystem_device == 0x310c)
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bp->phy_flags |= BNX2_PHY_FLAG_NO_PARALLEL;
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} else {
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bp->phy_addr = 2;
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if (reg & BNX2_SHARED_HW_CFG_PHY_2_5G)
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bp->phy_flags |= BNX2_PHY_FLAG_2_5G_CAPABLE;
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@ -6673,6 +6673,7 @@ struct bnx2 {
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#define BNX2_PHY_FLAG_DIS_EARLY_DAC 0x00000400
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#define BNX2_PHY_FLAG_REMOTE_PHY_CAP 0x00000800
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#define BNX2_PHY_FLAG_FORCED_DOWN 0x00001000
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#define BNX2_PHY_FLAG_NO_PARALLEL 0x00002000
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u32 mii_bmcr;
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u32 mii_bmsr;
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