davinci: Add NAND flash support for DA850/OMAP-L138
This patch adds platform data for the 512MB NAND Flash found on DA850/OMAP-L138 EVM. Currently it supports only 1-bit ECC. Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
This commit is contained in:
Sudhakar Rajashekhara
Kevin Hilman
parent
700691f27e
commit
38beb929f2
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@ -18,6 +18,10 @@
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#include <linux/i2c.h>
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#include <linux/i2c/at24.h>
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#include <linux/gpio.h>
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#include <linux/platform_device.h>
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#include <linux/mtd/mtd.h>
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#include <linux/mtd/nand.h>
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#include <linux/mtd/partitions.h>
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#include <asm/mach-types.h>
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#include <asm/mach/arch.h>
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@ -26,6 +30,7 @@
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#include <mach/irqs.h>
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#include <mach/cp_intc.h>
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#include <mach/da8xx.h>
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#include <mach/nand.h>
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#define DA850_EVM_PHY_MASK 0x1
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#define DA850_EVM_MDIO_FREQUENCY 2200000 /* PHY bus frequency */
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@ -36,6 +41,74 @@
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#define DA850_MMCSD_CD_PIN GPIO_TO_PIN(4, 0)
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#define DA850_MMCSD_WP_PIN GPIO_TO_PIN(4, 1)
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/* DA850/OMAP-L138 EVM includes a 512 MByte large-page NAND flash
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* (128K blocks). It may be used instead of the (default) SPI flash
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* to boot, using TI's tools to install the secondary boot loader
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* (UBL) and U-Boot.
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*/
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struct mtd_partition da850_evm_nandflash_partition[] = {
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{
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.name = "u-boot env",
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.offset = 0,
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.size = SZ_128K,
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.mask_flags = MTD_WRITEABLE,
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},
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{
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.name = "UBL",
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.offset = MTDPART_OFS_APPEND,
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.size = SZ_128K,
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.mask_flags = MTD_WRITEABLE,
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},
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{
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.name = "u-boot",
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.offset = MTDPART_OFS_APPEND,
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.size = 4 * SZ_128K,
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.mask_flags = MTD_WRITEABLE,
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},
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{
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.name = "kernel",
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.offset = 0x200000,
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.size = SZ_2M,
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.mask_flags = 0,
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},
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{
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.name = "filesystem",
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.offset = MTDPART_OFS_APPEND,
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.size = MTDPART_SIZ_FULL,
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.mask_flags = 0,
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},
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};
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static struct davinci_nand_pdata da850_evm_nandflash_data = {
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.parts = da850_evm_nandflash_partition,
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.nr_parts = ARRAY_SIZE(da850_evm_nandflash_partition),
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.ecc_mode = NAND_ECC_HW,
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.options = NAND_USE_FLASH_BBT,
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};
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static struct resource da850_evm_nandflash_resource[] = {
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{
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.start = DA8XX_AEMIF_CS3_BASE,
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.end = DA8XX_AEMIF_CS3_BASE + SZ_512K + 2 * SZ_1K - 1,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = DA8XX_AEMIF_CTL_BASE,
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.end = DA8XX_AEMIF_CTL_BASE + SZ_32K - 1,
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.flags = IORESOURCE_MEM,
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},
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};
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static struct platform_device da850_evm_nandflash_device = {
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.name = "davinci_nand",
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.id = 1,
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.dev = {
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.platform_data = &da850_evm_nandflash_data,
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},
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.num_resources = ARRAY_SIZE(da850_evm_nandflash_resource),
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.resource = da850_evm_nandflash_resource,
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};
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static struct davinci_i2c_platform_data da850_evm_i2c_0_pdata = {
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.bus_freq = 100, /* kHz */
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.bus_delay = 0, /* usec */
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@ -45,6 +118,10 @@ static struct davinci_uart_config da850_evm_uart_config __initdata = {
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.enabled_uarts = 0x7,
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};
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static struct platform_device *da850_evm_devices[] __initdata = {
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&da850_evm_nandflash_device,
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};
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/* davinci da850 evm audio machine driver */
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static u8 da850_iis_serializer_direction[] = {
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INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
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@ -120,6 +197,14 @@ static __init void da850_evm_init(void)
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struct davinci_soc_info *soc_info = &davinci_soc_info;
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int ret;
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ret = da8xx_pinmux_setup(da850_nand_pins);
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if (ret)
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pr_warning("da850_evm_init: nand mux setup failed: %d\n",
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ret);
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platform_add_devices(da850_evm_devices,
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ARRAY_SIZE(da850_evm_devices));
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ret = da8xx_register_edma();
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if (ret)
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pr_warning("da850_evm_init: edma registration failed: %d\n",
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@ -310,6 +310,13 @@ static struct clk mmcsd_clk = {
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.lpsc = DA8XX_LPSC0_MMC_SD,
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};
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static struct clk aemif_clk = {
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.name = "aemif",
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.parent = &pll0_sysclk3,
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.lpsc = DA8XX_LPSC0_EMIF25,
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.flags = ALWAYS_ENABLED,
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};
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static struct davinci_clk da850_clks[] = {
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CLK(NULL, "ref", &ref_clk),
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CLK(NULL, "pll0", &pll0_clk),
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@ -350,6 +357,7 @@ static struct davinci_clk da850_clks[] = {
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CLK("davinci-mcasp.0", NULL, &mcasp_clk),
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CLK("da8xx_lcdc.0", NULL, &lcdc_clk),
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CLK("davinci_mmc.0", NULL, &mmcsd_clk),
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CLK(NULL, "aemif", &aemif_clk),
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CLK(NULL, NULL, NULL),
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};
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@ -448,6 +456,21 @@ static const struct mux_config da850_pins[] = {
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MUX_CFG(DA850, MMCSD0_DAT_3, 10, 20, 15, 2, false)
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MUX_CFG(DA850, MMCSD0_CLK, 10, 0, 15, 2, false)
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MUX_CFG(DA850, MMCSD0_CMD, 10, 4, 15, 2, false)
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/* EMIF2.5/EMIFA function */
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MUX_CFG(DA850, EMA_D_7, 9, 0, 15, 1, false)
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MUX_CFG(DA850, EMA_D_6, 9, 4, 15, 1, false)
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MUX_CFG(DA850, EMA_D_5, 9, 8, 15, 1, false)
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MUX_CFG(DA850, EMA_D_4, 9, 12, 15, 1, false)
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MUX_CFG(DA850, EMA_D_3, 9, 16, 15, 1, false)
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MUX_CFG(DA850, EMA_D_2, 9, 20, 15, 1, false)
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MUX_CFG(DA850, EMA_D_1, 9, 24, 15, 1, false)
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MUX_CFG(DA850, EMA_D_0, 9, 28, 15, 1, false)
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MUX_CFG(DA850, EMA_A_1, 12, 24, 15, 1, false)
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MUX_CFG(DA850, EMA_A_2, 12, 20, 15, 1, false)
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MUX_CFG(DA850, NEMA_CS_3, 7, 4, 15, 1, false)
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MUX_CFG(DA850, NEMA_CS_4, 7, 8, 15, 1, false)
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MUX_CFG(DA850, NEMA_WE, 7, 16, 15, 1, false)
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MUX_CFG(DA850, NEMA_OE, 7, 20, 15, 1, false)
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/* GPIO function */
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MUX_CFG(DA850, GPIO2_15, 5, 0, 15, 8, false)
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MUX_CFG(DA850, GPIO8_10, 18, 28, 15, 8, false)
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@ -514,6 +537,14 @@ const short da850_mmcsd0_pins[] __initdata = {
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-1
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};
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const short da850_nand_pins[] __initdata = {
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DA850_EMA_D_7, DA850_EMA_D_6, DA850_EMA_D_5, DA850_EMA_D_4,
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DA850_EMA_D_3, DA850_EMA_D_2, DA850_EMA_D_1, DA850_EMA_D_0,
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DA850_EMA_A_1, DA850_EMA_A_2, DA850_NEMA_CS_3, DA850_NEMA_CS_4,
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DA850_NEMA_WE, DA850_NEMA_OE,
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-1
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};
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/* FIQ are pri 0-1; otherwise 2-7, with 7 lowest priority */
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static u8 da850_default_priorities[DA850_N_CP_INTC_IRQ] = {
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[IRQ_DA8XX_COMMTX] = 7,
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@ -40,6 +40,8 @@
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#define DA8XX_PSC1_BASE 0x01e27000
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#define DA8XX_LCD_CNTRL_BASE 0x01e13000
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#define DA8XX_MMCSD0_BASE 0x01c40000
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#define DA8XX_AEMIF_CS3_BASE 0x62000000
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#define DA8XX_AEMIF_CTL_BASE 0x68000000
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#define PINMUX0 0x00
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#define PINMUX1 0x04
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@ -110,6 +112,7 @@ extern const short da850_cpgmac_pins[];
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extern const short da850_mcasp_pins[];
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extern const short da850_lcdcntl_pins[];
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extern const short da850_mmcsd0_pins[];
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extern const short da850_nand_pins[];
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int da8xx_pinmux_setup(const short pins[]);
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@ -806,6 +806,22 @@ enum davinci_da850_index {
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DA850_MMCSD0_CLK,
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DA850_MMCSD0_CMD,
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/* EMIF2.5/EMIFA function */
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DA850_EMA_D_7,
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DA850_EMA_D_6,
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DA850_EMA_D_5,
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DA850_EMA_D_4,
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DA850_EMA_D_3,
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DA850_EMA_D_2,
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DA850_EMA_D_1,
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DA850_EMA_D_0,
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DA850_EMA_A_1,
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DA850_EMA_A_2,
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DA850_NEMA_CS_3,
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DA850_NEMA_CS_4,
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DA850_NEMA_WE,
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DA850_NEMA_OE,
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/* GPIO function */
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DA850_GPIO2_15,
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DA850_GPIO8_10,
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