amd-iommu: make address allocator aware of multiple aperture ranges
This patch changes the AMD IOMMU address allocator to allow up to 32 aperture ranges per dma_ops domain. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
This commit is contained in:
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53812c115c
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384de72910
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@ -195,7 +195,12 @@
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#define PD_DEFAULT_MASK (1UL << 1) /* domain is a default dma_ops
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domain for an IOMMU */
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#define APERTURE_RANGE_SIZE (128 * 1024 * 1024)
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#define APERTURE_RANGE_SHIFT 27 /* 128 MB */
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#define APERTURE_RANGE_SIZE (1ULL << APERTURE_RANGE_SHIFT)
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#define APERTURE_RANGE_PAGES (APERTURE_RANGE_SIZE >> PAGE_SHIFT)
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#define APERTURE_MAX_RANGES 32 /* allows 4GB of DMA address space */
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#define APERTURE_RANGE_INDEX(a) ((a) >> APERTURE_RANGE_SHIFT)
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#define APERTURE_PAGE_INDEX(a) (((a) >> 21) & 0x3fULL)
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/*
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* This structure contains generic data for IOMMU protection domains
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@ -227,6 +232,8 @@ struct aperture_range {
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* just calculate its address in constant time.
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*/
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u64 *pte_pages[64];
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unsigned long offset;
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};
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/*
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@ -245,7 +252,7 @@ struct dma_ops_domain {
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unsigned long next_bit;
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/* address space relevant data */
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struct aperture_range aperture;
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struct aperture_range *aperture[APERTURE_MAX_RANGES];
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/* This will be set to true when TLB needs to be flushed */
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bool need_flush;
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@ -578,7 +578,7 @@ static int dma_ops_unity_map(struct dma_ops_domain *dma_dom,
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*/
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if (addr < dma_dom->aperture_size)
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__set_bit(addr >> PAGE_SHIFT,
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dma_dom->aperture.bitmap);
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dma_dom->aperture[0]->bitmap);
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}
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return 0;
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@ -615,43 +615,74 @@ static int init_unity_mappings_for_device(struct dma_ops_domain *dma_dom,
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****************************************************************************/
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/*
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* The address allocator core function.
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* The address allocator core functions.
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*
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* called with domain->lock held
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*/
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static unsigned long dma_ops_area_alloc(struct device *dev,
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struct dma_ops_domain *dom,
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unsigned int pages,
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unsigned long align_mask,
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u64 dma_mask,
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unsigned long start)
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{
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unsigned long next_bit = dom->next_bit % APERTURE_RANGE_PAGES;
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int max_index = dom->aperture_size >> APERTURE_RANGE_SHIFT;
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int i = start >> APERTURE_RANGE_SHIFT;
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unsigned long boundary_size;
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unsigned long address = -1;
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unsigned long limit;
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boundary_size = ALIGN(dma_get_seg_boundary(dev) + 1,
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PAGE_SIZE) >> PAGE_SHIFT;
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for (;i < max_index; ++i) {
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unsigned long offset = dom->aperture[i]->offset >> PAGE_SHIFT;
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if (dom->aperture[i]->offset >= dma_mask)
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break;
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limit = iommu_device_max_index(APERTURE_RANGE_PAGES, offset,
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dma_mask >> PAGE_SHIFT);
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address = iommu_area_alloc(dom->aperture[i]->bitmap,
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limit, next_bit, pages, 0,
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boundary_size, align_mask);
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if (address != -1) {
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address = dom->aperture[i]->offset +
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(address << PAGE_SHIFT);
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dom->next_bit = (address >> PAGE_SHIFT) + pages;
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break;
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}
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next_bit = 0;
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}
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return address;
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}
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static unsigned long dma_ops_alloc_addresses(struct device *dev,
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struct dma_ops_domain *dom,
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unsigned int pages,
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unsigned long align_mask,
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u64 dma_mask)
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{
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unsigned long limit;
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unsigned long address;
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unsigned long boundary_size;
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unsigned long start = dom->next_bit << PAGE_SHIFT;
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boundary_size = ALIGN(dma_get_seg_boundary(dev) + 1,
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PAGE_SIZE) >> PAGE_SHIFT;
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limit = iommu_device_max_index(dom->aperture_size >> PAGE_SHIFT, 0,
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dma_mask >> PAGE_SHIFT);
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if (dom->next_bit >= limit) {
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dom->next_bit = 0;
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dom->need_flush = true;
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}
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address = dma_ops_area_alloc(dev, dom, pages, align_mask,
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dma_mask, start);
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address = iommu_area_alloc(dom->aperture.bitmap, limit, dom->next_bit,
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pages, 0 , boundary_size, align_mask);
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if (address == -1) {
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address = iommu_area_alloc(dom->aperture.bitmap, limit, 0,
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pages, 0, boundary_size,
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align_mask);
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dom->next_bit = 0;
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address = dma_ops_area_alloc(dev, dom, pages, align_mask,
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dma_mask, 0);
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dom->need_flush = true;
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}
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if (likely(address != -1)) {
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dom->next_bit = address + pages;
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address <<= PAGE_SHIFT;
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} else
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if (unlikely(address == -1))
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address = bad_dma_address;
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WARN_ON((address + (PAGE_SIZE*pages)) > dom->aperture_size);
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@ -668,11 +699,17 @@ static void dma_ops_free_addresses(struct dma_ops_domain *dom,
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unsigned long address,
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unsigned int pages)
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{
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address >>= PAGE_SHIFT;
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iommu_area_free(dom->aperture.bitmap, address, pages);
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unsigned i = address >> APERTURE_RANGE_SHIFT;
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struct aperture_range *range = dom->aperture[i];
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if (address >= dom->next_bit)
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BUG_ON(i >= APERTURE_MAX_RANGES || range == NULL);
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if ((address >> PAGE_SHIFT) >= dom->next_bit)
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dom->need_flush = true;
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address = (address % APERTURE_RANGE_SIZE) >> PAGE_SHIFT;
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iommu_area_free(range->bitmap, address, pages);
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}
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/****************************************************************************
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@ -720,12 +757,16 @@ static void dma_ops_reserve_addresses(struct dma_ops_domain *dom,
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unsigned long start_page,
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unsigned int pages)
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{
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unsigned int last_page = dom->aperture_size >> PAGE_SHIFT;
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unsigned int i, last_page = dom->aperture_size >> PAGE_SHIFT;
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if (start_page + pages > last_page)
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pages = last_page - start_page;
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iommu_area_reserve(dom->aperture.bitmap, start_page, pages);
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for (i = start_page; i < start_page + pages; ++i) {
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int index = i / APERTURE_RANGE_PAGES;
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int page = i % APERTURE_RANGE_PAGES;
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__set_bit(page, dom->aperture[index]->bitmap);
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}
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}
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static void free_pagetable(struct protection_domain *domain)
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@ -764,12 +805,19 @@ static void free_pagetable(struct protection_domain *domain)
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*/
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static void dma_ops_domain_free(struct dma_ops_domain *dom)
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{
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int i;
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if (!dom)
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return;
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free_pagetable(&dom->domain);
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free_page((unsigned long)dom->aperture.bitmap);
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for (i = 0; i < APERTURE_MAX_RANGES; ++i) {
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if (!dom->aperture[i])
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continue;
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free_page((unsigned long)dom->aperture[i]->bitmap);
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kfree(dom->aperture[i]);
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}
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kfree(dom);
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}
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@ -797,6 +845,11 @@ static struct dma_ops_domain *dma_ops_domain_alloc(struct amd_iommu *iommu,
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if (!dma_dom)
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return NULL;
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dma_dom->aperture[0] = kzalloc(sizeof(struct aperture_range),
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GFP_KERNEL);
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if (!dma_dom->aperture[0])
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goto free_dma_dom;
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spin_lock_init(&dma_dom->domain.lock);
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dma_dom->domain.id = domain_id_alloc();
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@ -809,14 +862,14 @@ static struct dma_ops_domain *dma_ops_domain_alloc(struct amd_iommu *iommu,
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if (!dma_dom->domain.pt_root)
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goto free_dma_dom;
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dma_dom->aperture_size = APERTURE_RANGE_SIZE;
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dma_dom->aperture.bitmap = (void *)get_zeroed_page(GFP_KERNEL);
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if (!dma_dom->aperture.bitmap)
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dma_dom->aperture[0]->bitmap = (void *)get_zeroed_page(GFP_KERNEL);
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if (!dma_dom->aperture[0]->bitmap)
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goto free_dma_dom;
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/*
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* mark the first page as allocated so we never return 0 as
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* a valid dma-address. So we can use 0 as error value
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*/
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dma_dom->aperture.bitmap[0] = 1;
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dma_dom->aperture[0]->bitmap[0] = 1;
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dma_dom->next_bit = 0;
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dma_dom->need_flush = false;
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@ -846,7 +899,7 @@ static struct dma_ops_domain *dma_ops_domain_alloc(struct amd_iommu *iommu,
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dma_dom->domain.pt_root[0] = IOMMU_L2_PDE(virt_to_phys(l2_pde));
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for (i = 0; i < num_pte_pages; ++i) {
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u64 **pte_page = &dma_dom->aperture.pte_pages[i];
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u64 **pte_page = &dma_dom->aperture[0]->pte_pages[i];
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*pte_page = (u64 *)get_zeroed_page(GFP_KERNEL);
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if (!*pte_page)
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goto free_dma_dom;
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@ -1164,14 +1217,19 @@ static u64* alloc_pte(struct protection_domain *dom,
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static u64* dma_ops_get_pte(struct dma_ops_domain *dom,
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unsigned long address)
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{
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struct aperture_range *aperture = &dom->aperture;
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struct aperture_range *aperture;
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u64 *pte, *pte_page;
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pte = aperture->pte_pages[IOMMU_PTE_L1_INDEX(address)];
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aperture = dom->aperture[APERTURE_RANGE_INDEX(address)];
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if (!aperture)
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return NULL;
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pte = aperture->pte_pages[APERTURE_PAGE_INDEX(address)];
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if (!pte) {
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pte = alloc_pte(&dom->domain, address, &pte_page, GFP_ATOMIC);
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aperture->pte_pages[IOMMU_PTE_L1_INDEX(address)] = pte_page;
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}
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aperture->pte_pages[APERTURE_PAGE_INDEX(address)] = pte_page;
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} else
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pte += IOMMU_PTE_L0_INDEX(address);
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return pte;
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}
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@ -1219,14 +1277,20 @@ static void dma_ops_domain_unmap(struct amd_iommu *iommu,
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struct dma_ops_domain *dom,
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unsigned long address)
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{
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struct aperture_range *aperture;
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u64 *pte;
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if (address >= dom->aperture_size)
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return;
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WARN_ON(address & ~PAGE_MASK || address >= dom->aperture_size);
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aperture = dom->aperture[APERTURE_RANGE_INDEX(address)];
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if (!aperture)
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return;
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pte = aperture->pte_pages[APERTURE_PAGE_INDEX(address)];
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if (!pte)
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return;
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pte = dom->aperture.pte_pages[IOMMU_PTE_L1_INDEX(address)];
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pte += IOMMU_PTE_L0_INDEX(address);
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WARN_ON(!*pte);
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