KVM: PPC: Move ONE_REG AltiVec support to powerpc
Move ONE_REG AltiVec support to powerpc generic layer. Signed-off-by: Mihai Caraman <mihai.caraman@freescale.com> Signed-off-by: Alexander Graf <agraf@suse.de>
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@ -476,6 +476,11 @@ struct kvm_get_htab_header {
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/* FP and vector status/control registers */
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#define KVM_REG_PPC_FPSCR (KVM_REG_PPC | KVM_REG_SIZE_U64 | 0x80)
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/*
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* VSCR register is documented as a 32-bit register in the ISA, but it can
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* only be accesses via a vector register. Expose VSCR as a 32-bit register
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* even though the kernel represents it as a 128-bit vector.
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*/
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#define KVM_REG_PPC_VSCR (KVM_REG_PPC | KVM_REG_SIZE_U32 | 0x81)
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/* Virtual processor areas */
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@ -558,25 +558,6 @@ int kvmppc_get_one_reg(struct kvm_vcpu *vcpu, u64 id,
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case KVM_REG_PPC_FPSCR:
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*val = get_reg_val(id, vcpu->arch.fp.fpscr);
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break;
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#ifdef CONFIG_ALTIVEC
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case KVM_REG_PPC_VR0 ... KVM_REG_PPC_VR31:
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if (!cpu_has_feature(CPU_FTR_ALTIVEC)) {
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r = -ENXIO;
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break;
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}
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val->vval = vcpu->arch.vr.vr[id - KVM_REG_PPC_VR0];
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break;
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case KVM_REG_PPC_VSCR:
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if (!cpu_has_feature(CPU_FTR_ALTIVEC)) {
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r = -ENXIO;
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break;
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}
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*val = get_reg_val(id, vcpu->arch.vr.vscr.u[3]);
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break;
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case KVM_REG_PPC_VRSAVE:
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*val = get_reg_val(id, vcpu->arch.vrsave);
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break;
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#endif /* CONFIG_ALTIVEC */
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#ifdef CONFIG_VSX
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case KVM_REG_PPC_VSR0 ... KVM_REG_PPC_VSR31:
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if (cpu_has_feature(CPU_FTR_VSX)) {
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@ -653,29 +634,6 @@ int kvmppc_set_one_reg(struct kvm_vcpu *vcpu, u64 id,
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case KVM_REG_PPC_FPSCR:
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vcpu->arch.fp.fpscr = set_reg_val(id, *val);
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break;
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#ifdef CONFIG_ALTIVEC
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case KVM_REG_PPC_VR0 ... KVM_REG_PPC_VR31:
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if (!cpu_has_feature(CPU_FTR_ALTIVEC)) {
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r = -ENXIO;
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break;
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}
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vcpu->arch.vr.vr[id - KVM_REG_PPC_VR0] = val->vval;
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break;
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case KVM_REG_PPC_VSCR:
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if (!cpu_has_feature(CPU_FTR_ALTIVEC)) {
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r = -ENXIO;
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break;
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}
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vcpu->arch.vr.vscr.u[3] = set_reg_val(id, *val);
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break;
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case KVM_REG_PPC_VRSAVE:
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if (!cpu_has_feature(CPU_FTR_ALTIVEC)) {
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r = -ENXIO;
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break;
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}
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vcpu->arch.vrsave = set_reg_val(id, *val);
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break;
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#endif /* CONFIG_ALTIVEC */
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#ifdef CONFIG_VSX
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case KVM_REG_PPC_VSR0 ... KVM_REG_PPC_VSR31:
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if (cpu_has_feature(CPU_FTR_VSX)) {
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@ -921,6 +921,29 @@ int kvm_vcpu_ioctl_get_one_reg(struct kvm_vcpu *vcpu, struct kvm_one_reg *reg)
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if (r == -EINVAL) {
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r = 0;
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switch (reg->id) {
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#ifdef CONFIG_ALTIVEC
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case KVM_REG_PPC_VR0 ... KVM_REG_PPC_VR31:
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if (!cpu_has_feature(CPU_FTR_ALTIVEC)) {
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r = -ENXIO;
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break;
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}
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vcpu->arch.vr.vr[reg->id - KVM_REG_PPC_VR0] = val.vval;
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break;
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case KVM_REG_PPC_VSCR:
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if (!cpu_has_feature(CPU_FTR_ALTIVEC)) {
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r = -ENXIO;
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break;
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}
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vcpu->arch.vr.vscr.u[3] = set_reg_val(reg->id, val);
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break;
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case KVM_REG_PPC_VRSAVE:
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if (!cpu_has_feature(CPU_FTR_ALTIVEC)) {
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r = -ENXIO;
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break;
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}
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vcpu->arch.vrsave = set_reg_val(reg->id, val);
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break;
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#endif /* CONFIG_ALTIVEC */
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default:
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r = -EINVAL;
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break;
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@ -953,6 +976,25 @@ int kvm_vcpu_ioctl_set_one_reg(struct kvm_vcpu *vcpu, struct kvm_one_reg *reg)
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if (r == -EINVAL) {
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r = 0;
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switch (reg->id) {
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#ifdef CONFIG_ALTIVEC
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case KVM_REG_PPC_VR0 ... KVM_REG_PPC_VR31:
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if (!cpu_has_feature(CPU_FTR_ALTIVEC)) {
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r = -ENXIO;
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break;
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}
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val.vval = vcpu->arch.vr.vr[reg->id - KVM_REG_PPC_VR0];
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break;
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case KVM_REG_PPC_VSCR:
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if (!cpu_has_feature(CPU_FTR_ALTIVEC)) {
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r = -ENXIO;
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break;
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}
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val = get_reg_val(reg->id, vcpu->arch.vr.vscr.u[3]);
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break;
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case KVM_REG_PPC_VRSAVE:
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val = get_reg_val(reg->id, vcpu->arch.vrsave);
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break;
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#endif /* CONFIG_ALTIVEC */
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default:
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r = -EINVAL;
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break;
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