powerpc/pci: Implement pci_resource_to_user() with pcibios_resource_to_bus()
"User" addresses are shown in /sys/devices/pci.../.../resource and /proc/bus/pci/devices and used as mmap offsets for /proc/bus/pci/BB/DD.F files. For I/O port resources on powerpc, these are PCI bus addresses, i.e., raw BAR values. Previously pci_resource_to_user() computed the user address by subtracting "hose->io_base_virt - _IO_BASE" from the resource start: pci_resource_to_user() if (IO) offset = (unsigned long)hose->io_base_virt - _IO_BASE; *start = rsrc->start - offset; We've already told the PCI core about that "hose->io_base_virt - _IO_BASE" offset: pcibios_setup_phb_resources() res = &hose->io_resource; offset = pcibios_io_space_offset(); /* i.e., "offset = hose->io_base_virt - _IO_BASE" */ pci_add_resource_offset(resources, res, offset); so pcibios_resource_to_bus() knows how to do that translation. No functional change intended. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Yinghai Lu <yinghai@kernel.org>
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@ -581,39 +581,25 @@ void pci_resource_to_user(const struct pci_dev *dev, int bar,
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const struct resource *rsrc,
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resource_size_t *start, resource_size_t *end)
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{
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struct pci_controller *hose = pci_bus_to_host(dev->bus);
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resource_size_t offset = 0;
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struct pci_bus_region region;
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if (hose == NULL)
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if (rsrc->flags & IORESOURCE_IO) {
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pcibios_resource_to_bus(dev->bus, ®ion,
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(struct resource *) rsrc);
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*start = region.start;
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*end = region.end;
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return;
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}
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if (rsrc->flags & IORESOURCE_IO)
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offset = (unsigned long)hose->io_base_virt - _IO_BASE;
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/* We pass a fully fixed up address to userland for MMIO instead of
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* a BAR value because X is lame and expects to be able to use that
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* to pass to /dev/mem !
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/* We pass a CPU physical address to userland for MMIO instead of a
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* BAR value because X is lame and expects to be able to use that
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* to pass to /dev/mem!
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*
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* That means that we'll have potentially 64 bits values where some
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* userland apps only expect 32 (like X itself since it thinks only
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* Sparc has 64 bits MMIO) but if we don't do that, we break it on
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* 32 bits CHRPs :-(
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*
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* Hopefully, the sysfs insterface is immune to that gunk. Once X
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* has been fixed (and the fix spread enough), we can re-enable the
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* 2 lines below and pass down a BAR value to userland. In that case
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* we'll also have to re-enable the matching code in
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* __pci_mmap_make_offset().
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*
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* BenH.
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* That means we may have 64-bit values where some apps only expect
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* 32 (like X itself since it thinks only Sparc has 64-bit MMIO).
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*/
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#if 0
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else if (rsrc->flags & IORESOURCE_MEM)
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offset = hose->pci_mem_offset;
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#endif
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*start = rsrc->start - offset;
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*end = rsrc->end - offset;
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*start = rsrc->start;
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*end = rsrc->end;
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}
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/**
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