PCI: Hide pci_reset_bridge_secondary_bus() from drivers
Rename pci_reset_bridge_secondary_bus() to pci_bridge_secondary_bus_reset() and move the declaration from linux/pci.h to drivers/pci.h to be used internally in PCI directory only. Signed-off-by: Sinan Kaya <okaya@codeaurora.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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@ -746,7 +746,7 @@ int pciehp_reset_slot(struct slot *slot, int probe)
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if (pciehp_poll_mode)
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del_timer_sync(&ctrl->poll_timer);
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rc = pci_reset_bridge_secondary_bus(ctrl->pcie->port);
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rc = pci_bridge_secondary_bus_reset(ctrl->pcie->port);
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pcie_capability_write_word(pdev, PCI_EXP_SLTSTA, stat_mask);
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pcie_write_cmd_nowait(ctrl, ctrl_mask, ctrl_mask);
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@ -4224,19 +4224,18 @@ void __weak pcibios_reset_secondary_bus(struct pci_dev *dev)
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}
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/**
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* pci_reset_bridge_secondary_bus - Reset the secondary bus on a PCI bridge.
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* pci_bridge_secondary_bus_reset - Reset the secondary bus on a PCI bridge.
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* @dev: Bridge device
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*
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* Use the bridge control register to assert reset on the secondary bus.
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* Devices on the secondary bus are left in power-on state.
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*/
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int pci_reset_bridge_secondary_bus(struct pci_dev *dev)
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int pci_bridge_secondary_bus_reset(struct pci_dev *dev)
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{
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pcibios_reset_secondary_bus(dev);
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return pci_dev_wait(dev, "bus reset", PCIE_RESET_READY_POLL_MS);
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}
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EXPORT_SYMBOL_GPL(pci_reset_bridge_secondary_bus);
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static int pci_parent_bus_reset(struct pci_dev *dev, int probe)
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{
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@ -4253,7 +4252,7 @@ static int pci_parent_bus_reset(struct pci_dev *dev, int probe)
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if (probe)
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return 0;
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return pci_reset_bridge_secondary_bus(dev->bus->self);
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return pci_bridge_secondary_bus_reset(dev->bus->self);
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}
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static int pci_reset_hotplug_slot(struct hotplug_slot *hotplug, int probe)
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@ -4860,7 +4859,7 @@ static int pci_bus_reset(struct pci_bus *bus, int probe)
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might_sleep();
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ret = pci_reset_bridge_secondary_bus(bus->self);
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ret = pci_bridge_secondary_bus_reset(bus->self);
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pci_bus_unlock(bus);
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@ -4924,7 +4923,7 @@ int pci_try_reset_bus(struct pci_bus *bus)
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if (pci_bus_trylock(bus)) {
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might_sleep();
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rc = pci_reset_bridge_secondary_bus(bus->self);
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rc = pci_bridge_secondary_bus_reset(bus->self);
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pci_bus_unlock(bus);
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} else
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rc = -EAGAIN;
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@ -33,6 +33,7 @@ int pci_mmap_fits(struct pci_dev *pdev, int resno, struct vm_area_struct *vmai,
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enum pci_mmap_api mmap_api);
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int pci_probe_reset_function(struct pci_dev *dev);
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int pci_bridge_secondary_bus_reset(struct pci_dev *dev);
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/**
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* struct pci_platform_pm_ops - Firmware PM callbacks
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@ -1314,7 +1314,7 @@ static pci_ers_result_t aer_root_reset(struct pci_dev *dev)
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reg32 &= ~ROOT_PORT_INTR_ON_MESG_MASK;
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pci_write_config_dword(dev, pos + PCI_ERR_ROOT_COMMAND, reg32);
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rc = pci_reset_bridge_secondary_bus(dev);
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rc = pci_bridge_secondary_bus_reset(dev);
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pci_printk(KERN_DEBUG, dev, "Root Port link has been reset\n");
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/* Clear Root Error Status */
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@ -177,7 +177,7 @@ static pci_ers_result_t default_reset_link(struct pci_dev *dev)
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{
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int rc;
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rc = pci_reset_bridge_secondary_bus(dev);
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rc = pci_bridge_secondary_bus_reset(dev);
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pci_printk(KERN_DEBUG, dev, "downstream link has been reset\n");
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return rc ? PCI_ERS_RESULT_DISCONNECT : PCI_ERS_RESULT_RECOVERED;
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}
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@ -1103,7 +1103,6 @@ int pci_reset_bus(struct pci_bus *bus);
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int pci_try_reset_bus(struct pci_bus *bus);
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void pci_reset_secondary_bus(struct pci_dev *dev);
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void pcibios_reset_secondary_bus(struct pci_dev *dev);
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int pci_reset_bridge_secondary_bus(struct pci_dev *dev);
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void pci_update_resource(struct pci_dev *dev, int resno);
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int __must_check pci_assign_resource(struct pci_dev *dev, int i);
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int __must_check pci_reassign_resource(struct pci_dev *dev, int i, resource_size_t add_size, resource_size_t align);
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