drm/amd/display: Increase timeout for DP Disable

[WHY]
When disabling DP video, the current REG_WAIT timeout
of 50ms is too low for certain cases with very high
VSYNC intervals.

[HOW]
Increase the timeout to 102ms, so that
refresh rates as low as 10Hz can be handled properly.

Signed-off-by: Wesley Chalmers <Wesley.Chalmers@amd.com>
Reviewed-by: Aric Cyr <Aric.Cyr@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: <stable@vger.kernel.org>
This commit is contained in:
Wesley Chalmers 2020-09-09 17:41:53 -04:00 committed by Alex Deucher
parent 25b3158172
commit 37b7cb10f0
1 changed files with 2 additions and 2 deletions

View File

@ -896,10 +896,10 @@ void enc1_stream_encoder_dp_blank(
*/ */
REG_UPDATE(DP_VID_STREAM_CNTL, DP_VID_STREAM_DIS_DEFER, 2); REG_UPDATE(DP_VID_STREAM_CNTL, DP_VID_STREAM_DIS_DEFER, 2);
/* Larger delay to wait until VBLANK - use max retry of /* Larger delay to wait until VBLANK - use max retry of
* 10us*5000=50ms. This covers 41.7ms of minimum 24 Hz mode + * 10us*10200=102ms. This covers 100.0ms of minimum 10 Hz mode +
* a little more because we may not trust delay accuracy. * a little more because we may not trust delay accuracy.
*/ */
max_retries = DP_BLANK_MAX_RETRY * 250; max_retries = DP_BLANK_MAX_RETRY * 501;
/* disable DP stream */ /* disable DP stream */
REG_UPDATE(DP_VID_STREAM_CNTL, DP_VID_STREAM_ENABLE, 0); REG_UPDATE(DP_VID_STREAM_CNTL, DP_VID_STREAM_ENABLE, 0);