drm/tegra: hdmi: Resets are synchronous
Resets on Tegra are synchronous, so keep the clock enabled while asserting the reset. Signed-off-by: Thierry Reding <treding@nvidia.com>
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@ -1394,8 +1394,8 @@ static int tegra_hdmi_exit(struct host1x_client *client)
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tegra_output_exit(&hdmi->output);
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clk_disable_unprepare(hdmi->clk);
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reset_control_assert(hdmi->rst);
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clk_disable_unprepare(hdmi->clk);
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regulator_disable(hdmi->vdd);
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regulator_disable(hdmi->pll);
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