wil6210: update target reset to support new HW
Support for new chip revision. Revision read from the internal register, PCIE config's "revision id" register do not indicate HW version properly Signed-off-by: Vladimir Kondratiev <qca_vkondrat@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
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@ -230,14 +230,22 @@ void wil_priv_deinit(struct wil6210_priv *wil)
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static void wil_target_reset(struct wil6210_priv *wil)
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{
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int delay = 100;
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u32 baud_rate;
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u32 rev_id;
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wil_dbg_misc(wil, "Resetting...\n");
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/* register read */
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#define R(a) ioread32(wil->csr + HOSTADDR(a))
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/* register write */
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#define W(a, v) iowrite32(v, wil->csr + HOSTADDR(a))
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/* register set = read, OR, write */
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#define S(a, v) iowrite32(ioread32(wil->csr + HOSTADDR(a)) | v, \
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wil->csr + HOSTADDR(a))
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wil->hw_version = R(RGF_FW_REV_ID);
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rev_id = wil->hw_version & 0xff;
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/* hpal_perst_from_pad_src_n_mask */
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S(RGF_USER_CLKS_CTL_SW_RST_MASK_0, BIT(6));
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/* car_perst_rst_src_n_mask */
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@ -257,11 +265,30 @@ static void wil_target_reset(struct wil6210_priv *wil)
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W(RGF_USER_CLKS_CTL_SW_RST_VEC_0, 0);
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W(RGF_USER_CLKS_CTL_SW_RST_VEC_3, 0x00000001);
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W(RGF_USER_CLKS_CTL_SW_RST_VEC_2, 0x00000080);
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if (rev_id == 1) {
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W(RGF_USER_CLKS_CTL_SW_RST_VEC_2, 0x00000080);
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} else {
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W(RGF_LOS_COUNTER_CTL, BIT(6) | BIT(8));
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W(RGF_USER_CLKS_CTL_SW_RST_VEC_2, 0x00008000);
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}
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W(RGF_USER_CLKS_CTL_SW_RST_VEC_0, 0);
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/* wait until device ready. Use baud rate */
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do {
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msleep(1);
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baud_rate = R(RGF_USER_SERIAL_BAUD_RATE);
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if (delay-- < 0) {
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wil_err(wil, "Reset not completed\n");
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return;
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}
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} while (baud_rate != 0x15e);
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if (rev_id == 2)
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W(RGF_LOS_COUNTER_CTL, BIT(8));
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wil_dbg_misc(wil, "Reset completed\n");
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#undef R
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#undef W
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#undef S
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}
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@ -74,6 +74,8 @@ static int wil_if_pcie_enable(struct wil6210_priv *wil)
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if (rc)
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goto release_irq;
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wil_info(wil, "HW version: 0x%08x\n", wil->hw_version);
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return 0;
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release_irq:
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@ -74,6 +74,9 @@ struct RGF_ICR {
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} __packed;
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/* registers - FW addresses */
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#define RGF_FW_REV_ID (0x880a8c) /* chip revision */
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#define RGF_USER_SERIAL_BAUD_RATE (0x880050)
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#define RGF_LOS_COUNTER_CTL (0x882dc4)
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#define RGF_USER_USER_SCRATCH_PAD (0x8802bc)
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#define RGF_USER_USER_ICR (0x880b4c) /* struct RGF_ICR */
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#define BIT_USER_USER_ICR_SW_INT_2 BIT(18)
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@ -342,6 +345,7 @@ struct wil6210_priv {
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void __iomem *csr;
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ulong status;
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u32 fw_version;
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u32 hw_version;
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u8 n_mids; /* number of additional MIDs as reported by FW */
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/* profile */
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u32 monitor_flags;
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