dt-bindings: clock: imx8mp: Add ids for the audio shared gate
All these IDs are for one single HW gate (CCGR101) that is shared between these root clocks. Signed-off-by: Abel Vesa <abel.vesa@nxp.com> Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Abel Vesa <abel.vesa@linaro.org> Signed-off-by: Abel Vesa <abel.vesa@linaro.org> Link: https://lore.kernel.org/r/1667811007-19222-2-git-send-email-shengjiu.wang@nxp.com
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#define IMX8MP_CLK_CLKOUT2_DIV 318
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#define IMX8MP_CLK_CLKOUT2 319
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#define IMX8MP_CLK_USB_SUSP 320
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#define IMX8MP_CLK_AUDIO_AHB_ROOT IMX8MP_CLK_AUDIO_ROOT
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#define IMX8MP_CLK_AUDIO_AXI_ROOT 321
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#define IMX8MP_CLK_SAI1_ROOT 322
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#define IMX8MP_CLK_SAI2_ROOT 323
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#define IMX8MP_CLK_SAI3_ROOT 324
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#define IMX8MP_CLK_SAI5_ROOT 325
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#define IMX8MP_CLK_SAI6_ROOT 326
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#define IMX8MP_CLK_SAI7_ROOT 327
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#define IMX8MP_CLK_PDM_ROOT 328
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#define IMX8MP_CLK_END 321
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#define IMX8MP_CLK_END 329
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#define IMX8MP_CLK_AUDIOMIX_SAI1_IPG 0
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#define IMX8MP_CLK_AUDIOMIX_SAI1_MCLK1 1
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