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net: hns3: refactor dump reg dcb info of debugfs 

Currently, the debugfs command for reg dcb info is implemented by
"echo xxxx > cmd", and record the information in dmesg. It's
unnecessary and heavy. To improve it, create a single file
"dcb" for it, and query it by command "cat dcb",
return the result to userspace, rather than record in dmesg.

The display style is below:
$ cat dcb
qset_id  roce_qset_mask  nic_qset_mask  qset_shaping_pass  qset_bp_status
0000           0x1            0x1             0x1               0x0
0001           0x1            0x1             0x1               0x0
0002           0x1            0x1             0x1               0x0
0003           0x1            0x1             0x1               0x0
0004           0x1            0x1             0x1               0x0
0005           0x1            0x1             0x1               0x0
0006           0x1            0x1             0x1               0x0
0007           0x1            0x1             0x1               0x0
pri_id  pri_mask  pri_cshaping_pass  pri_pshaping_pass
000       0x1           0x0                0x1
001       0x1           0x0                0x0
002       0x1           0x0                0x0
003       0x1           0x0                0x0
004       0x1           0x0                0x0
005       0x1           0x0                0x0
006       0x1           0x0                0x0
007       0x1           0x0                0x0
pg_id  pg_mask  pg_cshaping_pass  pg_pshaping_pass
000      0x1           0x0               0x1

Signed-off-by: Yufeng Mo <moyufeng@huawei.com>
Signed-off-by: Huazhong Tan <tanhuazhong@huawei.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Yufeng Mo 2021-05-20 10:21:31 +08:00 committed by David S. Miller
parent d96b0e5946
commit 365e860aa7
3 changed files with 213 additions and 98 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
drivers/net/ethernet/hisilicon/hns3/hnae3.h
View File

@ -275,6 +275,7 @@ enum hnae3_dbg_cmd {
HNAE3_DBG_CMD_REG_RCB, HNAE3_DBG_CMD_REG_RCB,
HNAE3_DBG_CMD_REG_TQP, HNAE3_DBG_CMD_REG_TQP,
HNAE3_DBG_CMD_REG_MAC, HNAE3_DBG_CMD_REG_MAC,
HNAE3_DBG_CMD_REG_DCB,
HNAE3_DBG_CMD_UNKNOWN, HNAE3_DBG_CMD_UNKNOWN,
}; };

18
drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c
View File

@ -205,6 +205,13 @@ static struct hns3_dbg_cmd_info hns3_dbg_cmd[] = {
.buf_len = HNS3_DBG_READ_LEN, .buf_len = HNS3_DBG_READ_LEN,
.init = hns3_dbg_common_file_init, .init = hns3_dbg_common_file_init,
}, },
{
.name = "dcb",
.cmd = HNAE3_DBG_CMD_REG_DCB,
.dentry = HNS3_DBG_DENTRY_REG,
.buf_len = HNS3_DBG_READ_LEN,
.init = hns3_dbg_common_file_init,
},
}; };
static struct hns3_dbg_cap_info hns3_dbg_cap[] = { static struct hns3_dbg_cap_info hns3_dbg_cap[] = {
@ -581,10 +588,6 @@ static int hns3_dbg_tx_bd_info(struct hns3_dbg_data *d, char *buf, int len)
static void hns3_dbg_help(struct hnae3_handle *h) static void hns3_dbg_help(struct hnae3_handle *h)
{ {
#define HNS3_DBG_BUF_LEN 256
char printf_buf[HNS3_DBG_BUF_LEN];
dev_info(&h->pdev->dev, "available commands\n"); dev_info(&h->pdev->dev, "available commands\n");
dev_info(&h->pdev->dev, "queue info <number>\n"); dev_info(&h->pdev->dev, "queue info <number>\n");
dev_info(&h->pdev->dev, "queue map\n"); dev_info(&h->pdev->dev, "queue map\n");
@ -601,13 +604,6 @@ static void hns3_dbg_help(struct hnae3_handle *h)
dev_info(&h->pdev->dev, "dump qos buf cfg\n"); dev_info(&h->pdev->dev, "dump qos buf cfg\n");
dev_info(&h->pdev->dev, "dump mac tnl status\n"); dev_info(&h->pdev->dev, "dump mac tnl status\n");
dev_info(&h->pdev->dev, "dump qs shaper [qs id]\n"); dev_info(&h->pdev->dev, "dump qs shaper [qs id]\n");
memset(printf_buf, 0, HNS3_DBG_BUF_LEN);
strncat(printf_buf, "dump reg dcb <port_id> <pri_id> <pg_id>",
HNS3_DBG_BUF_LEN - 1);
strncat(printf_buf + strlen(printf_buf), " <rq_id> <nq_id> <qset_id>\n",
HNS3_DBG_BUF_LEN - strlen(printf_buf) - 1);
dev_info(&h->pdev->dev, "%s", printf_buf);
} }
static void static void

294
drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c
View File

@ -388,120 +388,237 @@ static int hclge_dbg_dump_mac(struct hclge_dev *hdev, char *buf, int len)
return hclge_dbg_dump_mac_speed_duplex(hdev, buf, len, &pos); return hclge_dbg_dump_mac_speed_duplex(hdev, buf, len, &pos);
} }
static void hclge_dbg_dump_dcb(struct hclge_dev *hdev, const char *cmd_buf) static int hclge_dbg_dump_dcb_qset(struct hclge_dev *hdev, char *buf, int len,
int *pos)
{ {
struct device *dev = &hdev->pdev->dev;
struct hclge_dbg_bitmap_cmd *bitmap; struct hclge_dbg_bitmap_cmd *bitmap;
enum hclge_opcode_type cmd; struct hclge_desc desc;
int rq_id, pri_id, qset_id; u16 qset_id, qset_num;
int port_id, nq_id, pg_id; int ret;
struct hclge_desc desc[2];
int cnt, ret; ret = hclge_tm_get_qset_num(hdev, &qset_num);
if (ret)
return ret;
cnt = sscanf(cmd_buf, "%i %i %i %i %i %i", *pos += scnprintf(buf + *pos, len - *pos,
&port_id, &pri_id, &pg_id, &rq_id, &nq_id, &qset_id); "qset_id roce_qset_mask nic_qset_mask qset_shaping_pass qset_bp_status\n");
if (cnt != 6) { for (qset_id = 0; qset_id < qset_num; qset_id++) {
dev_err(&hdev->pdev->dev, ret = hclge_dbg_cmd_send(hdev, &desc, qset_id, 1,
"dump dcb: bad command parameter, cnt=%d\n", cnt); HCLGE_OPC_QSET_DFX_STS);
return; if (ret)
return ret;
bitmap = (struct hclge_dbg_bitmap_cmd *)&desc.data[1];
*pos += scnprintf(buf + *pos, len - *pos,
"%04u %#x %#x %#x %#x\n",
qset_id, bitmap->bit0, bitmap->bit1,
bitmap->bit2, bitmap->bit3);
} }
cmd = HCLGE_OPC_QSET_DFX_STS; return 0;
ret = hclge_dbg_cmd_send(hdev, desc, qset_id, 1, cmd); }
static int hclge_dbg_dump_dcb_pri(struct hclge_dev *hdev, char *buf, int len,
int *pos)
{
struct hclge_dbg_bitmap_cmd *bitmap;
struct hclge_desc desc;
u8 pri_id, pri_num;
int ret;
ret = hclge_tm_get_pri_num(hdev, &pri_num);
if (ret) if (ret)
goto err_dcb_cmd_send; return ret;
bitmap = (struct hclge_dbg_bitmap_cmd *)&desc[0].data[1]; *pos += scnprintf(buf + *pos, len - *pos,
dev_info(dev, "roce_qset_mask: 0x%x\n", bitmap->bit0); "pri_id pri_mask pri_cshaping_pass pri_pshaping_pass\n");
dev_info(dev, "nic_qs_mask: 0x%x\n", bitmap->bit1); for (pri_id = 0; pri_id < pri_num; pri_id++) {
dev_info(dev, "qs_shaping_pass: 0x%x\n", bitmap->bit2); ret = hclge_dbg_cmd_send(hdev, &desc, pri_id, 1,
dev_info(dev, "qs_bp_sts: 0x%x\n", bitmap->bit3); HCLGE_OPC_PRI_DFX_STS);
cmd = HCLGE_OPC_PRI_DFX_STS;
ret = hclge_dbg_cmd_send(hdev, desc, pri_id, 1, cmd);
if (ret) if (ret)
goto err_dcb_cmd_send; return ret;
bitmap = (struct hclge_dbg_bitmap_cmd *)&desc[0].data[1]; bitmap = (struct hclge_dbg_bitmap_cmd *)&desc.data[1];
dev_info(dev, "pri_mask: 0x%x\n", bitmap->bit0);
dev_info(dev, "pri_cshaping_pass: 0x%x\n", bitmap->bit1);
dev_info(dev, "pri_pshaping_pass: 0x%x\n", bitmap->bit2);
cmd = HCLGE_OPC_PG_DFX_STS; *pos += scnprintf(buf + *pos, len - *pos,
ret = hclge_dbg_cmd_send(hdev, desc, pg_id, 1, cmd); "%03u %#x %#x %#x\n",
pri_id, bitmap->bit0, bitmap->bit1,
bitmap->bit2);
}
return 0;
}
static int hclge_dbg_dump_dcb_pg(struct hclge_dev *hdev, char *buf, int len,
int *pos)
{
struct hclge_dbg_bitmap_cmd *bitmap;
struct hclge_desc desc;
u8 pg_id;
int ret;
*pos += scnprintf(buf + *pos, len - *pos,
"pg_id pg_mask pg_cshaping_pass pg_pshaping_pass\n");
for (pg_id = 0; pg_id < hdev->tm_info.num_pg; pg_id++) {
ret = hclge_dbg_cmd_send(hdev, &desc, pg_id, 1,
HCLGE_OPC_PG_DFX_STS);
if (ret) if (ret)
goto err_dcb_cmd_send; return ret;
bitmap = (struct hclge_dbg_bitmap_cmd *)&desc[0].data[1]; bitmap = (struct hclge_dbg_bitmap_cmd *)&desc.data[1];
dev_info(dev, "pg_mask: 0x%x\n", bitmap->bit0);
dev_info(dev, "pg_cshaping_pass: 0x%x\n", bitmap->bit1);
dev_info(dev, "pg_pshaping_pass: 0x%x\n", bitmap->bit2);
cmd = HCLGE_OPC_PORT_DFX_STS; *pos += scnprintf(buf + *pos, len - *pos,
ret = hclge_dbg_cmd_send(hdev, desc, port_id, 1, cmd); "%03u %#x %#x %#x\n",
pg_id, bitmap->bit0, bitmap->bit1,
bitmap->bit2);
}
return 0;
}
static int hclge_dbg_dump_dcb_queue(struct hclge_dev *hdev, char *buf, int len,
int *pos)
{
struct hclge_desc desc;
u16 nq_id;
int ret;
*pos += scnprintf(buf + *pos, len - *pos,
"nq_id sch_nic_queue_cnt sch_roce_queue_cnt\n");
for (nq_id = 0; nq_id < hdev->num_tqps; nq_id++) {
ret = hclge_dbg_cmd_send(hdev, &desc, nq_id, 1,
HCLGE_OPC_SCH_NQ_CNT);
if (ret) if (ret)
goto err_dcb_cmd_send; return ret;
bitmap = (struct hclge_dbg_bitmap_cmd *)&desc[0].data[1]; *pos += scnprintf(buf + *pos, len - *pos, "%04u %#x",
dev_info(dev, "port_mask: 0x%x\n", bitmap->bit0); nq_id, le32_to_cpu(desc.data[1]));
dev_info(dev, "port_shaping_pass: 0x%x\n", bitmap->bit1);
cmd = HCLGE_OPC_SCH_NQ_CNT; ret = hclge_dbg_cmd_send(hdev, &desc, nq_id, 1,
ret = hclge_dbg_cmd_send(hdev, desc, nq_id, 1, cmd); HCLGE_OPC_SCH_RQ_CNT);
if (ret) if (ret)
goto err_dcb_cmd_send; return ret;
dev_info(dev, "sch_nq_cnt: 0x%x\n", le32_to_cpu(desc[0].data[1])); *pos += scnprintf(buf + *pos, len - *pos,
" %#x\n",
le32_to_cpu(desc.data[1]));
}
cmd = HCLGE_OPC_SCH_RQ_CNT; return 0;
ret = hclge_dbg_cmd_send(hdev, desc, nq_id, 1, cmd); }
static int hclge_dbg_dump_dcb_port(struct hclge_dev *hdev, char *buf, int len,
int *pos)
{
struct hclge_dbg_bitmap_cmd *bitmap;
struct hclge_desc desc;
u8 port_id = 0;
int ret;
ret = hclge_dbg_cmd_send(hdev, &desc, port_id, 1,
HCLGE_OPC_PORT_DFX_STS);
if (ret) if (ret)
goto err_dcb_cmd_send; return ret;
dev_info(dev, "sch_rq_cnt: 0x%x\n", le32_to_cpu(desc[0].data[1])); bitmap = (struct hclge_dbg_bitmap_cmd *)&desc.data[1];
cmd = HCLGE_OPC_TM_INTERNAL_STS; *pos += scnprintf(buf + *pos, len - *pos, "port_mask: %#x\n",
ret = hclge_dbg_cmd_send(hdev, desc, 0, 2, cmd); bitmap->bit0);
*pos += scnprintf(buf + *pos, len - *pos, "port_shaping_pass: %#x\n",
bitmap->bit1);
return 0;
}
static int hclge_dbg_dump_dcb_tm(struct hclge_dev *hdev, char *buf, int len,
int *pos)
{
struct hclge_desc desc[2];
u8 port_id = 0;
int ret;
ret = hclge_dbg_cmd_send(hdev, desc, port_id, 1,
HCLGE_OPC_TM_INTERNAL_CNT);
if (ret) if (ret)
goto err_dcb_cmd_send; return ret;
dev_info(dev, "pri_bp: 0x%x\n", le32_to_cpu(desc[0].data[1])); *pos += scnprintf(buf + *pos, len - *pos, "SCH_NIC_NUM: %#x\n",
dev_info(dev, "fifo_dfx_info: 0x%x\n", le32_to_cpu(desc[0].data[2])); le32_to_cpu(desc[0].data[1]));
dev_info(dev, "sch_roce_fifo_afull_gap: 0x%x\n", *pos += scnprintf(buf + *pos, len - *pos, "SCH_ROCE_NUM: %#x\n",
le32_to_cpu(desc[0].data[2]));
ret = hclge_dbg_cmd_send(hdev, desc, port_id, 2,
HCLGE_OPC_TM_INTERNAL_STS);
if (ret)
return ret;
*pos += scnprintf(buf + *pos, len - *pos, "pri_bp: %#x\n",
le32_to_cpu(desc[0].data[1]));
*pos += scnprintf(buf + *pos, len - *pos, "fifo_dfx_info: %#x\n",
le32_to_cpu(desc[0].data[2]));
*pos += scnprintf(buf + *pos, len - *pos,
"sch_roce_fifo_afull_gap: %#x\n",
le32_to_cpu(desc[0].data[3])); le32_to_cpu(desc[0].data[3]));
dev_info(dev, "tx_private_waterline: 0x%x\n", *pos += scnprintf(buf + *pos, len - *pos,
"tx_private_waterline: %#x\n",
le32_to_cpu(desc[0].data[4])); le32_to_cpu(desc[0].data[4]));
dev_info(dev, "tm_bypass_en: 0x%x\n", le32_to_cpu(desc[0].data[5])); *pos += scnprintf(buf + *pos, len - *pos, "tm_bypass_en: %#x\n",
dev_info(dev, "SSU_TM_BYPASS_EN: 0x%x\n", le32_to_cpu(desc[1].data[0]));
dev_info(dev, "SSU_RESERVE_CFG: 0x%x\n", le32_to_cpu(desc[1].data[1]));
cmd = HCLGE_OPC_TM_INTERNAL_CNT;
ret = hclge_dbg_cmd_send(hdev, desc, port_id, 1, cmd);
if (ret)
goto err_dcb_cmd_send;
dev_info(dev, "SCH_NIC_NUM: 0x%x\n", le32_to_cpu(desc[0].data[1]));
dev_info(dev, "SCH_ROCE_NUM: 0x%x\n", le32_to_cpu(desc[0].data[2]));
cmd = HCLGE_OPC_TM_INTERNAL_STS_1;
ret = hclge_dbg_cmd_send(hdev, desc, port_id, 1, cmd);
if (ret)
goto err_dcb_cmd_send;
dev_info(dev, "TC_MAP_SEL: 0x%x\n", le32_to_cpu(desc[0].data[1]));
dev_info(dev, "IGU_PFC_PRI_EN: 0x%x\n", le32_to_cpu(desc[0].data[2]));
dev_info(dev, "MAC_PFC_PRI_EN: 0x%x\n", le32_to_cpu(desc[0].data[3]));
dev_info(dev, "IGU_PRI_MAP_TC_CFG: 0x%x\n",
le32_to_cpu(desc[0].data[4]));
dev_info(dev, "IGU_TX_PRI_MAP_TC_CFG: 0x%x\n",
le32_to_cpu(desc[0].data[5])); le32_to_cpu(desc[0].data[5]));
return; *pos += scnprintf(buf + *pos, len - *pos, "SSU_TM_BYPASS_EN: %#x\n",
le32_to_cpu(desc[1].data[0]));
*pos += scnprintf(buf + *pos, len - *pos, "SSU_RESERVE_CFG: %#x\n",
le32_to_cpu(desc[1].data[1]));
err_dcb_cmd_send: if (hdev->hw.mac.media_type == HNAE3_MEDIA_TYPE_COPPER)
dev_err(&hdev->pdev->dev, return 0;
"failed to dump dcb dfx, cmd = %#x, ret = %d\n",
cmd, ret); ret = hclge_dbg_cmd_send(hdev, desc, port_id, 1,
HCLGE_OPC_TM_INTERNAL_STS_1);
if (ret)
return ret;
*pos += scnprintf(buf + *pos, len - *pos, "TC_MAP_SEL: %#x\n",
le32_to_cpu(desc[0].data[1]));
*pos += scnprintf(buf + *pos, len - *pos, "IGU_PFC_PRI_EN: %#x\n",
le32_to_cpu(desc[0].data[2]));
*pos += scnprintf(buf + *pos, len - *pos, "MAC_PFC_PRI_EN: %#x\n",
le32_to_cpu(desc[0].data[3]));
*pos += scnprintf(buf + *pos, len - *pos, "IGU_PRI_MAP_TC_CFG: %#x\n",
le32_to_cpu(desc[0].data[4]));
*pos += scnprintf(buf + *pos, len - *pos,
"IGU_TX_PRI_MAP_TC_CFG: %#x\n",
le32_to_cpu(desc[0].data[5]));
return 0;
}
static int hclge_dbg_dump_dcb(struct hclge_dev *hdev, char *buf, int len)
{
int pos = 0;
int ret;
ret = hclge_dbg_dump_dcb_qset(hdev, buf, len, &pos);
if (ret)
return ret;
ret = hclge_dbg_dump_dcb_pri(hdev, buf, len, &pos);
if (ret)
return ret;
ret = hclge_dbg_dump_dcb_pg(hdev, buf, len, &pos);
if (ret)
return ret;
ret = hclge_dbg_dump_dcb_queue(hdev, buf, len, &pos);
if (ret)
return ret;
ret = hclge_dbg_dump_dcb_port(hdev, buf, len, &pos);
if (ret)
return ret;
return hclge_dbg_dump_dcb_tm(hdev, buf, len, &pos);
} }
static int hclge_dbg_dump_reg_cmd(struct hclge_dev *hdev, static int hclge_dbg_dump_reg_cmd(struct hclge_dev *hdev,
@ -1872,7 +1989,6 @@ static int hclge_dbg_dump_mac_mc(struct hclge_dev *hdev, char *buf, int len)
int hclge_dbg_run_cmd(struct hnae3_handle *handle, const char *cmd_buf) int hclge_dbg_run_cmd(struct hnae3_handle *handle, const char *cmd_buf)
{ {
#define DUMP_REG_DCB "dump reg dcb"
#define DUMP_TM_MAP "dump tm map" #define DUMP_TM_MAP "dump tm map"
struct hclge_vport *vport = hclge_get_vport(handle); struct hclge_vport *vport = hclge_get_vport(handle);
@ -1892,8 +2008,6 @@ int hclge_dbg_run_cmd(struct hnae3_handle *handle, const char *cmd_buf)
hclge_dbg_dump_qos_pri_map(hdev); hclge_dbg_dump_qos_pri_map(hdev);
} else if (strncmp(cmd_buf, "dump qos buf cfg", 16) == 0) { } else if (strncmp(cmd_buf, "dump qos buf cfg", 16) == 0) {
hclge_dbg_dump_qos_buf_cfg(hdev); hclge_dbg_dump_qos_buf_cfg(hdev);
} else if (strncmp(cmd_buf, DUMP_REG_DCB, strlen(DUMP_REG_DCB)) == 0) {
hclge_dbg_dump_dcb(hdev, &cmd_buf[sizeof(DUMP_REG_DCB)]);
} else if (strncmp(cmd_buf, "dump serv info", 14) == 0) { } else if (strncmp(cmd_buf, "dump serv info", 14) == 0) {
hclge_dbg_dump_serv_info(hdev); hclge_dbg_dump_serv_info(hdev);
} else if (strncmp(cmd_buf, "dump mac tnl status", 19) == 0) { } else if (strncmp(cmd_buf, "dump mac tnl status", 19) == 0) {
@ -1994,6 +2108,10 @@ static const struct hclge_dbg_func hclge_dbg_cmd_func[] = {
.cmd = HNAE3_DBG_CMD_REG_MAC, .cmd = HNAE3_DBG_CMD_REG_MAC,
.dbg_dump = hclge_dbg_dump_mac, .dbg_dump = hclge_dbg_dump_mac,
}, },
{
.cmd = HNAE3_DBG_CMD_REG_DCB,
.dbg_dump = hclge_dbg_dump_dcb,
},
}; };
int hclge_dbg_read_cmd(struct hnae3_handle *handle, enum hnae3_dbg_cmd cmd, int hclge_dbg_read_cmd(struct hnae3_handle *handle, enum hnae3_dbg_cmd cmd,