arm64: dts: exynos: Add initial E850-96 board support
E850-96 is a 96boards development board manufactured by WinLink. It incorporates Samsung Exynos850 SoC, and is compatible with 96boards mezzanine boards [1], as it follows 96boards standards. This patch adds minimal support for E850-96 board. Next features are enabled in board dts file and verified with minimal BusyBox rootfs: * User buttons * LEDs * Serial console * Watchdog timers * RTC * eMMC [1] https://www.96boards.org/products/mezzanine/ Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org> Link: https://lore.kernel.org/r/20220131130849.2667-3-semen.protsenko@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
This commit is contained in:
Sam Protsenko
Krzysztof Kozlowski
parent
bfb3c7fa39
commit
363e52998c
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@ -3,4 +3,5 @@ dtb-$(CONFIG_ARCH_EXYNOS) += \
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exynos5433-tm2.dtb \
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exynos5433-tm2e.dtb \
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exynos7-espresso.dtb \
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exynos850-e850-96.dtb \
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exynosautov9-sadk.dtb
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@ -0,0 +1,195 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* WinLink E850-96 board device tree source
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*
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* Copyright (C) 2018 Samsung Electronics Co., Ltd.
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* Copyright (C) 2021 Linaro Ltd.
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*
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* Device tree source file for WinLink's E850-96 board which is based on
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* Samsung Exynos850 SoC.
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*/
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/dts-v1/;
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#include "exynos850.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/leds/common.h>
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/ {
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model = "WinLink E850-96 board";
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compatible = "winlink,e850-96", "samsung,exynos850";
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chosen {
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stdout-path = &serial_0;
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};
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/*
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* RAM: 4 GiB (eMCP):
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* - 2 GiB at 0x80000000
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* - 2 GiB at 0x880000000
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*
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* 0xbab00000..0xbfffffff: secure memory (85 MiB).
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*/
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memory@80000000 {
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device_type = "memory";
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reg = <0x0 0x80000000 0x3ab00000>,
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<0x0 0xc0000000 0x40000000>,
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<0x8 0x80000000 0x80000000>;
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};
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gpio-keys {
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compatible = "gpio-keys";
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pinctrl-names = "default";
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pinctrl-0 = <&key_voldown_pins &key_volup_pins>;
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volume-down-key {
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label = "Volume Down";
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linux,code = <KEY_VOLUMEDOWN>;
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gpios = <&gpa1 0 GPIO_ACTIVE_LOW>;
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};
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volume-up-key {
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label = "Volume Up";
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linux,code = <KEY_VOLUMEUP>;
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gpios = <&gpa0 7 GPIO_ACTIVE_LOW>;
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};
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};
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leds {
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compatible = "gpio-leds";
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/* HEART_BEAT_LED */
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user_led1: led-1 {
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label = "yellow:user1";
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gpios = <&gpg2 2 GPIO_ACTIVE_HIGH>;
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color = <LED_COLOR_ID_YELLOW>;
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function = LED_FUNCTION_HEARTBEAT;
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linux,default-trigger = "heartbeat";
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};
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/* eMMC_LED */
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user_led2: led-2 {
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label = "yellow:user2";
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gpios = <&gpg2 3 GPIO_ACTIVE_HIGH>;
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color = <LED_COLOR_ID_YELLOW>;
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linux,default-trigger = "mmc0";
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};
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/* SD_LED */
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user_led3: led-3 {
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label = "white:user3";
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gpios = <&gpg2 4 GPIO_ACTIVE_HIGH>;
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color = <LED_COLOR_ID_WHITE>;
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function = LED_FUNCTION_SD;
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linux,default-trigger = "mmc2";
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};
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/* WIFI_LED */
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wlan_active_led: led-4 {
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label = "yellow:wlan";
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gpios = <&gpg2 6 GPIO_ACTIVE_HIGH>;
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color = <LED_COLOR_ID_YELLOW>;
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function = LED_FUNCTION_WLAN;
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linux,default-trigger = "phy0tx";
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default-state = "off";
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};
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/* BLUETOOTH_LED */
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bt_active_led: led-5 {
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label = "blue:bt";
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gpios = <&gpg2 7 GPIO_ACTIVE_HIGH>;
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color = <LED_COLOR_ID_BLUE>;
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function = LED_FUNCTION_BLUETOOTH;
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linux,default-trigger = "hci0rx";
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default-state = "off";
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};
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};
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/*
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* RTC clock (XrtcXTI); external, must be 32.768 kHz.
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*
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* TODO: Remove this once RTC clock is implemented properly as part of
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* PMIC driver.
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*/
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rtcclk: clock-rtcclk {
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compatible = "fixed-clock";
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clock-output-names = "rtcclk";
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#clock-cells = <0>;
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clock-frequency = <32768>;
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};
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};
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&cmu_hsi {
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clocks = <&oscclk>, <&rtcclk>,
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<&cmu_top CLK_DOUT_HSI_BUS>,
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<&cmu_top CLK_DOUT_HSI_MMC_CARD>,
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<&cmu_top CLK_DOUT_HSI_USB20DRD>;
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clock-names = "oscclk", "rtcclk", "dout_hsi_bus",
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"dout_hsi_mmc_card", "dout_hsi_usb20drd";
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};
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&mmc_0 {
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status = "okay";
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mmc-hs200-1_8v;
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mmc-hs400-1_8v;
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cap-mmc-highspeed;
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non-removable;
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mmc-hs400-enhanced-strobe;
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card-detect-delay = <200>;
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clock-frequency = <800000000>;
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bus-width = <8>;
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samsung,dw-mshc-ciu-div = <3>;
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samsung,dw-mshc-sdr-timing = <0 4>;
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samsung,dw-mshc-ddr-timing = <2 4>;
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samsung,dw-mshc-hs400-timing = <0 2>;
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pinctrl-names = "default";
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pinctrl-0 = <&sd0_clk_pins &sd0_cmd_pins &sd0_rdqs_pins &sd0_nreset_pins
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&sd0_bus1_pins &sd0_bus4_pins &sd0_bus8_pins>;
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};
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&oscclk {
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clock-frequency = <26000000>;
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};
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&pinctrl_alive {
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key_voldown_pins: key-voldown-pins {
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samsung,pins = "gpa1-0";
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samsung,pin-function = <EXYNOS_PIN_FUNC_EINT>;
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samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
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samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
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};
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key_volup_pins: key-volup-pins {
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samsung,pins = "gpa0-7";
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samsung,pin-function = <EXYNOS_PIN_FUNC_EINT>;
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samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
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samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
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};
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};
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&rtc {
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status = "okay";
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clocks = <&cmu_apm CLK_GOUT_RTC_PCLK>, <&rtcclk>;
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clock-names = "rtc", "rtc_src";
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};
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&serial_0 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&uart1_pins>;
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};
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&usi_uart {
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samsung,clkreq-on; /* needed for UART mode */
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status = "okay";
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};
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&watchdog_cl0 {
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status = "okay";
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};
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&watchdog_cl1 {
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status = "okay";
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};
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