net/mlx5e: Vxlan, move vxlan logic to core driver
Move vxlan logic and objects to mlx5 core dirver. Since it going to be used from different mlx5 interfaces. e.g. mlx5e PF NIC netdev and mlx5e E-Switch representors. Signed-off-by: Saeed Mahameed <saeedm@mellanox.com> Reviewed-by: Or Gerlitz <ogerlitz@mellanox.com>
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@ -14,8 +14,8 @@ mlx5_core-$(CONFIG_MLX5_FPGA) += fpga/cmd.o fpga/core.o fpga/conn.o fpga/sdk.o \
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fpga/ipsec.o fpga/tls.o
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mlx5_core-$(CONFIG_MLX5_CORE_EN) += en_main.o en_common.o en_fs.o en_ethtool.o \
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en_tx.o en_rx.o en_dim.o en_txrx.o en/xdp.o en_stats.o vxlan.o \
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en_arfs.o en_fs_ethtool.o en_selftest.o en/port.o
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en_tx.o en_rx.o en_dim.o en_txrx.o en/xdp.o en_stats.o \
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en_arfs.o en_fs_ethtool.o en_selftest.o en/port.o lib/vxlan.o
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mlx5_core-$(CONFIG_MLX5_MPFS) += lib/mpfs.o
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@ -52,7 +52,6 @@
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#include "wq.h"
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#include "mlx5_core.h"
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#include "en_stats.h"
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#include "vxlan.h"
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struct page_pool;
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@ -812,7 +811,6 @@ struct mlx5e_priv {
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u32 tx_rates[MLX5E_MAX_NUM_SQS];
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struct mlx5e_flow_steering fs;
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struct mlx5_vxlan *vxlan;
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struct workqueue_struct *wq;
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struct work_struct update_carrier_work;
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@ -45,7 +45,7 @@
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#include "en_accel/tls.h"
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#include "accel/ipsec.h"
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#include "accel/tls.h"
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#include "vxlan.h"
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#include "lib/vxlan.h"
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#include "en/port.h"
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#include "en/xdp.h"
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@ -2974,7 +2974,7 @@ int mlx5e_open(struct net_device *netdev)
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mlx5_set_port_admin_status(priv->mdev, MLX5_PORT_UP);
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mutex_unlock(&priv->state_lock);
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if (mlx5_vxlan_allowed(priv->vxlan))
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if (mlx5_vxlan_allowed(priv->mdev->vxlan))
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udp_tunnel_get_rx_info(netdev);
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return err;
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@ -3983,7 +3983,7 @@ static void mlx5e_vxlan_add_work(struct work_struct *work)
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u16 port = vxlan_work->port;
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mutex_lock(&priv->state_lock);
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mlx5_vxlan_add_port(priv->vxlan, port);
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mlx5_vxlan_add_port(priv->mdev->vxlan, port);
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mutex_unlock(&priv->state_lock);
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kfree(vxlan_work);
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@ -3997,7 +3997,7 @@ static void mlx5e_vxlan_del_work(struct work_struct *work)
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u16 port = vxlan_work->port;
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mutex_lock(&priv->state_lock);
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mlx5_vxlan_del_port(priv->vxlan, port);
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mlx5_vxlan_del_port(priv->mdev->vxlan, port);
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mutex_unlock(&priv->state_lock);
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kfree(vxlan_work);
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}
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@ -4028,7 +4028,7 @@ static void mlx5e_add_vxlan_port(struct net_device *netdev,
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if (ti->type != UDP_TUNNEL_TYPE_VXLAN)
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return;
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if (!mlx5_vxlan_allowed(priv->vxlan))
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if (!mlx5_vxlan_allowed(priv->mdev->vxlan))
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return;
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mlx5e_vxlan_queue_work(priv, be16_to_cpu(ti->port), 1);
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@ -4042,7 +4042,7 @@ static void mlx5e_del_vxlan_port(struct net_device *netdev,
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if (ti->type != UDP_TUNNEL_TYPE_VXLAN)
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return;
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if (!mlx5_vxlan_allowed(priv->vxlan))
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if (!mlx5_vxlan_allowed(priv->mdev->vxlan))
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return;
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mlx5e_vxlan_queue_work(priv, be16_to_cpu(ti->port), 0);
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@ -4076,7 +4076,7 @@ static netdev_features_t mlx5e_tunnel_features_check(struct mlx5e_priv *priv,
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port = be16_to_cpu(udph->dest);
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/* Verify if UDP port is being offloaded by HW */
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if (mlx5_vxlan_lookup_port(priv->vxlan, port))
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if (mlx5_vxlan_lookup_port(priv->mdev->vxlan, port))
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return features;
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}
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@ -4648,7 +4648,7 @@ static void mlx5e_build_nic_netdev(struct net_device *netdev)
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netdev->hw_features |= NETIF_F_HW_VLAN_CTAG_FILTER;
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netdev->hw_features |= NETIF_F_HW_VLAN_STAG_TX;
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if (mlx5_vxlan_allowed(priv->vxlan) || MLX5_CAP_ETH(mdev, tunnel_stateless_gre)) {
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if (mlx5_vxlan_allowed(mdev->vxlan) || MLX5_CAP_ETH(mdev, tunnel_stateless_gre)) {
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netdev->hw_enc_features |= NETIF_F_IP_CSUM;
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netdev->hw_enc_features |= NETIF_F_IPV6_CSUM;
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netdev->hw_enc_features |= NETIF_F_TSO;
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@ -4656,7 +4656,7 @@ static void mlx5e_build_nic_netdev(struct net_device *netdev)
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netdev->hw_enc_features |= NETIF_F_GSO_PARTIAL;
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}
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if (mlx5_vxlan_allowed(priv->vxlan)) {
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if (mlx5_vxlan_allowed(mdev->vxlan)) {
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netdev->hw_features |= NETIF_F_GSO_UDP_TUNNEL |
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NETIF_F_GSO_UDP_TUNNEL_CSUM;
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netdev->hw_enc_features |= NETIF_F_GSO_UDP_TUNNEL |
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@ -4758,8 +4758,6 @@ static void mlx5e_nic_init(struct mlx5_core_dev *mdev,
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struct mlx5e_priv *priv = netdev_priv(netdev);
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int err;
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priv->vxlan = mlx5_vxlan_create(mdev);
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mlx5e_build_nic_netdev_priv(mdev, netdev, profile, ppriv);
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err = mlx5e_ipsec_init(priv);
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if (err)
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@ -4773,7 +4771,6 @@ static void mlx5e_nic_init(struct mlx5_core_dev *mdev,
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static void mlx5e_nic_cleanup(struct mlx5e_priv *priv)
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{
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mlx5_vxlan_destroy(priv->vxlan);
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mlx5e_tls_cleanup(priv);
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mlx5e_ipsec_cleanup(priv);
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}
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@ -50,7 +50,7 @@
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#include "en_rep.h"
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#include "en_tc.h"
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#include "eswitch.h"
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#include "vxlan.h"
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#include "lib/vxlan.h"
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#include "fs_core.h"
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#include "en/port.h"
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@ -1133,7 +1133,7 @@ static int parse_tunnel_attr(struct mlx5e_priv *priv,
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if (memchr_inv(&mask->dst, 0xff, sizeof(mask->dst)))
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goto vxlan_match_offload_err;
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if (mlx5_vxlan_lookup_port(up_priv->vxlan, be16_to_cpu(key->dst)) &&
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if (mlx5_vxlan_lookup_port(up_priv->mdev->vxlan, be16_to_cpu(key->dst)) &&
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MLX5_CAP_ESW(priv->mdev, vxlan_encap_decap))
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parse_vxlan_attr(spec, f);
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else {
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@ -2557,7 +2557,7 @@ vxlan_encap_offload_err:
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return -EOPNOTSUPP;
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}
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if (mlx5_vxlan_lookup_port(up_priv->vxlan, be16_to_cpu(key->tp_dst)) &&
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if (mlx5_vxlan_lookup_port(up_priv->mdev->vxlan, be16_to_cpu(key->tp_dst)) &&
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MLX5_CAP_ESW(priv->mdev, vxlan_encap_decap)) {
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tunnel_type = MLX5_HEADER_TYPE_VXLAN;
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} else {
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@ -62,6 +62,7 @@
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#include "accel/ipsec.h"
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#include "accel/tls.h"
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#include "lib/clock.h"
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#include "lib/vxlan.h"
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#include "diag/fw_tracer.h"
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MODULE_AUTHOR("Eli Cohen <eli@mellanox.com>");
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@ -961,6 +962,8 @@ static int mlx5_init_once(struct mlx5_core_dev *dev, struct mlx5_priv *priv)
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mlx5_init_clock(dev);
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dev->vxlan = mlx5_vxlan_create(dev);
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err = mlx5_init_rl_table(dev);
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if (err) {
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dev_err(&pdev->dev, "Failed to init rate limiting\n");
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@ -1004,6 +1007,7 @@ err_mpfs_cleanup:
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err_rl_cleanup:
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mlx5_cleanup_rl_table(dev);
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err_tables_cleanup:
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mlx5_vxlan_destroy(dev->vxlan);
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mlx5_cleanup_mkey_table(dev);
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mlx5_cleanup_srq_table(dev);
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mlx5_cleanup_qp_table(dev);
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@ -1024,6 +1028,7 @@ static void mlx5_cleanup_once(struct mlx5_core_dev *dev)
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mlx5_eswitch_cleanup(dev->priv.eswitch);
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mlx5_mpfs_cleanup(dev);
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mlx5_cleanup_rl_table(dev);
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mlx5_vxlan_destroy(dev->vxlan);
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mlx5_cleanup_clock(dev);
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mlx5_cleanup_reserved_gids(dev);
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mlx5_cleanup_mkey_table(dev);
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@ -818,6 +818,7 @@ struct mlx5_clock {
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};
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struct mlx5_fw_tracer;
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struct mlx5_vxlan;
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struct mlx5_core_dev {
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struct pci_dev *pdev;
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@ -850,6 +851,7 @@ struct mlx5_core_dev {
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atomic_t num_qps;
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u32 issi;
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struct mlx5e_resources mlx5e_res;
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struct mlx5_vxlan *vxlan;
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struct {
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struct mlx5_rsvd_gids reserved_gids;
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u32 roce_en;
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