drm/via: Make macros readable in the via_3d_reg header
The macros for texture 1 setting all used continuation on a new line, resulting in a highly ureadable definition. Merge the lines so they are each on a single line. As a nice side-effect this fixes a number of checkpatch warnings: "WARNING: please, no spaces at the start of a line". Suggested-by: Thomas Zimmermann <tzimmermann@suse.de> Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Acked-by: Thomas Zimmermann <tzimmermann@suse.de> Cc: Kevin Brace <kevinbrace@bracecomputerlab.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220713170202.1798216-13-sam@ravnborg.org
This commit is contained in:
Sam Ravnborg
parent
e1df7580bb
commit
3579ca9575
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@ -1488,154 +1488,80 @@
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#define HC_SIMA_TX0TX1_OFF 0x0050
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#define HC_SIMA_TX0TX1_OFF 0x0050
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/*---- start of texture 1 setting ----
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/*---- start of texture 1 setting ----
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*/
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*/
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#define HC_SIMA_HTX1L0BasL \
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#define HC_SIMA_HTX1L0BasL (HC_SIMA_HTX0L0BasL + HC_SIMA_TX0TX1_OFF)
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(HC_SIMA_HTX0L0BasL + HC_SIMA_TX0TX1_OFF)
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#define HC_SIMA_HTX1L1BasL (HC_SIMA_HTX0L1BasL + HC_SIMA_TX0TX1_OFF)
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#define HC_SIMA_HTX1L1BasL \
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#define HC_SIMA_HTX1L2BasL (HC_SIMA_HTX0L2BasL + HC_SIMA_TX0TX1_OFF)
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(HC_SIMA_HTX0L1BasL + HC_SIMA_TX0TX1_OFF)
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#define HC_SIMA_HTX1L3BasL (HC_SIMA_HTX0L3BasL + HC_SIMA_TX0TX1_OFF)
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#define HC_SIMA_HTX1L2BasL \
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#define HC_SIMA_HTX1L4BasL (HC_SIMA_HTX0L4BasL + HC_SIMA_TX0TX1_OFF)
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(HC_SIMA_HTX0L2BasL + HC_SIMA_TX0TX1_OFF)
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#define HC_SIMA_HTX1L5BasL (HC_SIMA_HTX0L5BasL + HC_SIMA_TX0TX1_OFF)
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#define HC_SIMA_HTX1L3BasL \
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#define HC_SIMA_HTX1L6BasL (HC_SIMA_HTX0L6BasL + HC_SIMA_TX0TX1_OFF)
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(HC_SIMA_HTX0L3BasL + HC_SIMA_TX0TX1_OFF)
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#define HC_SIMA_HTX1L7BasL (HC_SIMA_HTX0L7BasL + HC_SIMA_TX0TX1_OFF)
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#define HC_SIMA_HTX1L4BasL (\
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#define HC_SIMA_HTX1L8BasL (HC_SIMA_HTX0L8BasL + HC_SIMA_TX0TX1_OFF)
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HC_SIMA_HTX0L4BasL + HC_SIMA_TX0TX1_OFF)
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#define HC_SIMA_HTX1L9BasL (HC_SIMA_HTX0L9BasL + HC_SIMA_TX0TX1_OFF)
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#define HC_SIMA_HTX1L5BasL \
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#define HC_SIMA_HTX1LaBasL (HC_SIMA_HTX0LaBasL + HC_SIMA_TX0TX1_OFF)
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(HC_SIMA_HTX0L5BasL + HC_SIMA_TX0TX1_OFF)
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#define HC_SIMA_HTX1LbBasL (HC_SIMA_HTX0LbBasL + HC_SIMA_TX0TX1_OFF)
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#define HC_SIMA_HTX1L6BasL \
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#define HC_SIMA_HTX1LcBasL (HC_SIMA_HTX0LcBasL + HC_SIMA_TX0TX1_OFF)
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(HC_SIMA_HTX0L6BasL + HC_SIMA_TX0TX1_OFF)
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#define HC_SIMA_HTX1LdBasL (HC_SIMA_HTX0LdBasL + HC_SIMA_TX0TX1_OFF)
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#define HC_SIMA_HTX1L7BasL \
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#define HC_SIMA_HTX1LeBasL (HC_SIMA_HTX0LeBasL + HC_SIMA_TX0TX1_OFF)
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(HC_SIMA_HTX0L7BasL + HC_SIMA_TX0TX1_OFF)
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#define HC_SIMA_HTX1LfBasL (HC_SIMA_HTX0LfBasL + HC_SIMA_TX0TX1_OFF)
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#define HC_SIMA_HTX1L8BasL \
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#define HC_SIMA_HTX1L10BasL (HC_SIMA_HTX0L10BasL + HC_SIMA_TX0TX1_OFF)
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(HC_SIMA_HTX0L8BasL + HC_SIMA_TX0TX1_OFF)
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#define HC_SIMA_HTX1L11BasL (HC_SIMA_HTX0L11BasL + HC_SIMA_TX0TX1_OFF)
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#define HC_SIMA_HTX1L9BasL \
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#define HC_SIMA_HTX1L012BasH (HC_SIMA_HTX0L012BasH + HC_SIMA_TX0TX1_OFF)
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(HC_SIMA_HTX0L9BasL + HC_SIMA_TX0TX1_OFF)
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#define HC_SIMA_HTX1L345BasH (HC_SIMA_HTX0L345BasH + HC_SIMA_TX0TX1_OFF)
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#define HC_SIMA_HTX1LaBasL \
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#define HC_SIMA_HTX1L678BasH (HC_SIMA_HTX0L678BasH + HC_SIMA_TX0TX1_OFF)
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(HC_SIMA_HTX0LaBasL + HC_SIMA_TX0TX1_OFF)
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#define HC_SIMA_HTX1L9abBasH (HC_SIMA_HTX0L9abBasH + HC_SIMA_TX0TX1_OFF)
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#define HC_SIMA_HTX1LbBasL \
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#define HC_SIMA_HTX1LcdeBasH (HC_SIMA_HTX0LcdeBasH + HC_SIMA_TX0TX1_OFF)
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(HC_SIMA_HTX0LbBasL + HC_SIMA_TX0TX1_OFF)
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#define HC_SIMA_HTX1Lf1011BasH (HC_SIMA_HTX0Lf1011BasH + HC_SIMA_TX0TX1_OFF)
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#define HC_SIMA_HTX1LcBasL \
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#define HC_SIMA_HTX1L0Pit (HC_SIMA_HTX0L0Pit + HC_SIMA_TX0TX1_OFF)
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(HC_SIMA_HTX0LcBasL + HC_SIMA_TX0TX1_OFF)
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#define HC_SIMA_HTX1L1Pit (HC_SIMA_HTX0L1Pit + HC_SIMA_TX0TX1_OFF)
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#define HC_SIMA_HTX1LdBasL \
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#define HC_SIMA_HTX1L2Pit (HC_SIMA_HTX0L2Pit + HC_SIMA_TX0TX1_OFF)
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(HC_SIMA_HTX0LdBasL + HC_SIMA_TX0TX1_OFF)
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#define HC_SIMA_HTX1L3Pit (HC_SIMA_HTX0L3Pit + HC_SIMA_TX0TX1_OFF)
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#define HC_SIMA_HTX1LeBasL \
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#define HC_SIMA_HTX1L4Pit (HC_SIMA_HTX0L4Pit + HC_SIMA_TX0TX1_OFF)
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(HC_SIMA_HTX0LeBasL + HC_SIMA_TX0TX1_OFF)
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#define HC_SIMA_HTX1L5Pit (HC_SIMA_HTX0L5Pit + HC_SIMA_TX0TX1_OFF)
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#define HC_SIMA_HTX1LfBasL \
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#define HC_SIMA_HTX1L6Pit (HC_SIMA_HTX0L6Pit + HC_SIMA_TX0TX1_OFF)
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(HC_SIMA_HTX0LfBasL + HC_SIMA_TX0TX1_OFF)
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#define HC_SIMA_HTX1L7Pit (HC_SIMA_HTX0L7Pit + HC_SIMA_TX0TX1_OFF)
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#define HC_SIMA_HTX1L10BasL \
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#define HC_SIMA_HTX1L8Pit (HC_SIMA_HTX0L8Pit + HC_SIMA_TX0TX1_OFF)
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(HC_SIMA_HTX0L10BasL + HC_SIMA_TX0TX1_OFF)
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#define HC_SIMA_HTX1L9Pit (HC_SIMA_HTX0L9Pit + HC_SIMA_TX0TX1_OFF)
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#define HC_SIMA_HTX1L11BasL \
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#define HC_SIMA_HTX1LaPit (HC_SIMA_HTX0LaPit + HC_SIMA_TX0TX1_OFF)
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(HC_SIMA_HTX0L11BasL + HC_SIMA_TX0TX1_OFF)
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#define HC_SIMA_HTX1LbPit (HC_SIMA_HTX0LbPit + HC_SIMA_TX0TX1_OFF)
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#define HC_SIMA_HTX1L012BasH \
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#define HC_SIMA_HTX1LcPit (HC_SIMA_HTX0LcPit + HC_SIMA_TX0TX1_OFF)
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(HC_SIMA_HTX0L012BasH + HC_SIMA_TX0TX1_OFF)
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#define HC_SIMA_HTX1LdPit (HC_SIMA_HTX0LdPit + HC_SIMA_TX0TX1_OFF)
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#define HC_SIMA_HTX1L345BasH \
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#define HC_SIMA_HTX1LePit (HC_SIMA_HTX0LePit + HC_SIMA_TX0TX1_OFF)
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(HC_SIMA_HTX0L345BasH + HC_SIMA_TX0TX1_OFF)
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#define HC_SIMA_HTX1LfPit (HC_SIMA_HTX0LfPit + HC_SIMA_TX0TX1_OFF)
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#define HC_SIMA_HTX1L678BasH \
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#define HC_SIMA_HTX1L10Pit (HC_SIMA_HTX0L10Pit + HC_SIMA_TX0TX1_OFF)
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(HC_SIMA_HTX0L678BasH + HC_SIMA_TX0TX1_OFF)
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#define HC_SIMA_HTX1L11Pit (HC_SIMA_HTX0L11Pit + HC_SIMA_TX0TX1_OFF)
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#define HC_SIMA_HTX1L9abBasH \
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#define HC_SIMA_HTX1L0_5WE (HC_SIMA_HTX0L0_5WE + HC_SIMA_TX0TX1_OFF)
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(HC_SIMA_HTX0L9abBasH + HC_SIMA_TX0TX1_OFF)
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#define HC_SIMA_HTX1L6_bWE (HC_SIMA_HTX0L6_bWE + HC_SIMA_TX0TX1_OFF)
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#define HC_SIMA_HTX1LcdeBasH \
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#define HC_SIMA_HTX1Lc_11WE (HC_SIMA_HTX0Lc_11WE + HC_SIMA_TX0TX1_OFF)
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(HC_SIMA_HTX0LcdeBasH + HC_SIMA_TX0TX1_OFF)
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#define HC_SIMA_HTX1L0_5HE (HC_SIMA_HTX0L0_5HE + HC_SIMA_TX0TX1_OFF)
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#define HC_SIMA_HTX1Lf1011BasH \
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#define HC_SIMA_HTX1L6_bHE (HC_SIMA_HTX0L6_bHE + HC_SIMA_TX0TX1_OFF)
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(HC_SIMA_HTX0Lf1011BasH + HC_SIMA_TX0TX1_OFF)
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#define HC_SIMA_HTX1Lc_11HE (HC_SIMA_HTX0Lc_11HE + HC_SIMA_TX0TX1_OFF)
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#define HC_SIMA_HTX1L0Pit \
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#define HC_SIMA_HTX1L0OS (HC_SIMA_HTX0L0OS + HC_SIMA_TX0TX1_OFF)
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(HC_SIMA_HTX0L0Pit + HC_SIMA_TX0TX1_OFF)
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#define HC_SIMA_HTX1TB (HC_SIMA_HTX0TB + HC_SIMA_TX0TX1_OFF)
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#define HC_SIMA_HTX1L1Pit \
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#define HC_SIMA_HTX1MPMD (HC_SIMA_HTX0MPMD + HC_SIMA_TX0TX1_OFF)
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(HC_SIMA_HTX0L1Pit + HC_SIMA_TX0TX1_OFF)
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#define HC_SIMA_HTX1CLODu (HC_SIMA_HTX0CLODu + HC_SIMA_TX0TX1_OFF)
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#define HC_SIMA_HTX1L2Pit \
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#define HC_SIMA_HTX1FM (HC_SIMA_HTX0FM + HC_SIMA_TX0TX1_OFF)
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(HC_SIMA_HTX0L2Pit + HC_SIMA_TX0TX1_OFF)
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#define HC_SIMA_HTX1TRCH (HC_SIMA_HTX0TRCH + HC_SIMA_TX0TX1_OFF)
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#define HC_SIMA_HTX1L3Pit \
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#define HC_SIMA_HTX1TRCL (HC_SIMA_HTX0TRCL + HC_SIMA_TX0TX1_OFF)
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(HC_SIMA_HTX0L3Pit + HC_SIMA_TX0TX1_OFF)
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#define HC_SIMA_HTX1TBC (HC_SIMA_HTX0TBC + HC_SIMA_TX0TX1_OFF)
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#define HC_SIMA_HTX1L4Pit \
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#define HC_SIMA_HTX1TRAH (HC_SIMA_HTX0TRAH + HC_SIMA_TX0TX1_OFF)
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(HC_SIMA_HTX0L4Pit + HC_SIMA_TX0TX1_OFF)
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#define HC_SIMA_HTX1LTC (HC_SIMA_HTX0LTC + HC_SIMA_TX0TX1_OFF)
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#define HC_SIMA_HTX1L5Pit \
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#define HC_SIMA_HTX1LTA (HC_SIMA_HTX0LTA + HC_SIMA_TX0TX1_OFF)
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(HC_SIMA_HTX0L5Pit + HC_SIMA_TX0TX1_OFF)
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#define HC_SIMA_HTX1TBLCsat (HC_SIMA_HTX0TBLCsat + HC_SIMA_TX0TX1_OFF)
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#define HC_SIMA_HTX1L6Pit \
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#define HC_SIMA_HTX1TBLCop (HC_SIMA_HTX0TBLCop + HC_SIMA_TX0TX1_OFF)
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(HC_SIMA_HTX0L6Pit + HC_SIMA_TX0TX1_OFF)
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#define HC_SIMA_HTX1TBLMPfog (HC_SIMA_HTX0TBLMPfog + HC_SIMA_TX0TX1_OFF)
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#define HC_SIMA_HTX1L7Pit \
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#define HC_SIMA_HTX1TBLAsat (HC_SIMA_HTX0TBLAsat + HC_SIMA_TX0TX1_OFF)
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(HC_SIMA_HTX0L7Pit + HC_SIMA_TX0TX1_OFF)
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#define HC_SIMA_HTX1TBLRCa (HC_SIMA_HTX0TBLRCa + HC_SIMA_TX0TX1_OFF)
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#define HC_SIMA_HTX1L8Pit \
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#define HC_SIMA_HTX1TBLRCb (HC_SIMA_HTX0TBLRCb + HC_SIMA_TX0TX1_OFF)
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(HC_SIMA_HTX0L8Pit + HC_SIMA_TX0TX1_OFF)
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#define HC_SIMA_HTX1TBLRCc (HC_SIMA_HTX0TBLRCc + HC_SIMA_TX0TX1_OFF)
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#define HC_SIMA_HTX1L9Pit \
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#define HC_SIMA_HTX1TBLRCbias (HC_SIMA_HTX0TBLRCbias + HC_SIMA_TX0TX1_OFF)
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(HC_SIMA_HTX0L9Pit + HC_SIMA_TX0TX1_OFF)
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#define HC_SIMA_HTX1TBLRAa (HC_SIMA_HTX0TBLRAa + HC_SIMA_TX0TX1_OFF)
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#define HC_SIMA_HTX1LaPit \
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#define HC_SIMA_HTX1TBLRFog (HC_SIMA_HTX0TBLRFog + HC_SIMA_TX0TX1_OFF)
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(HC_SIMA_HTX0LaPit + HC_SIMA_TX0TX1_OFF)
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#define HC_SIMA_HTX1BumpM00 (HC_SIMA_HTX0BumpM00 + HC_SIMA_TX0TX1_OFF)
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#define HC_SIMA_HTX1LbPit \
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#define HC_SIMA_HTX1BumpM01 (HC_SIMA_HTX0BumpM01 + HC_SIMA_TX0TX1_OFF)
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(HC_SIMA_HTX0LbPit + HC_SIMA_TX0TX1_OFF)
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#define HC_SIMA_HTX1BumpM10 (HC_SIMA_HTX0BumpM10 + HC_SIMA_TX0TX1_OFF)
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#define HC_SIMA_HTX1LcPit \
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#define HC_SIMA_HTX1BumpM11 (HC_SIMA_HTX0BumpM11 + HC_SIMA_TX0TX1_OFF)
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(HC_SIMA_HTX0LcPit + HC_SIMA_TX0TX1_OFF)
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#define HC_SIMA_HTX1LScale (HC_SIMA_HTX0LScale + HC_SIMA_TX0TX1_OFF)
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#define HC_SIMA_HTX1LdPit \
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(HC_SIMA_HTX0LdPit + HC_SIMA_TX0TX1_OFF)
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#define HC_SIMA_HTX1LePit \
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(HC_SIMA_HTX0LePit + HC_SIMA_TX0TX1_OFF)
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#define HC_SIMA_HTX1LfPit \
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(HC_SIMA_HTX0LfPit + HC_SIMA_TX0TX1_OFF)
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#define HC_SIMA_HTX1L10Pit \
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(HC_SIMA_HTX0L10Pit + HC_SIMA_TX0TX1_OFF)
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#define HC_SIMA_HTX1L11Pit \
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(HC_SIMA_HTX0L11Pit + HC_SIMA_TX0TX1_OFF)
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#define HC_SIMA_HTX1L0_5WE \
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(HC_SIMA_HTX0L0_5WE + HC_SIMA_TX0TX1_OFF)
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#define HC_SIMA_HTX1L6_bWE \
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(HC_SIMA_HTX0L6_bWE + HC_SIMA_TX0TX1_OFF)
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#define HC_SIMA_HTX1Lc_11WE \
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(HC_SIMA_HTX0Lc_11WE + HC_SIMA_TX0TX1_OFF)
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#define HC_SIMA_HTX1L0_5HE \
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(HC_SIMA_HTX0L0_5HE + HC_SIMA_TX0TX1_OFF)
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#define HC_SIMA_HTX1L6_bHE \
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(HC_SIMA_HTX0L6_bHE + HC_SIMA_TX0TX1_OFF)
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#define HC_SIMA_HTX1Lc_11HE \
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(HC_SIMA_HTX0Lc_11HE + HC_SIMA_TX0TX1_OFF)
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#define HC_SIMA_HTX1L0OS \
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(HC_SIMA_HTX0L0OS + HC_SIMA_TX0TX1_OFF)
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#define HC_SIMA_HTX1TB \
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(HC_SIMA_HTX0TB + HC_SIMA_TX0TX1_OFF)
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#define HC_SIMA_HTX1MPMD \
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(HC_SIMA_HTX0MPMD + HC_SIMA_TX0TX1_OFF)
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#define HC_SIMA_HTX1CLODu \
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(HC_SIMA_HTX0CLODu + HC_SIMA_TX0TX1_OFF)
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#define HC_SIMA_HTX1FM \
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(HC_SIMA_HTX0FM + HC_SIMA_TX0TX1_OFF)
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#define HC_SIMA_HTX1TRCH \
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(HC_SIMA_HTX0TRCH + HC_SIMA_TX0TX1_OFF)
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#define HC_SIMA_HTX1TRCL \
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(HC_SIMA_HTX0TRCL + HC_SIMA_TX0TX1_OFF)
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#define HC_SIMA_HTX1TBC \
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(HC_SIMA_HTX0TBC + HC_SIMA_TX0TX1_OFF)
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#define HC_SIMA_HTX1TRAH \
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(HC_SIMA_HTX0TRAH + HC_SIMA_TX0TX1_OFF)
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#define HC_SIMA_HTX1LTC \
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(HC_SIMA_HTX0LTC + HC_SIMA_TX0TX1_OFF)
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#define HC_SIMA_HTX1LTA \
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(HC_SIMA_HTX0LTA + HC_SIMA_TX0TX1_OFF)
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#define HC_SIMA_HTX1TBLCsat \
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(HC_SIMA_HTX0TBLCsat + HC_SIMA_TX0TX1_OFF)
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#define HC_SIMA_HTX1TBLCop \
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(HC_SIMA_HTX0TBLCop + HC_SIMA_TX0TX1_OFF)
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#define HC_SIMA_HTX1TBLMPfog \
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(HC_SIMA_HTX0TBLMPfog + HC_SIMA_TX0TX1_OFF)
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#define HC_SIMA_HTX1TBLAsat \
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(HC_SIMA_HTX0TBLAsat + HC_SIMA_TX0TX1_OFF)
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#define HC_SIMA_HTX1TBLRCa \
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(HC_SIMA_HTX0TBLRCa + HC_SIMA_TX0TX1_OFF)
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#define HC_SIMA_HTX1TBLRCb \
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(HC_SIMA_HTX0TBLRCb + HC_SIMA_TX0TX1_OFF)
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#define HC_SIMA_HTX1TBLRCc \
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(HC_SIMA_HTX0TBLRCc + HC_SIMA_TX0TX1_OFF)
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#define HC_SIMA_HTX1TBLRCbias \
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(HC_SIMA_HTX0TBLRCbias + HC_SIMA_TX0TX1_OFF)
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#define HC_SIMA_HTX1TBLRAa \
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(HC_SIMA_HTX0TBLRAa + HC_SIMA_TX0TX1_OFF)
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#define HC_SIMA_HTX1TBLRFog \
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(HC_SIMA_HTX0TBLRFog + HC_SIMA_TX0TX1_OFF)
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#define HC_SIMA_HTX1BumpM00 \
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(HC_SIMA_HTX0BumpM00 + HC_SIMA_TX0TX1_OFF)
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#define HC_SIMA_HTX1BumpM01 \
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(HC_SIMA_HTX0BumpM01 + HC_SIMA_TX0TX1_OFF)
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#define HC_SIMA_HTX1BumpM10 \
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(HC_SIMA_HTX0BumpM10 + HC_SIMA_TX0TX1_OFF)
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#define HC_SIMA_HTX1BumpM11 \
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||||||
(HC_SIMA_HTX0BumpM11 + HC_SIMA_TX0TX1_OFF)
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||||||
#define HC_SIMA_HTX1LScale \
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||||||
(HC_SIMA_HTX0LScale + HC_SIMA_TX0TX1_OFF)
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||||||
/*---- end of texture 1 setting ---- 0xaf
|
/*---- end of texture 1 setting ---- 0xaf
|
||||||
*/
|
*/
|
||||||
#define HC_SIMA_HTXSMD 0x00b0
|
#define HC_SIMA_HTXSMD 0x00b0
|
||||||
|
|
|
||||||
Loading…
Reference in New Issue