UbiquitousOS
/
OpenCloudOS-Kernel
mirror of https://gitee.com/OpenCloudOS/OpenCloudOS-Kernel.git
11
0
Fork 0
Code Issues Projects Releases Wiki Activity

ARM: dts: r8a7744: Fix sorting of vsp and msiof nodes 

This patch fixes sorting of vsp and msiof nodes.

Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This commit is contained in:
Biju Das 2018-12-05 09:06:55 +00:00 committed by Simon Horman
parent 55327bff83
commit 35713c782e
1 changed files with 75 additions and 75 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

150
arch/arm/boot/dts/r8a7744.dtsi
View File

@ -998,6 +998,54 @@
status = "disabled";
};
msiof0: spi@e6e20000 {
compatible = "renesas,msiof-r8a7744",
"renesas,rcar-gen2-msiof";
reg = <0 0xe6e20000 0 0x0064>;
interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 000>;
dmas = <&dmac0 0x51>, <&dmac0 0x52>,
<&dmac1 0x51>, <&dmac1 0x52>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
#address-cells = <1>;
#size-cells = <0>;
resets = <&cpg 000>;
status = "disabled";
};
msiof1: spi@e6e10000 {
compatible = "renesas,msiof-r8a7744",
"renesas,rcar-gen2-msiof";
reg = <0 0xe6e10000 0 0x0064>;
interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 208>;
dmas = <&dmac0 0x55>, <&dmac0 0x56>,
<&dmac1 0x55>, <&dmac1 0x56>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
#address-cells = <1>;
#size-cells = <0>;
resets = <&cpg 208>;
status = "disabled";
};
msiof2: spi@e6e00000 {
compatible = "renesas,msiof-r8a7744",
"renesas,rcar-gen2-msiof";
reg = <0 0xe6e00000 0 0x0064>;
interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 205>;
dmas = <&dmac0 0x41>, <&dmac0 0x42>,
<&dmac1 0x41>, <&dmac1 0x42>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
#address-cells = <1>;
#size-cells = <0>;
resets = <&cpg 205>;
status = "disabled";
};
pwm0: pwm@e6e30000 {
compatible = "renesas,pwm-r8a7744", "renesas,pwm-rcar";
reg = <0 0xe6e30000 0 0x8>;
@ -1068,54 +1116,6 @@
status = "disabled";
};
msiof0: spi@e6e20000 {
compatible = "renesas,msiof-r8a7744",
"renesas,rcar-gen2-msiof";
reg = <0 0xe6e20000 0 0x0064>;
interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 000>;
dmas = <&dmac0 0x51>, <&dmac0 0x52>,
<&dmac1 0x51>, <&dmac1 0x52>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
#address-cells = <1>;
#size-cells = <0>;
resets = <&cpg 000>;
status = "disabled";
};
msiof1: spi@e6e10000 {
compatible = "renesas,msiof-r8a7744",
"renesas,rcar-gen2-msiof";
reg = <0 0xe6e10000 0 0x0064>;
interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 208>;
dmas = <&dmac0 0x55>, <&dmac0 0x56>,
<&dmac1 0x55>, <&dmac1 0x56>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
#address-cells = <1>;
#size-cells = <0>;
resets = <&cpg 208>;
status = "disabled";
};
msiof2: spi@e6e00000 {
compatible = "renesas,msiof-r8a7744",
"renesas,rcar-gen2-msiof";
reg = <0 0xe6e00000 0 0x0064>;
interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 205>;
dmas = <&dmac0 0x41>, <&dmac0 0x42>,
<&dmac1 0x41>, <&dmac1 0x42>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
#address-cells = <1>;
#size-cells = <0>;
resets = <&cpg 205>;
status = "disabled";
};
can0: can@e6e80000 {
compatible = "renesas,can-r8a7744",
"renesas,rcar-gen2-can";
@ -1589,33 +1589,6 @@
resets = <&cpg 408>;
};
vsp@fe928000 {
compatible = "renesas,vsp1";
reg = <0 0xfe928000 0 0x8000>;
interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 131>;
power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
resets = <&cpg 131>;
};
vsp@fe930000 {
compatible = "renesas,vsp1";
reg = <0 0xfe930000 0 0x8000>;
interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 128>;
power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
resets = <&cpg 128>;
};
vsp@fe938000 {
compatible = "renesas,vsp1";
reg = <0 0xfe938000 0 0x8000>;
interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 127>;
power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
resets = <&cpg 127>;
};
pciec: pcie@fe000000 {
compatible = "renesas,pcie-r8a7744",
"renesas,pcie-rcar-gen2";
@ -1644,6 +1617,33 @@
status = "disabled";
};
vsp@fe928000 {
compatible = "renesas,vsp1";
reg = <0 0xfe928000 0 0x8000>;
interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 131>;
power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
resets = <&cpg 131>;
};
vsp@fe930000 {
compatible = "renesas,vsp1";
reg = <0 0xfe930000 0 0x8000>;
interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 128>;
power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
resets = <&cpg 128>;
};
vsp@fe938000 {
compatible = "renesas,vsp1";
reg = <0 0xfe938000 0 0x8000>;
interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 127>;
power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
resets = <&cpg 127>;
};
du: display@feb00000 {
reg = <0 0xfeb00000 0 0x40000>,
<0 0xfeb90000 0 0x1c>;