Merge 3.19-rc5 into char-misc-next
We want the 3.19-rc5 fixes in here for our testing. Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Greg Kroah-Hartman
commit
3542f6b183
1
.mailmap
1
.mailmap
|
|
@ -51,6 +51,7 @@ Greg Kroah-Hartman <gregkh@suse.de>
|
|||
Greg Kroah-Hartman <greg@kroah.com>
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Henk Vergonet <Henk.Vergonet@gmail.com>
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Henrik Kretzschmar <henne@nachtwindheim.de>
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Henrik Rydberg <rydberg@bitmath.org>
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||||
Herbert Xu <herbert@gondor.apana.org.au>
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Jacob Shin <Jacob.Shin@amd.com>
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James Bottomley <jejb@mulgrave.(none)>
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|
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@ -14,3 +14,18 @@ Description:
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|||
The /sys/class/mei/meiN directory is created for
|
||||
each probed mei device
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What: /sys/class/mei/meiN/fw_status
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Date: Nov 2014
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KernelVersion: 3.19
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Contact: Tomas Winkler <tomas.winkler@intel.com>
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Description: Display fw status registers content
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The ME FW writes its status information into fw status
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registers for BIOS and OS to monitor fw health.
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The register contains running state, power management
|
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state, error codes, and others. The way the registers
|
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are decoded depends on PCH or SoC generation.
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Also number of registers varies between 1 and 6
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depending on generation.
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|
|
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@ -10,12 +10,13 @@ Optional properties:
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Each button (key) is represented as a sub-node of "gpio-keys":
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Subnode properties:
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- gpios: OF device-tree gpio specification.
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- interrupts: the interrupt line for that input.
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- label: Descriptive name of the key.
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- linux,code: Keycode to emit.
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|
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Required mutual exclusive subnode-properties:
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- gpios: OF device-tree gpio specification.
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- interrupts: the interrupt line for that input
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Note that either "interrupts" or "gpios" properties can be omitted, but not
|
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both at the same time. Specifying both properties is allowed.
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Optional subnode-properties:
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- linux,input-type: Specify event type this button/key generates.
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@ -23,6 +24,9 @@ Optional subnode-properties:
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- debounce-interval: Debouncing interval time in milliseconds.
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If not specified defaults to 5.
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- gpio-key,wakeup: Boolean, button can wake-up the system.
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- linux,can-disable: Boolean, indicates that button is connected
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to dedicated (not shared) interrupt which can be disabled to
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suppress events from the button.
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Example nodes:
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|
|
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@ -8,6 +8,8 @@ Optional properties:
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- debounce-interval : Debouncing interval time in milliseconds
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- st,scan-count : Scanning cycles elapsed before key data is updated
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- st,no-autorepeat : If specified device will not autorepeat
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- keypad,num-rows : See ./matrix-keymap.txt
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- keypad,num-columns : See ./matrix-keymap.txt
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Example:
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|
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@ -66,6 +66,8 @@ fwmark_reflect - BOOLEAN
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route/max_size - INTEGER
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Maximum number of routes allowed in the kernel. Increase
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this when using large numbers of interfaces and/or routes.
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From linux kernel 3.6 onwards, this is deprecated for ipv4
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as route cache is no longer used.
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neigh/default/gc_thresh1 - INTEGER
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Minimum number of entries to keep. Garbage collector will not
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|
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@ -389,9 +389,6 @@ def tcm_mod_build_configfs(proto_ident, fabric_mod_dir_var, fabric_mod_name):
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buf += " .release_cmd = " + fabric_mod_name + "_release_cmd,\n"
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buf += " .shutdown_session = " + fabric_mod_name + "_shutdown_session,\n"
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buf += " .close_session = " + fabric_mod_name + "_close_session,\n"
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buf += " .stop_session = " + fabric_mod_name + "_stop_session,\n"
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buf += " .fall_back_to_erl0 = " + fabric_mod_name + "_reset_nexus,\n"
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buf += " .sess_logged_in = " + fabric_mod_name + "_sess_logged_in,\n"
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buf += " .sess_get_index = " + fabric_mod_name + "_sess_get_index,\n"
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buf += " .sess_get_initiator_sid = NULL,\n"
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buf += " .write_pending = " + fabric_mod_name + "_write_pending,\n"
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@ -402,7 +399,7 @@ def tcm_mod_build_configfs(proto_ident, fabric_mod_dir_var, fabric_mod_name):
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buf += " .queue_data_in = " + fabric_mod_name + "_queue_data_in,\n"
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buf += " .queue_status = " + fabric_mod_name + "_queue_status,\n"
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buf += " .queue_tm_rsp = " + fabric_mod_name + "_queue_tm_rsp,\n"
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buf += " .is_state_remove = " + fabric_mod_name + "_is_state_remove,\n"
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buf += " .aborted_task = " + fabric_mod_name + "_aborted_task,\n"
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buf += " /*\n"
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buf += " * Setup function pointers for generic logic in target_core_fabric_configfs.c\n"
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buf += " */\n"
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@ -428,7 +425,7 @@ def tcm_mod_build_configfs(proto_ident, fabric_mod_dir_var, fabric_mod_name):
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buf += " /*\n"
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buf += " * Register the top level struct config_item_type with TCM core\n"
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buf += " */\n"
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buf += " fabric = target_fabric_configfs_init(THIS_MODULE, \"" + fabric_mod_name[4:] + "\");\n"
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buf += " fabric = target_fabric_configfs_init(THIS_MODULE, \"" + fabric_mod_name + "\");\n"
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buf += " if (IS_ERR(fabric)) {\n"
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buf += " printk(KERN_ERR \"target_fabric_configfs_init() failed\\n\");\n"
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buf += " return PTR_ERR(fabric);\n"
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|
|
@ -595,7 +592,7 @@ def tcm_mod_dump_fabric_ops(proto_ident, fabric_mod_dir_var, fabric_mod_name):
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if re.search('get_fabric_name', fo):
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buf += "char *" + fabric_mod_name + "_get_fabric_name(void)\n"
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buf += "{\n"
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buf += " return \"" + fabric_mod_name[4:] + "\";\n"
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buf += " return \"" + fabric_mod_name + "\";\n"
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buf += "}\n\n"
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bufi += "char *" + fabric_mod_name + "_get_fabric_name(void);\n"
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continue
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@ -820,27 +817,6 @@ def tcm_mod_dump_fabric_ops(proto_ident, fabric_mod_dir_var, fabric_mod_name):
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buf += "}\n\n"
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bufi += "void " + fabric_mod_name + "_close_session(struct se_session *);\n"
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if re.search('stop_session\)\(', fo):
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buf += "void " + fabric_mod_name + "_stop_session(struct se_session *se_sess, int sess_sleep , int conn_sleep)\n"
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buf += "{\n"
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buf += " return;\n"
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buf += "}\n\n"
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bufi += "void " + fabric_mod_name + "_stop_session(struct se_session *, int, int);\n"
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if re.search('fall_back_to_erl0\)\(', fo):
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buf += "void " + fabric_mod_name + "_reset_nexus(struct se_session *se_sess)\n"
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buf += "{\n"
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buf += " return;\n"
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buf += "}\n\n"
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bufi += "void " + fabric_mod_name + "_reset_nexus(struct se_session *);\n"
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if re.search('sess_logged_in\)\(', fo):
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buf += "int " + fabric_mod_name + "_sess_logged_in(struct se_session *se_sess)\n"
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buf += "{\n"
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buf += " return 0;\n"
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buf += "}\n\n"
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bufi += "int " + fabric_mod_name + "_sess_logged_in(struct se_session *);\n"
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if re.search('sess_get_index\)\(', fo):
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buf += "u32 " + fabric_mod_name + "_sess_get_index(struct se_session *se_sess)\n"
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buf += "{\n"
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@ -898,19 +874,18 @@ def tcm_mod_dump_fabric_ops(proto_ident, fabric_mod_dir_var, fabric_mod_name):
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bufi += "int " + fabric_mod_name + "_queue_status(struct se_cmd *);\n"
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if re.search('queue_tm_rsp\)\(', fo):
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buf += "int " + fabric_mod_name + "_queue_tm_rsp(struct se_cmd *se_cmd)\n"
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buf += "void " + fabric_mod_name + "_queue_tm_rsp(struct se_cmd *se_cmd)\n"
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buf += "{\n"
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buf += " return 0;\n"
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buf += " return;\n"
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buf += "}\n\n"
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bufi += "int " + fabric_mod_name + "_queue_tm_rsp(struct se_cmd *);\n"
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bufi += "void " + fabric_mod_name + "_queue_tm_rsp(struct se_cmd *);\n"
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if re.search('is_state_remove\)\(', fo):
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buf += "int " + fabric_mod_name + "_is_state_remove(struct se_cmd *se_cmd)\n"
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if re.search('aborted_task\)\(', fo):
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buf += "void " + fabric_mod_name + "_aborted_task(struct se_cmd *se_cmd)\n"
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buf += "{\n"
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buf += " return 0;\n"
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buf += " return;\n"
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buf += "}\n\n"
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bufi += "int " + fabric_mod_name + "_is_state_remove(struct se_cmd *);\n"
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bufi += "void " + fabric_mod_name + "_aborted_task(struct se_cmd *);\n"
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|
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ret = p.write(buf)
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if ret:
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|
|
@ -1018,11 +993,11 @@ def main(modname, proto_ident):
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tcm_mod_build_kbuild(fabric_mod_dir, fabric_mod_name)
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tcm_mod_build_kconfig(fabric_mod_dir, fabric_mod_name)
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input = raw_input("Would you like to add " + fabric_mod_name + "to drivers/target/Makefile..? [yes,no]: ")
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input = raw_input("Would you like to add " + fabric_mod_name + " to drivers/target/Makefile..? [yes,no]: ")
|
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if input == "yes" or input == "y":
|
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tcm_mod_add_kbuild(tcm_dir, fabric_mod_name)
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input = raw_input("Would you like to add " + fabric_mod_name + "to drivers/target/Kconfig..? [yes,no]: ")
|
||||
input = raw_input("Would you like to add " + fabric_mod_name + " to drivers/target/Kconfig..? [yes,no]: ")
|
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if input == "yes" or input == "y":
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tcm_mod_add_kconfig(tcm_dir, fabric_mod_name)
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||||
|
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|
|
|
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|
|
@ -3,7 +3,7 @@ CPU cooling APIs How To
|
|||
|
||||
Written by Amit Daniel Kachhap <amit.kachhap@linaro.org>
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||||
|
||||
Updated: 12 May 2012
|
||||
Updated: 6 Jan 2015
|
||||
|
||||
Copyright (c) 2012 Samsung Electronics Co., Ltd(http://www.samsung.com)
|
||||
|
||||
|
|
@ -25,7 +25,18 @@ the user. The registration APIs returns the cooling device pointer.
|
|||
|
||||
clip_cpus: cpumask of cpus where the frequency constraints will happen.
|
||||
|
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1.1.2 void cpufreq_cooling_unregister(struct thermal_cooling_device *cdev)
|
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1.1.2 struct thermal_cooling_device *of_cpufreq_cooling_register(
|
||||
struct device_node *np, const struct cpumask *clip_cpus)
|
||||
|
||||
This interface function registers the cpufreq cooling device with
|
||||
the name "thermal-cpufreq-%x" linking it with a device tree node, in
|
||||
order to bind it via the thermal DT code. This api can support multiple
|
||||
instances of cpufreq cooling devices.
|
||||
|
||||
np: pointer to the cooling device device tree node
|
||||
clip_cpus: cpumask of cpus where the frequency constraints will happen.
|
||||
|
||||
1.1.3 void cpufreq_cooling_unregister(struct thermal_cooling_device *cdev)
|
||||
|
||||
This interface function unregisters the "thermal-cpufreq-%x" cooling device.
|
||||
|
||||
|
|
|
|||
32
MAINTAINERS
32
MAINTAINERS
|
|
@ -724,15 +724,15 @@ F: include/uapi/linux/apm_bios.h
|
|||
F: drivers/char/apm-emulation.c
|
||||
|
||||
APPLE BCM5974 MULTITOUCH DRIVER
|
||||
M: Henrik Rydberg <rydberg@euromail.se>
|
||||
M: Henrik Rydberg <rydberg@bitmath.org>
|
||||
L: linux-input@vger.kernel.org
|
||||
S: Maintained
|
||||
S: Odd fixes
|
||||
F: drivers/input/mouse/bcm5974.c
|
||||
|
||||
APPLE SMC DRIVER
|
||||
M: Henrik Rydberg <rydberg@euromail.se>
|
||||
M: Henrik Rydberg <rydberg@bitmath.org>
|
||||
L: lm-sensors@lm-sensors.org
|
||||
S: Maintained
|
||||
S: Odd fixes
|
||||
F: drivers/hwmon/applesmc.c
|
||||
|
||||
APPLETALK NETWORK LAYER
|
||||
|
|
@ -2259,6 +2259,7 @@ F: drivers/gpio/gpio-bt8xx.c
|
|||
BTRFS FILE SYSTEM
|
||||
M: Chris Mason <clm@fb.com>
|
||||
M: Josef Bacik <jbacik@fb.com>
|
||||
M: David Sterba <dsterba@suse.cz>
|
||||
L: linux-btrfs@vger.kernel.org
|
||||
W: http://btrfs.wiki.kernel.org/
|
||||
Q: http://patchwork.kernel.org/project/linux-btrfs/list/
|
||||
|
|
@ -3183,7 +3184,7 @@ L: dmaengine@vger.kernel.org
|
|||
Q: https://patchwork.kernel.org/project/linux-dmaengine/list/
|
||||
S: Maintained
|
||||
F: drivers/dma/
|
||||
F: include/linux/dma*
|
||||
F: include/linux/dmaengine.h
|
||||
F: Documentation/dmaengine/
|
||||
T: git git://git.infradead.org/users/vkoul/slave-dma.git
|
||||
|
||||
|
|
@ -4749,7 +4750,7 @@ S: Supported
|
|||
F: drivers/scsi/ipr.*
|
||||
|
||||
IBM Power Virtual Ethernet Device Driver
|
||||
M: Santiago Leon <santil@linux.vnet.ibm.com>
|
||||
M: Thomas Falcon <tlfalcon@linux.vnet.ibm.com>
|
||||
L: netdev@vger.kernel.org
|
||||
S: Supported
|
||||
F: drivers/net/ethernet/ibm/ibmveth.*
|
||||
|
|
@ -4941,10 +4942,10 @@ F: include/uapi/linux/input.h
|
|||
F: include/linux/input/
|
||||
|
||||
INPUT MULTITOUCH (MT) PROTOCOL
|
||||
M: Henrik Rydberg <rydberg@euromail.se>
|
||||
M: Henrik Rydberg <rydberg@bitmath.org>
|
||||
L: linux-input@vger.kernel.org
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/rydberg/input-mt.git
|
||||
S: Maintained
|
||||
S: Odd fixes
|
||||
F: Documentation/input/multi-touch-protocol.txt
|
||||
F: drivers/input/input-mt.c
|
||||
K: \b(ABS|SYN)_MT_
|
||||
|
|
@ -5280,6 +5281,15 @@ W: www.open-iscsi.org
|
|||
Q: http://patchwork.kernel.org/project/linux-rdma/list/
|
||||
F: drivers/infiniband/ulp/iser/
|
||||
|
||||
ISCSI EXTENSIONS FOR RDMA (ISER) TARGET
|
||||
M: Sagi Grimberg <sagig@mellanox.com>
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/nab/target-pending.git master
|
||||
L: linux-rdma@vger.kernel.org
|
||||
L: target-devel@vger.kernel.org
|
||||
S: Supported
|
||||
W: http://www.linux-iscsi.org
|
||||
F: drivers/infiniband/ulp/isert
|
||||
|
||||
ISDN SUBSYSTEM
|
||||
M: Karsten Keil <isdn@linux-pingi.de>
|
||||
L: isdn4linux@listserv.isdn4linux.de (subscribers-only)
|
||||
|
|
@ -7738,8 +7748,7 @@ F: Documentation/scsi/LICENSE.qla2xxx
|
|||
F: drivers/scsi/qla2xxx/
|
||||
|
||||
QLOGIC QLA4XXX iSCSI DRIVER
|
||||
M: Vikas Chaudhary <vikas.chaudhary@qlogic.com>
|
||||
M: iscsi-driver@qlogic.com
|
||||
M: QLogic-Storage-Upstream@qlogic.com
|
||||
L: linux-scsi@vger.kernel.org
|
||||
S: Supported
|
||||
F: Documentation/scsi/LICENSE.qla4xxx
|
||||
|
|
@ -9534,7 +9543,8 @@ F: drivers/platform/x86/thinkpad_acpi.c
|
|||
TI BANDGAP AND THERMAL DRIVER
|
||||
M: Eduardo Valentin <edubezval@gmail.com>
|
||||
L: linux-pm@vger.kernel.org
|
||||
S: Supported
|
||||
L: linux-omap@vger.kernel.org
|
||||
S: Maintained
|
||||
F: drivers/thermal/ti-soc-thermal/
|
||||
|
||||
TI CLOCK DRIVER
|
||||
|
|
|
|||
3
Makefile
3
Makefile
|
|
@ -1,7 +1,7 @@
|
|||
VERSION = 3
|
||||
PATCHLEVEL = 19
|
||||
SUBLEVEL = 0
|
||||
EXTRAVERSION = -rc2
|
||||
EXTRAVERSION = -rc5
|
||||
NAME = Diseased Newt
|
||||
|
||||
# *DOCUMENTATION*
|
||||
|
|
@ -391,6 +391,7 @@ USERINCLUDE := \
|
|||
# Needed to be compatible with the O= option
|
||||
LINUXINCLUDE := \
|
||||
-I$(srctree)/arch/$(hdr-arch)/include \
|
||||
-Iarch/$(hdr-arch)/include/generated/uapi \
|
||||
-Iarch/$(hdr-arch)/include/generated \
|
||||
$(if $(KBUILD_SRC), -I$(srctree)/include) \
|
||||
-Iinclude \
|
||||
|
|
|
|||
|
|
@ -203,27 +203,3 @@
|
|||
compatible = "linux,spdif-dir";
|
||||
};
|
||||
};
|
||||
|
||||
&pinctrl {
|
||||
/*
|
||||
* These pins might be muxed as I2S by
|
||||
* the bootloader, but it conflicts
|
||||
* with the real I2S pins that are
|
||||
* muxed using i2s_pins. We must mux
|
||||
* those pins to a function other than
|
||||
* I2S.
|
||||
*/
|
||||
pinctrl-0 = <&hog_pins1 &hog_pins2>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
hog_pins1: hog-pins1 {
|
||||
marvell,pins = "mpp6", "mpp8", "mpp10",
|
||||
"mpp12", "mpp13";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
|
||||
hog_pins2: hog-pins2 {
|
||||
marvell,pins = "mpp5", "mpp7", "mpp9";
|
||||
marvell,function = "gpo";
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -953,6 +953,8 @@
|
|||
interrupts = <26 IRQ_TYPE_LEVEL_HIGH 3>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_fb>;
|
||||
clocks = <&lcd_clk>, <&lcd_clk>;
|
||||
clock-names = "lcdc_clk", "hclk";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -65,6 +65,8 @@
|
|||
};
|
||||
|
||||
&sdhci2 {
|
||||
broken-cd;
|
||||
bus-width = <8>;
|
||||
non-removable;
|
||||
status = "okay";
|
||||
};
|
||||
|
|
|
|||
|
|
@ -83,7 +83,8 @@
|
|||
compatible = "mrvl,pxav3-mmc";
|
||||
reg = <0xab1000 0x200>;
|
||||
interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&chip CLKID_SDIO1XIN>;
|
||||
clocks = <&chip CLKID_NFC_ECC>, <&chip CLKID_NFC>;
|
||||
clock-names = "io", "core";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
|
|
@ -348,36 +349,6 @@
|
|||
interrupt-parent = <&gic>;
|
||||
interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
|
||||
};
|
||||
|
||||
gpio4: gpio@5000 {
|
||||
compatible = "snps,dw-apb-gpio";
|
||||
reg = <0x5000 0x400>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
porte: gpio-port@4 {
|
||||
compatible = "snps,dw-apb-gpio-port";
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
snps,nr-gpios = <32>;
|
||||
reg = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
gpio5: gpio@c000 {
|
||||
compatible = "snps,dw-apb-gpio";
|
||||
reg = <0xc000 0x400>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
portf: gpio-port@5 {
|
||||
compatible = "snps,dw-apb-gpio-port";
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
snps,nr-gpios = <32>;
|
||||
reg = <0>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
chip: chip-control@ea0000 {
|
||||
|
|
@ -466,6 +437,21 @@
|
|||
ranges = <0 0xfc0000 0x10000>;
|
||||
interrupt-parent = <&sic>;
|
||||
|
||||
sm_gpio1: gpio@5000 {
|
||||
compatible = "snps,dw-apb-gpio";
|
||||
reg = <0x5000 0x400>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
portf: gpio-port@5 {
|
||||
compatible = "snps,dw-apb-gpio-port";
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
snps,nr-gpios = <32>;
|
||||
reg = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
i2c2: i2c@7000 {
|
||||
compatible = "snps,designware-i2c";
|
||||
#address-cells = <1>;
|
||||
|
|
@ -516,6 +502,21 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
sm_gpio0: gpio@c000 {
|
||||
compatible = "snps,dw-apb-gpio";
|
||||
reg = <0xc000 0x400>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
porte: gpio-port@4 {
|
||||
compatible = "snps,dw-apb-gpio-port";
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
snps,nr-gpios = <32>;
|
||||
reg = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
sysctrl: pin-controller@d000 {
|
||||
compatible = "marvell,berlin2q-system-ctrl";
|
||||
reg = <0xd000 0x100>;
|
||||
|
|
|
|||
|
|
@ -499,23 +499,23 @@
|
|||
};
|
||||
partition@5 {
|
||||
label = "QSPI.u-boot-spl-os";
|
||||
reg = <0x00140000 0x00010000>;
|
||||
reg = <0x00140000 0x00080000>;
|
||||
};
|
||||
partition@6 {
|
||||
label = "QSPI.u-boot-env";
|
||||
reg = <0x00150000 0x00010000>;
|
||||
reg = <0x001c0000 0x00010000>;
|
||||
};
|
||||
partition@7 {
|
||||
label = "QSPI.u-boot-env.backup1";
|
||||
reg = <0x00160000 0x0010000>;
|
||||
reg = <0x001d0000 0x0010000>;
|
||||
};
|
||||
partition@8 {
|
||||
label = "QSPI.kernel";
|
||||
reg = <0x00170000 0x0800000>;
|
||||
reg = <0x001e0000 0x0800000>;
|
||||
};
|
||||
partition@9 {
|
||||
label = "QSPI.file-system";
|
||||
reg = <0x00970000 0x01690000>;
|
||||
reg = <0x009e0000 0x01620000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -736,7 +736,7 @@
|
|||
|
||||
dp_phy: video-phy@10040720 {
|
||||
compatible = "samsung,exynos5250-dp-video-phy";
|
||||
reg = <0x10040720 4>;
|
||||
samsung,pmu-syscon = <&pmu_system_controller>;
|
||||
#phy-cells = <0>;
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -372,3 +372,7 @@
|
|||
&usbdrd_dwc3_1 {
|
||||
dr_mode = "host";
|
||||
};
|
||||
|
||||
&cci {
|
||||
status = "disabled";
|
||||
};
|
||||
|
|
|
|||
|
|
@ -120,7 +120,7 @@
|
|||
};
|
||||
};
|
||||
|
||||
cci@10d20000 {
|
||||
cci: cci@10d20000 {
|
||||
compatible = "arm,cci-400";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
|
@ -503,8 +503,8 @@
|
|||
};
|
||||
|
||||
dp_phy: video-phy@10040728 {
|
||||
compatible = "samsung,exynos5250-dp-video-phy";
|
||||
reg = <0x10040728 4>;
|
||||
compatible = "samsung,exynos5420-dp-video-phy";
|
||||
samsung,pmu-syscon = <&pmu_system_controller>;
|
||||
#phy-cells = <0>;
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -162,7 +162,7 @@
|
|||
#size-cells = <0>;
|
||||
compatible = "fsl,imx25-cspi", "fsl,imx35-cspi";
|
||||
reg = <0x43fa4000 0x4000>;
|
||||
clocks = <&clks 62>, <&clks 62>;
|
||||
clocks = <&clks 78>, <&clks 78>;
|
||||
clock-names = "ipg", "per";
|
||||
interrupts = <14>;
|
||||
status = "disabled";
|
||||
|
|
|
|||
|
|
@ -127,24 +127,12 @@
|
|||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
reg_usbh1_vbus: regulator@0 {
|
||||
compatible = "regulator-fixed";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_usbh1reg>;
|
||||
reg = <0>;
|
||||
regulator-name = "usbh1_vbus";
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
gpio = <&gpio2 5 GPIO_ACTIVE_HIGH>;
|
||||
enable-active-high;
|
||||
};
|
||||
|
||||
reg_usbotg_vbus: regulator@1 {
|
||||
reg_hub_reset: regulator@0 {
|
||||
compatible = "regulator-fixed";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_usbotgreg>;
|
||||
reg = <1>;
|
||||
regulator-name = "usbotg_vbus";
|
||||
reg = <0>;
|
||||
regulator-name = "hub_reset";
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
gpio = <&gpio1 7 GPIO_ACTIVE_HIGH>;
|
||||
|
|
@ -176,6 +164,7 @@
|
|||
reg = <0>;
|
||||
clocks = <&clks IMX5_CLK_DUMMY>;
|
||||
clock-names = "main_clk";
|
||||
reset-gpios = <&gpio2 5 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -419,7 +408,7 @@
|
|||
&usbh1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_usbh1>;
|
||||
vbus-supply = <®_usbh1_vbus>;
|
||||
vbus-supply = <®_hub_reset>;
|
||||
fsl,usbphy = <&usbh1phy>;
|
||||
phy_type = "ulpi";
|
||||
status = "okay";
|
||||
|
|
@ -429,7 +418,6 @@
|
|||
dr_mode = "otg";
|
||||
disable-over-current;
|
||||
phy_type = "utmi_wide";
|
||||
vbus-supply = <®_usbotg_vbus>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -335,8 +335,8 @@
|
|||
vpu: vpu@02040000 {
|
||||
compatible = "cnm,coda960";
|
||||
reg = <0x02040000 0x3c000>;
|
||||
interrupts = <0 3 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 12 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupts = <0 12 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 3 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "bit", "jpeg";
|
||||
clocks = <&clks IMX6QDL_CLK_VPU_AXI>,
|
||||
<&clks IMX6QDL_CLK_MMDC_CH0_AXI>,
|
||||
|
|
|
|||
|
|
@ -159,13 +159,28 @@
|
|||
pinctrl-0 = <&pinctrl_enet1>;
|
||||
phy-supply = <®_enet_3v3>;
|
||||
phy-mode = "rgmii";
|
||||
phy-handle = <ðphy1>;
|
||||
status = "okay";
|
||||
|
||||
mdio {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
ethphy1: ethernet-phy@0 {
|
||||
reg = <0>;
|
||||
};
|
||||
|
||||
ethphy2: ethernet-phy@1 {
|
||||
reg = <1>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&fec2 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_enet2>;
|
||||
phy-mode = "rgmii";
|
||||
phy-handle = <ðphy2>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -142,6 +142,7 @@
|
|||
scfg: scfg@1570000 {
|
||||
compatible = "fsl,ls1021a-scfg", "syscon";
|
||||
reg = <0x0 0x1570000 0x0 0x10000>;
|
||||
big-endian;
|
||||
};
|
||||
|
||||
clockgen: clocking@1ee1000 {
|
||||
|
|
|
|||
|
|
@ -700,11 +700,9 @@
|
|||
};
|
||||
};
|
||||
|
||||
/* Ethernet is on some early development boards and qemu */
|
||||
ethernet@gpmc {
|
||||
compatible = "smsc,lan91c94";
|
||||
|
||||
status = "disabled";
|
||||
|
||||
interrupt-parent = <&gpio2>;
|
||||
interrupts = <22 IRQ_TYPE_LEVEL_HIGH>; /* gpio54 */
|
||||
reg = <1 0x300 0xf>; /* 16 byte IO range at offset 0x300 */
|
||||
|
|
|
|||
|
|
@ -155,6 +155,15 @@
|
|||
};
|
||||
|
||||
&pinctrl {
|
||||
pcfg_pull_none_drv_8ma: pcfg-pull-none-drv-8ma {
|
||||
drive-strength = <8>;
|
||||
};
|
||||
|
||||
pcfg_pull_up_drv_8ma: pcfg-pull-up-drv-8ma {
|
||||
bias-pull-up;
|
||||
drive-strength = <8>;
|
||||
};
|
||||
|
||||
backlight {
|
||||
bl_en: bl-en {
|
||||
rockchip,pins = <7 2 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
|
|
@ -173,6 +182,27 @@
|
|||
};
|
||||
};
|
||||
|
||||
sdmmc {
|
||||
/*
|
||||
* Default drive strength isn't enough to achieve even
|
||||
* high-speed mode on EVB board so bump up to 8ma.
|
||||
*/
|
||||
sdmmc_bus4: sdmmc-bus4 {
|
||||
rockchip,pins = <6 16 RK_FUNC_1 &pcfg_pull_up_drv_8ma>,
|
||||
<6 17 RK_FUNC_1 &pcfg_pull_up_drv_8ma>,
|
||||
<6 18 RK_FUNC_1 &pcfg_pull_up_drv_8ma>,
|
||||
<6 19 RK_FUNC_1 &pcfg_pull_up_drv_8ma>;
|
||||
};
|
||||
|
||||
sdmmc_clk: sdmmc-clk {
|
||||
rockchip,pins = <6 20 RK_FUNC_1 &pcfg_pull_none_drv_8ma>;
|
||||
};
|
||||
|
||||
sdmmc_cmd: sdmmc-cmd {
|
||||
rockchip,pins = <6 21 RK_FUNC_1 &pcfg_pull_up_drv_8ma>;
|
||||
};
|
||||
};
|
||||
|
||||
usb {
|
||||
host_vbus_drv: host-vbus-drv {
|
||||
rockchip,pins = <0 14 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
|
|
|
|||
|
|
@ -176,7 +176,7 @@
|
|||
"Headphone Jack", "HPOUTR",
|
||||
"IN2L", "Line In Jack",
|
||||
"IN2R", "Line In Jack",
|
||||
"MICBIAS", "IN1L",
|
||||
"Mic", "MICBIAS",
|
||||
"IN1L", "Mic";
|
||||
|
||||
atmel,ssc-controller = <&ssc0>;
|
||||
|
|
|
|||
|
|
@ -1008,7 +1008,7 @@
|
|||
|
||||
pit: timer@fc068630 {
|
||||
compatible = "atmel,at91sam9260-pit";
|
||||
reg = <0xfc068630 0xf>;
|
||||
reg = <0xfc068630 0x10>;
|
||||
interrupts = <3 IRQ_TYPE_LEVEL_HIGH 5>;
|
||||
clocks = <&h32ck>;
|
||||
};
|
||||
|
|
|
|||
|
|
@ -25,11 +25,11 @@
|
|||
stmpe2401_1 {
|
||||
stmpe2401_1_nhk_mode: stmpe2401_1_nhk {
|
||||
nhk_cfg1 {
|
||||
ste,pins = "GPIO76_B20"; // IRQ line
|
||||
pins = "GPIO76_B20"; // IRQ line
|
||||
ste,input = <0>;
|
||||
};
|
||||
nhk_cfg2 {
|
||||
ste,pins = "GPIO77_B8"; // reset line
|
||||
pins = "GPIO77_B8"; // reset line
|
||||
ste,output = <1>;
|
||||
};
|
||||
};
|
||||
|
|
@ -37,11 +37,11 @@
|
|||
stmpe2401_2 {
|
||||
stmpe2401_2_nhk_mode: stmpe2401_2_nhk {
|
||||
nhk_cfg1 {
|
||||
ste,pins = "GPIO78_A8"; // IRQ line
|
||||
pins = "GPIO78_A8"; // IRQ line
|
||||
ste,input = <0>;
|
||||
};
|
||||
nhk_cfg2 {
|
||||
ste,pins = "GPIO79_C9"; // reset line
|
||||
pins = "GPIO79_C9"; // reset line
|
||||
ste,output = <1>;
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -129,13 +129,28 @@
|
|||
|
||||
&fec0 {
|
||||
phy-mode = "rmii";
|
||||
phy-handle = <ðphy0>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_fec0>;
|
||||
status = "okay";
|
||||
|
||||
mdio {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
ethphy0: ethernet-phy@0 {
|
||||
reg = <0>;
|
||||
};
|
||||
|
||||
ethphy1: ethernet-phy@1 {
|
||||
reg = <1>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&fec1 {
|
||||
phy-mode = "rmii";
|
||||
phy-handle = <ðphy1>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_fec1>;
|
||||
status = "okay";
|
||||
|
|
|
|||
|
|
@ -84,7 +84,8 @@ CONFIG_DEBUG_GPIO=y
|
|||
CONFIG_POWER_SUPPLY=y
|
||||
CONFIG_BATTERY_SBS=y
|
||||
CONFIG_CHARGER_TPS65090=y
|
||||
# CONFIG_HWMON is not set
|
||||
CONFIG_HWMON=y
|
||||
CONFIG_SENSORS_LM90=y
|
||||
CONFIG_THERMAL=y
|
||||
CONFIG_EXYNOS_THERMAL=y
|
||||
CONFIG_EXYNOS_THERMAL_CORE=y
|
||||
|
|
@ -109,11 +110,26 @@ CONFIG_REGULATOR_S2MPA01=y
|
|||
CONFIG_REGULATOR_S2MPS11=y
|
||||
CONFIG_REGULATOR_S5M8767=y
|
||||
CONFIG_REGULATOR_TPS65090=y
|
||||
CONFIG_DRM=y
|
||||
CONFIG_DRM_BRIDGE=y
|
||||
CONFIG_DRM_PTN3460=y
|
||||
CONFIG_DRM_PS8622=y
|
||||
CONFIG_DRM_EXYNOS=y
|
||||
CONFIG_DRM_EXYNOS_FIMD=y
|
||||
CONFIG_DRM_EXYNOS_DP=y
|
||||
CONFIG_DRM_PANEL=y
|
||||
CONFIG_DRM_PANEL_SIMPLE=y
|
||||
CONFIG_FB=y
|
||||
CONFIG_FB_MODE_HELPERS=y
|
||||
CONFIG_FB_SIMPLE=y
|
||||
CONFIG_EXYNOS_VIDEO=y
|
||||
CONFIG_EXYNOS_MIPI_DSI=y
|
||||
CONFIG_BACKLIGHT_LCD_SUPPORT=y
|
||||
CONFIG_LCD_CLASS_DEVICE=y
|
||||
CONFIG_LCD_PLATFORM=y
|
||||
CONFIG_BACKLIGHT_CLASS_DEVICE=y
|
||||
CONFIG_BACKLIGHT_GENERIC=y
|
||||
CONFIG_BACKLIGHT_PWM=y
|
||||
CONFIG_FRAMEBUFFER_CONSOLE=y
|
||||
CONFIG_FONTS=y
|
||||
CONFIG_FONT_7x14=y
|
||||
|
|
|
|||
|
|
@ -338,6 +338,7 @@ CONFIG_USB=y
|
|||
CONFIG_USB_XHCI_HCD=y
|
||||
CONFIG_USB_XHCI_MVEBU=y
|
||||
CONFIG_USB_EHCI_HCD=y
|
||||
CONFIG_USB_EHCI_EXYNOS=y
|
||||
CONFIG_USB_EHCI_TEGRA=y
|
||||
CONFIG_USB_EHCI_HCD_STI=y
|
||||
CONFIG_USB_EHCI_HCD_PLATFORM=y
|
||||
|
|
|
|||
|
|
@ -68,7 +68,7 @@ CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y
|
|||
CONFIG_CPU_FREQ_GOV_POWERSAVE=y
|
||||
CONFIG_CPU_FREQ_GOV_USERSPACE=y
|
||||
CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
|
||||
CONFIG_GENERIC_CPUFREQ_CPU0=y
|
||||
CONFIG_CPUFREQ_DT=y
|
||||
# CONFIG_ARM_OMAP2PLUS_CPUFREQ is not set
|
||||
CONFIG_CPU_IDLE=y
|
||||
CONFIG_BINFMT_MISC=y
|
||||
|
|
|
|||
|
|
@ -413,6 +413,7 @@
|
|||
#define __NR_getrandom (__NR_SYSCALL_BASE+384)
|
||||
#define __NR_memfd_create (__NR_SYSCALL_BASE+385)
|
||||
#define __NR_bpf (__NR_SYSCALL_BASE+386)
|
||||
#define __NR_execveat (__NR_SYSCALL_BASE+387)
|
||||
|
||||
/*
|
||||
* The following SWIs are ARM private.
|
||||
|
|
|
|||
|
|
@ -396,6 +396,7 @@
|
|||
CALL(sys_getrandom)
|
||||
/* 385 */ CALL(sys_memfd_create)
|
||||
CALL(sys_bpf)
|
||||
CALL(sys_execveat)
|
||||
#ifndef syscalls_counted
|
||||
.equ syscalls_padding, ((NR_syscalls + 3) & ~3) - NR_syscalls
|
||||
#define syscalls_counted
|
||||
|
|
|
|||
|
|
@ -28,3 +28,11 @@ u64 perf_reg_abi(struct task_struct *task)
|
|||
{
|
||||
return PERF_SAMPLE_REGS_ABI_32;
|
||||
}
|
||||
|
||||
void perf_get_regs_user(struct perf_regs *regs_user,
|
||||
struct pt_regs *regs,
|
||||
struct pt_regs *regs_user_copy)
|
||||
{
|
||||
regs_user->regs = task_pt_regs(current);
|
||||
regs_user->abi = perf_reg_abi(current);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -1046,6 +1046,15 @@ static int c_show(struct seq_file *m, void *v)
|
|||
seq_printf(m, "model name\t: %s rev %d (%s)\n",
|
||||
cpu_name, cpuid & 15, elf_platform);
|
||||
|
||||
#if defined(CONFIG_SMP)
|
||||
seq_printf(m, "BogoMIPS\t: %lu.%02lu\n",
|
||||
per_cpu(cpu_data, i).loops_per_jiffy / (500000UL/HZ),
|
||||
(per_cpu(cpu_data, i).loops_per_jiffy / (5000UL/HZ)) % 100);
|
||||
#else
|
||||
seq_printf(m, "BogoMIPS\t: %lu.%02lu\n",
|
||||
loops_per_jiffy / (500000/HZ),
|
||||
(loops_per_jiffy / (5000/HZ)) % 100);
|
||||
#endif
|
||||
/* dump out the processor features */
|
||||
seq_puts(m, "Features\t: ");
|
||||
|
||||
|
|
|
|||
|
|
@ -387,6 +387,18 @@ asmlinkage void secondary_start_kernel(void)
|
|||
|
||||
void __init smp_cpus_done(unsigned int max_cpus)
|
||||
{
|
||||
int cpu;
|
||||
unsigned long bogosum = 0;
|
||||
|
||||
for_each_online_cpu(cpu)
|
||||
bogosum += per_cpu(cpu_data, cpu).loops_per_jiffy;
|
||||
|
||||
printk(KERN_INFO "SMP: Total of %d processors activated "
|
||||
"(%lu.%02lu BogoMIPS).\n",
|
||||
num_online_cpus(),
|
||||
bogosum / (500000/HZ),
|
||||
(bogosum / (5000/HZ)) % 100);
|
||||
|
||||
hyp_mode_check();
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -17,6 +17,7 @@
|
|||
#include <linux/of_platform.h>
|
||||
#include <linux/phy.h>
|
||||
#include <linux/clk-provider.h>
|
||||
#include <linux/phy.h>
|
||||
|
||||
#include <asm/setup.h>
|
||||
#include <asm/irq.h>
|
||||
|
|
@ -26,8 +27,25 @@
|
|||
|
||||
#include "generic.h"
|
||||
|
||||
static int ksz8081_phy_fixup(struct phy_device *phy)
|
||||
{
|
||||
int value;
|
||||
|
||||
value = phy_read(phy, 0x16);
|
||||
value &= ~0x20;
|
||||
phy_write(phy, 0x16, value);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void __init sama5_dt_device_init(void)
|
||||
{
|
||||
if (of_machine_is_compatible("atmel,sama5d4ek") &&
|
||||
IS_ENABLED(CONFIG_PHYLIB)) {
|
||||
phy_register_fixup_for_id("fc028000.etherne:00",
|
||||
ksz8081_phy_fixup);
|
||||
}
|
||||
|
||||
of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -144,7 +144,7 @@ static void __init imx6q_clocks_init(struct device_node *ccm_node)
|
|||
post_div_table[1].div = 1;
|
||||
post_div_table[2].div = 1;
|
||||
video_div_table[1].div = 1;
|
||||
video_div_table[2].div = 1;
|
||||
video_div_table[3].div = 1;
|
||||
}
|
||||
|
||||
clk[IMX6QDL_PLL1_BYPASS_SRC] = imx_clk_mux("pll1_bypass_src", base + 0x00, 14, 2, pll_bypass_src_sels, ARRAY_SIZE(pll_bypass_src_sels));
|
||||
|
|
|
|||
|
|
@ -558,6 +558,9 @@ static void __init imx6sx_clocks_init(struct device_node *ccm_node)
|
|||
clk_set_parent(clks[IMX6SX_CLK_GPU_CORE_SEL], clks[IMX6SX_CLK_PLL3_PFD0]);
|
||||
clk_set_parent(clks[IMX6SX_CLK_GPU_AXI_SEL], clks[IMX6SX_CLK_PLL3_PFD0]);
|
||||
|
||||
clk_set_parent(clks[IMX6SX_CLK_QSPI1_SEL], clks[IMX6SX_CLK_PLL2_BUS]);
|
||||
clk_set_parent(clks[IMX6SX_CLK_QSPI2_SEL], clks[IMX6SX_CLK_PLL2_BUS]);
|
||||
|
||||
/* Set initial power mode */
|
||||
imx6q_set_lpm(WAIT_CLOCKED);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -77,6 +77,24 @@ MACHINE_END
|
|||
#endif
|
||||
|
||||
#ifdef CONFIG_ARCH_OMAP3
|
||||
/* Some boards need board name for legacy userspace in /proc/cpuinfo */
|
||||
static const char *const n900_boards_compat[] __initconst = {
|
||||
"nokia,omap3-n900",
|
||||
NULL,
|
||||
};
|
||||
|
||||
DT_MACHINE_START(OMAP3_N900_DT, "Nokia RX-51 board")
|
||||
.reserve = omap_reserve,
|
||||
.map_io = omap3_map_io,
|
||||
.init_early = omap3430_init_early,
|
||||
.init_machine = omap_generic_init,
|
||||
.init_late = omap3_init_late,
|
||||
.init_time = omap3_sync32k_timer_init,
|
||||
.dt_compat = n900_boards_compat,
|
||||
.restart = omap3xxx_restart,
|
||||
MACHINE_END
|
||||
|
||||
/* Generic omap3 boards, most boards can use these */
|
||||
static const char *const omap3_boards_compat[] __initconst = {
|
||||
"ti,omap3430",
|
||||
"ti,omap3",
|
||||
|
|
|
|||
|
|
@ -249,6 +249,7 @@ extern void omap4_cpu_die(unsigned int cpu);
|
|||
extern struct smp_operations omap4_smp_ops;
|
||||
|
||||
extern void omap5_secondary_startup(void);
|
||||
extern void omap5_secondary_hyp_startup(void);
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_SMP) && defined(CONFIG_PM)
|
||||
|
|
|
|||
|
|
@ -286,6 +286,10 @@
|
|||
#define OMAP5XXX_CONTROL_STATUS 0x134
|
||||
#define OMAP5_DEVICETYPE_MASK (0x7 << 6)
|
||||
|
||||
/* DRA7XX CONTROL CORE BOOTSTRAP */
|
||||
#define DRA7_CTRL_CORE_BOOTSTRAP 0x6c4
|
||||
#define DRA7_SPEEDSELECT_MASK (0x3 << 8)
|
||||
|
||||
/*
|
||||
* REVISIT: This list of registers is not comprehensive - there are more
|
||||
* that should be added.
|
||||
|
|
|
|||
|
|
@ -22,6 +22,7 @@
|
|||
|
||||
/* Physical address needed since MMU not enabled yet on secondary core */
|
||||
#define AUX_CORE_BOOT0_PA 0x48281800
|
||||
#define API_HYP_ENTRY 0x102
|
||||
|
||||
/*
|
||||
* OMAP5 specific entry point for secondary CPU to jump from ROM
|
||||
|
|
@ -40,6 +41,26 @@ wait: ldr r2, =AUX_CORE_BOOT0_PA @ read from AuxCoreBoot0
|
|||
bne wait
|
||||
b secondary_startup
|
||||
ENDPROC(omap5_secondary_startup)
|
||||
/*
|
||||
* Same as omap5_secondary_startup except we call into the ROM to
|
||||
* enable HYP mode first. This is called instead of
|
||||
* omap5_secondary_startup if the primary CPU was put into HYP mode by
|
||||
* the boot loader.
|
||||
*/
|
||||
ENTRY(omap5_secondary_hyp_startup)
|
||||
wait_2: ldr r2, =AUX_CORE_BOOT0_PA @ read from AuxCoreBoot0
|
||||
ldr r0, [r2]
|
||||
mov r0, r0, lsr #5
|
||||
mrc p15, 0, r4, c0, c0, 5
|
||||
and r4, r4, #0x0f
|
||||
cmp r0, r4
|
||||
bne wait_2
|
||||
ldr r12, =API_HYP_ENTRY
|
||||
adr r0, hyp_boot
|
||||
smc #0
|
||||
hyp_boot:
|
||||
b secondary_startup
|
||||
ENDPROC(omap5_secondary_hyp_startup)
|
||||
/*
|
||||
* OMAP4 specific entry point for secondary CPU to jump from ROM
|
||||
* code. This routine also provides a holding flag into which
|
||||
|
|
|
|||
|
|
@ -22,6 +22,7 @@
|
|||
#include <linux/irqchip/arm-gic.h>
|
||||
|
||||
#include <asm/smp_scu.h>
|
||||
#include <asm/virt.h>
|
||||
|
||||
#include "omap-secure.h"
|
||||
#include "omap-wakeupgen.h"
|
||||
|
|
@ -227,8 +228,16 @@ static void __init omap4_smp_prepare_cpus(unsigned int max_cpus)
|
|||
if (omap_secure_apis_support())
|
||||
omap_auxcoreboot_addr(virt_to_phys(startup_addr));
|
||||
else
|
||||
writel_relaxed(virt_to_phys(omap5_secondary_startup),
|
||||
base + OMAP_AUX_CORE_BOOT_1);
|
||||
/*
|
||||
* If the boot CPU is in HYP mode then start secondary
|
||||
* CPU in HYP mode as well.
|
||||
*/
|
||||
if ((__boot_cpu_mode & MODE_MASK) == HYP_MODE)
|
||||
writel_relaxed(virt_to_phys(omap5_secondary_hyp_startup),
|
||||
base + OMAP_AUX_CORE_BOOT_1);
|
||||
else
|
||||
writel_relaxed(virt_to_phys(omap5_secondary_startup),
|
||||
base + OMAP_AUX_CORE_BOOT_1);
|
||||
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -54,6 +54,7 @@
|
|||
|
||||
#include "soc.h"
|
||||
#include "common.h"
|
||||
#include "control.h"
|
||||
#include "powerdomain.h"
|
||||
#include "omap-secure.h"
|
||||
|
||||
|
|
@ -496,7 +497,8 @@ static void __init realtime_counter_init(void)
|
|||
void __iomem *base;
|
||||
static struct clk *sys_clk;
|
||||
unsigned long rate;
|
||||
unsigned int reg, num, den;
|
||||
unsigned int reg;
|
||||
unsigned long long num, den;
|
||||
|
||||
base = ioremap(REALTIME_COUNTER_BASE, SZ_32);
|
||||
if (!base) {
|
||||
|
|
@ -511,13 +513,42 @@ static void __init realtime_counter_init(void)
|
|||
}
|
||||
|
||||
rate = clk_get_rate(sys_clk);
|
||||
|
||||
if (soc_is_dra7xx()) {
|
||||
/*
|
||||
* Errata i856 says the 32.768KHz crystal does not start at
|
||||
* power on, so the CPU falls back to an emulated 32KHz clock
|
||||
* based on sysclk / 610 instead. This causes the master counter
|
||||
* frequency to not be 6.144MHz but at sysclk / 610 * 375 / 2
|
||||
* (OR sysclk * 75 / 244)
|
||||
*
|
||||
* This affects at least the DRA7/AM572x 1.0, 1.1 revisions.
|
||||
* Of course any board built without a populated 32.768KHz
|
||||
* crystal would also need this fix even if the CPU is fixed
|
||||
* later.
|
||||
*
|
||||
* Either case can be detected by using the two speedselect bits
|
||||
* If they are not 0, then the 32.768KHz clock driving the
|
||||
* coarse counter that corrects the fine counter every time it
|
||||
* ticks is actually rate/610 rather than 32.768KHz and we
|
||||
* should compensate to avoid the 570ppm (at 20MHz, much worse
|
||||
* at other rates) too fast system time.
|
||||
*/
|
||||
reg = omap_ctrl_readl(DRA7_CTRL_CORE_BOOTSTRAP);
|
||||
if (reg & DRA7_SPEEDSELECT_MASK) {
|
||||
num = 75;
|
||||
den = 244;
|
||||
goto sysclk1_based;
|
||||
}
|
||||
}
|
||||
|
||||
/* Numerator/denumerator values refer TRM Realtime Counter section */
|
||||
switch (rate) {
|
||||
case 1200000:
|
||||
case 12000000:
|
||||
num = 64;
|
||||
den = 125;
|
||||
break;
|
||||
case 1300000:
|
||||
case 13000000:
|
||||
num = 768;
|
||||
den = 1625;
|
||||
break;
|
||||
|
|
@ -529,11 +560,11 @@ static void __init realtime_counter_init(void)
|
|||
num = 192;
|
||||
den = 625;
|
||||
break;
|
||||
case 2600000:
|
||||
case 26000000:
|
||||
num = 384;
|
||||
den = 1625;
|
||||
break;
|
||||
case 2700000:
|
||||
case 27000000:
|
||||
num = 256;
|
||||
den = 1125;
|
||||
break;
|
||||
|
|
@ -545,6 +576,7 @@ static void __init realtime_counter_init(void)
|
|||
break;
|
||||
}
|
||||
|
||||
sysclk1_based:
|
||||
/* Program numerator and denumerator registers */
|
||||
reg = readl_relaxed(base + INCREMENTER_NUMERATOR_OFFSET) &
|
||||
NUMERATOR_DENUMERATOR_MASK;
|
||||
|
|
@ -556,7 +588,7 @@ static void __init realtime_counter_init(void)
|
|||
reg |= den;
|
||||
writel_relaxed(reg, base + INCREMENTER_DENUMERATOR_RELOAD_OFFSET);
|
||||
|
||||
arch_timer_freq = (rate / den) * num;
|
||||
arch_timer_freq = DIV_ROUND_UP_ULL(rate * num, den);
|
||||
set_cntfreq();
|
||||
|
||||
iounmap(base);
|
||||
|
|
|
|||
|
|
@ -19,11 +19,37 @@
|
|||
#include <linux/init.h>
|
||||
#include <linux/of_platform.h>
|
||||
#include <linux/irqchip.h>
|
||||
#include <linux/clk-provider.h>
|
||||
#include <linux/clocksource.h>
|
||||
#include <linux/mfd/syscon.h>
|
||||
#include <linux/regmap.h>
|
||||
#include <asm/mach/arch.h>
|
||||
#include <asm/mach/map.h>
|
||||
#include <asm/hardware/cache-l2x0.h>
|
||||
#include "core.h"
|
||||
|
||||
#define RK3288_GRF_SOC_CON0 0x244
|
||||
|
||||
static void __init rockchip_timer_init(void)
|
||||
{
|
||||
if (of_machine_is_compatible("rockchip,rk3288")) {
|
||||
struct regmap *grf;
|
||||
|
||||
/*
|
||||
* Disable auto jtag/sdmmc switching that causes issues
|
||||
* with the mmc controllers making them unreliable
|
||||
*/
|
||||
grf = syscon_regmap_lookup_by_compatible("rockchip,rk3288-grf");
|
||||
if (!IS_ERR(grf))
|
||||
regmap_write(grf, RK3288_GRF_SOC_CON0, 0x10000000);
|
||||
else
|
||||
pr_err("rockchip: could not get grf syscon\n");
|
||||
}
|
||||
|
||||
of_clk_init(NULL);
|
||||
clocksource_of_init();
|
||||
}
|
||||
|
||||
static void __init rockchip_dt_init(void)
|
||||
{
|
||||
of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
|
||||
|
|
@ -42,6 +68,7 @@ static const char * const rockchip_board_dt_compat[] = {
|
|||
DT_MACHINE_START(ROCKCHIP_DT, "Rockchip Cortex-A9 (Device Tree)")
|
||||
.l2c_aux_val = 0,
|
||||
.l2c_aux_mask = ~0,
|
||||
.init_time = rockchip_timer_init,
|
||||
.dt_compat = rockchip_board_dt_compat,
|
||||
.init_machine = rockchip_dt_init,
|
||||
MACHINE_END
|
||||
|
|
|
|||
|
|
@ -800,7 +800,14 @@ void __init r8a7740_init_irq_of(void)
|
|||
void __iomem *intc_msk_base = ioremap_nocache(0xe6900040, 0x10);
|
||||
void __iomem *pfc_inta_ctrl = ioremap_nocache(0xe605807c, 0x4);
|
||||
|
||||
#ifdef CONFIG_ARCH_SHMOBILE_LEGACY
|
||||
void __iomem *gic_dist_base = ioremap_nocache(0xc2800000, 0x1000);
|
||||
void __iomem *gic_cpu_base = ioremap_nocache(0xc2000000, 0x1000);
|
||||
|
||||
gic_init(0, 29, gic_dist_base, gic_cpu_base);
|
||||
#else
|
||||
irqchip_init();
|
||||
#endif
|
||||
|
||||
/* route signals to GIC */
|
||||
iowrite32(0x0, pfc_inta_ctrl);
|
||||
|
|
|
|||
|
|
@ -595,6 +595,7 @@ static struct platform_device ipmmu_device = {
|
|||
|
||||
static struct renesas_intc_irqpin_config irqpin0_platform_data = {
|
||||
.irq_base = irq_pin(0), /* IRQ0 -> IRQ7 */
|
||||
.control_parent = true,
|
||||
};
|
||||
|
||||
static struct resource irqpin0_resources[] = {
|
||||
|
|
@ -656,6 +657,7 @@ static struct platform_device irqpin1_device = {
|
|||
|
||||
static struct renesas_intc_irqpin_config irqpin2_platform_data = {
|
||||
.irq_base = irq_pin(16), /* IRQ16 -> IRQ23 */
|
||||
.control_parent = true,
|
||||
};
|
||||
|
||||
static struct resource irqpin2_resources[] = {
|
||||
|
|
@ -686,6 +688,7 @@ static struct platform_device irqpin2_device = {
|
|||
|
||||
static struct renesas_intc_irqpin_config irqpin3_platform_data = {
|
||||
.irq_base = irq_pin(24), /* IRQ24 -> IRQ31 */
|
||||
.control_parent = true,
|
||||
};
|
||||
|
||||
static struct resource irqpin3_resources[] = {
|
||||
|
|
|
|||
|
|
@ -220,9 +220,6 @@ static void note_page(struct pg_state *st, unsigned long addr, unsigned level, u
|
|||
static const char units[] = "KMGTPE";
|
||||
u64 prot = val & pg_level[level].mask;
|
||||
|
||||
if (addr < USER_PGTABLES_CEILING)
|
||||
return;
|
||||
|
||||
if (!st->level) {
|
||||
st->level = level;
|
||||
st->current_prot = prot;
|
||||
|
|
@ -308,15 +305,13 @@ static void walk_pgd(struct seq_file *m)
|
|||
pgd_t *pgd = swapper_pg_dir;
|
||||
struct pg_state st;
|
||||
unsigned long addr;
|
||||
unsigned i, pgdoff = USER_PGTABLES_CEILING / PGDIR_SIZE;
|
||||
unsigned i;
|
||||
|
||||
memset(&st, 0, sizeof(st));
|
||||
st.seq = m;
|
||||
st.marker = address_markers;
|
||||
|
||||
pgd += pgdoff;
|
||||
|
||||
for (i = pgdoff; i < PTRS_PER_PGD; i++, pgd++) {
|
||||
for (i = 0; i < PTRS_PER_PGD; i++, pgd++) {
|
||||
addr = i * PGDIR_SIZE;
|
||||
if (!pgd_none(*pgd)) {
|
||||
walk_pud(&st, pgd, addr);
|
||||
|
|
|
|||
|
|
@ -658,8 +658,8 @@ static struct section_perm ro_perms[] = {
|
|||
.start = (unsigned long)_stext,
|
||||
.end = (unsigned long)__init_begin,
|
||||
#ifdef CONFIG_ARM_LPAE
|
||||
.mask = ~PMD_SECT_RDONLY,
|
||||
.prot = PMD_SECT_RDONLY,
|
||||
.mask = ~L_PMD_SECT_RDONLY,
|
||||
.prot = L_PMD_SECT_RDONLY,
|
||||
#else
|
||||
.mask = ~(PMD_SECT_APX | PMD_SECT_AP_WRITE),
|
||||
.prot = PMD_SECT_APX | PMD_SECT_AP_WRITE,
|
||||
|
|
|
|||
|
|
@ -1329,8 +1329,8 @@ static void __init kmap_init(void)
|
|||
static void __init map_lowmem(void)
|
||||
{
|
||||
struct memblock_region *reg;
|
||||
unsigned long kernel_x_start = round_down(__pa(_stext), SECTION_SIZE);
|
||||
unsigned long kernel_x_end = round_up(__pa(__init_end), SECTION_SIZE);
|
||||
phys_addr_t kernel_x_start = round_down(__pa(_stext), SECTION_SIZE);
|
||||
phys_addr_t kernel_x_end = round_up(__pa(__init_end), SECTION_SIZE);
|
||||
|
||||
/* Map all the lowmem memory banks. */
|
||||
for_each_memblock(memory, reg) {
|
||||
|
|
|
|||
|
|
@ -21,6 +21,7 @@
|
|||
|
||||
#include <asm/barrier.h>
|
||||
|
||||
#include <linux/bug.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/types.h>
|
||||
|
||||
|
|
|
|||
|
|
@ -39,6 +39,7 @@ struct cpuinfo_arm64 {
|
|||
u64 reg_id_aa64pfr0;
|
||||
u64 reg_id_aa64pfr1;
|
||||
|
||||
u32 reg_id_dfr0;
|
||||
u32 reg_id_isar0;
|
||||
u32 reg_id_isar1;
|
||||
u32 reg_id_isar2;
|
||||
|
|
@ -51,6 +52,10 @@ struct cpuinfo_arm64 {
|
|||
u32 reg_id_mmfr3;
|
||||
u32 reg_id_pfr0;
|
||||
u32 reg_id_pfr1;
|
||||
|
||||
u32 reg_mvfr0;
|
||||
u32 reg_mvfr1;
|
||||
u32 reg_mvfr2;
|
||||
};
|
||||
|
||||
DECLARE_PER_CPU(struct cpuinfo_arm64, cpu_data);
|
||||
|
|
|
|||
|
|
@ -41,6 +41,8 @@ void kvm_inject_pabt(struct kvm_vcpu *vcpu, unsigned long addr);
|
|||
static inline void vcpu_reset_hcr(struct kvm_vcpu *vcpu)
|
||||
{
|
||||
vcpu->arch.hcr_el2 = HCR_GUEST_FLAGS;
|
||||
if (test_bit(KVM_ARM_VCPU_EL1_32BIT, vcpu->arch.features))
|
||||
vcpu->arch.hcr_el2 &= ~HCR_RW;
|
||||
}
|
||||
|
||||
static inline unsigned long *vcpu_pc(const struct kvm_vcpu *vcpu)
|
||||
|
|
|
|||
|
|
@ -31,6 +31,7 @@
|
|||
|
||||
#include <asm/fpsimd.h>
|
||||
#include <asm/hw_breakpoint.h>
|
||||
#include <asm/pgtable-hwdef.h>
|
||||
#include <asm/ptrace.h>
|
||||
#include <asm/types.h>
|
||||
|
||||
|
|
@ -123,9 +124,6 @@ struct task_struct;
|
|||
/* Free all resources held by a thread. */
|
||||
extern void release_thread(struct task_struct *);
|
||||
|
||||
/* Prepare to copy thread state - unlazy all lazy status */
|
||||
#define prepare_to_copy(tsk) do { } while (0)
|
||||
|
||||
unsigned long get_wchan(struct task_struct *p);
|
||||
|
||||
#define cpu_relax() barrier()
|
||||
|
|
|
|||
|
|
@ -44,7 +44,7 @@
|
|||
#define __ARM_NR_compat_cacheflush (__ARM_NR_COMPAT_BASE+2)
|
||||
#define __ARM_NR_compat_set_tls (__ARM_NR_COMPAT_BASE+5)
|
||||
|
||||
#define __NR_compat_syscalls 386
|
||||
#define __NR_compat_syscalls 388
|
||||
#endif
|
||||
|
||||
#define __ARCH_WANT_SYS_CLONE
|
||||
|
|
|
|||
|
|
@ -795,3 +795,5 @@ __SYSCALL(__NR_getrandom, sys_getrandom)
|
|||
__SYSCALL(__NR_memfd_create, sys_memfd_create)
|
||||
#define __NR_bpf 386
|
||||
__SYSCALL(__NR_bpf, sys_bpf)
|
||||
#define __NR_execveat 387
|
||||
__SYSCALL(__NR_execveat, compat_sys_execveat)
|
||||
|
|
|
|||
|
|
@ -147,6 +147,7 @@ static void cpuinfo_sanity_check(struct cpuinfo_arm64 *cur)
|
|||
* If we have AArch32, we care about 32-bit features for compat. These
|
||||
* registers should be RES0 otherwise.
|
||||
*/
|
||||
diff |= CHECK(id_dfr0, boot, cur, cpu);
|
||||
diff |= CHECK(id_isar0, boot, cur, cpu);
|
||||
diff |= CHECK(id_isar1, boot, cur, cpu);
|
||||
diff |= CHECK(id_isar2, boot, cur, cpu);
|
||||
|
|
@ -165,6 +166,10 @@ static void cpuinfo_sanity_check(struct cpuinfo_arm64 *cur)
|
|||
diff |= CHECK(id_pfr0, boot, cur, cpu);
|
||||
diff |= CHECK(id_pfr1, boot, cur, cpu);
|
||||
|
||||
diff |= CHECK(mvfr0, boot, cur, cpu);
|
||||
diff |= CHECK(mvfr1, boot, cur, cpu);
|
||||
diff |= CHECK(mvfr2, boot, cur, cpu);
|
||||
|
||||
/*
|
||||
* Mismatched CPU features are a recipe for disaster. Don't even
|
||||
* pretend to support them.
|
||||
|
|
@ -189,6 +194,7 @@ static void __cpuinfo_store_cpu(struct cpuinfo_arm64 *info)
|
|||
info->reg_id_aa64pfr0 = read_cpuid(ID_AA64PFR0_EL1);
|
||||
info->reg_id_aa64pfr1 = read_cpuid(ID_AA64PFR1_EL1);
|
||||
|
||||
info->reg_id_dfr0 = read_cpuid(ID_DFR0_EL1);
|
||||
info->reg_id_isar0 = read_cpuid(ID_ISAR0_EL1);
|
||||
info->reg_id_isar1 = read_cpuid(ID_ISAR1_EL1);
|
||||
info->reg_id_isar2 = read_cpuid(ID_ISAR2_EL1);
|
||||
|
|
@ -202,6 +208,10 @@ static void __cpuinfo_store_cpu(struct cpuinfo_arm64 *info)
|
|||
info->reg_id_pfr0 = read_cpuid(ID_PFR0_EL1);
|
||||
info->reg_id_pfr1 = read_cpuid(ID_PFR1_EL1);
|
||||
|
||||
info->reg_mvfr0 = read_cpuid(MVFR0_EL1);
|
||||
info->reg_mvfr1 = read_cpuid(MVFR1_EL1);
|
||||
info->reg_mvfr2 = read_cpuid(MVFR2_EL1);
|
||||
|
||||
cpuinfo_detect_icache_policy(info);
|
||||
|
||||
check_local_cpu_errata();
|
||||
|
|
|
|||
|
|
@ -326,6 +326,7 @@ void __init efi_idmap_init(void)
|
|||
|
||||
/* boot time idmap_pg_dir is incomplete, so fill in missing parts */
|
||||
efi_setup_idmap();
|
||||
early_memunmap(memmap.map, memmap.map_end - memmap.map);
|
||||
}
|
||||
|
||||
static int __init remap_region(efi_memory_desc_t *md, void **new)
|
||||
|
|
@ -380,7 +381,6 @@ static int __init arm64_enter_virtual_mode(void)
|
|||
}
|
||||
|
||||
mapsize = memmap.map_end - memmap.map;
|
||||
early_memunmap(memmap.map, mapsize);
|
||||
|
||||
if (efi_runtime_disabled()) {
|
||||
pr_info("EFI runtime services will be disabled.\n");
|
||||
|
|
|
|||
|
|
@ -25,6 +25,7 @@
|
|||
#include <linux/mm.h>
|
||||
#include <linux/moduleloader.h>
|
||||
#include <linux/vmalloc.h>
|
||||
#include <asm/alternative.h>
|
||||
#include <asm/insn.h>
|
||||
#include <asm/sections.h>
|
||||
|
||||
|
|
|
|||
|
|
@ -50,3 +50,11 @@ u64 perf_reg_abi(struct task_struct *task)
|
|||
else
|
||||
return PERF_SAMPLE_REGS_ABI_64;
|
||||
}
|
||||
|
||||
void perf_get_regs_user(struct perf_regs *regs_user,
|
||||
struct pt_regs *regs,
|
||||
struct pt_regs *regs_user_copy)
|
||||
{
|
||||
regs_user->regs = task_pt_regs(current);
|
||||
regs_user->abi = perf_reg_abi(current);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -402,6 +402,7 @@ void __init setup_arch(char **cmdline_p)
|
|||
request_standard_resources();
|
||||
|
||||
efi_idmap_init();
|
||||
early_ioremap_reset();
|
||||
|
||||
unflatten_device_tree();
|
||||
|
||||
|
|
|
|||
|
|
@ -25,6 +25,7 @@
|
|||
#include <asm/cacheflush.h>
|
||||
#include <asm/cpu_ops.h>
|
||||
#include <asm/cputype.h>
|
||||
#include <asm/io.h>
|
||||
#include <asm/smp_plat.h>
|
||||
|
||||
extern void secondary_holding_pen(void);
|
||||
|
|
|
|||
|
|
@ -1014,6 +1014,7 @@ ENTRY(__kvm_tlb_flush_vmid_ipa)
|
|||
* Instead, we invalidate Stage-2 for this IPA, and the
|
||||
* whole of Stage-1. Weep...
|
||||
*/
|
||||
lsr x1, x1, #12
|
||||
tlbi ipas2e1is, x1
|
||||
/*
|
||||
* We have to ensure completion of the invalidation at Stage-2,
|
||||
|
|
|
|||
|
|
@ -90,7 +90,6 @@ int kvm_reset_vcpu(struct kvm_vcpu *vcpu)
|
|||
if (!cpu_has_32bit_el1())
|
||||
return -EINVAL;
|
||||
cpu_reset = &default_regs_reset32;
|
||||
vcpu->arch.hcr_el2 &= ~HCR_RW;
|
||||
} else {
|
||||
cpu_reset = &default_regs_reset;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -335,14 +335,8 @@ static int keep_initrd;
|
|||
|
||||
void free_initrd_mem(unsigned long start, unsigned long end)
|
||||
{
|
||||
if (!keep_initrd) {
|
||||
if (start == initrd_start)
|
||||
start = round_down(start, PAGE_SIZE);
|
||||
if (end == initrd_end)
|
||||
end = round_up(end, PAGE_SIZE);
|
||||
|
||||
if (!keep_initrd)
|
||||
free_reserved_area((void *)start, (void *)end, 0, "initrd");
|
||||
}
|
||||
}
|
||||
|
||||
static int __init keepinitrd_setup(char *__unused)
|
||||
|
|
|
|||
|
|
@ -7,6 +7,7 @@
|
|||
*/
|
||||
|
||||
#include <linux/device.h>
|
||||
#include <linux/delay.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/mtd/mtd.h>
|
||||
#include <linux/mtd/partitions.h>
|
||||
|
|
|
|||
|
|
@ -11,7 +11,7 @@
|
|||
|
||||
|
||||
|
||||
#define NR_syscalls 318 /* length of syscall table */
|
||||
#define NR_syscalls 319 /* length of syscall table */
|
||||
|
||||
/*
|
||||
* The following defines stop scripts/checksyscalls.sh from complaining about
|
||||
|
|
|
|||
|
|
@ -331,5 +331,6 @@
|
|||
#define __NR_getrandom 1339
|
||||
#define __NR_memfd_create 1340
|
||||
#define __NR_bpf 1341
|
||||
#define __NR_execveat 1342
|
||||
|
||||
#endif /* _UAPI_ASM_IA64_UNISTD_H */
|
||||
|
|
|
|||
|
|
@ -893,13 +893,13 @@ static int _acpi_map_lsapic(acpi_handle handle, int physid, int *pcpu)
|
|||
}
|
||||
|
||||
/* wrapper to silence section mismatch warning */
|
||||
int __ref acpi_map_lsapic(acpi_handle handle, int physid, int *pcpu)
|
||||
int __ref acpi_map_cpu(acpi_handle handle, int physid, int *pcpu)
|
||||
{
|
||||
return _acpi_map_lsapic(handle, physid, pcpu);
|
||||
}
|
||||
EXPORT_SYMBOL(acpi_map_lsapic);
|
||||
EXPORT_SYMBOL(acpi_map_cpu);
|
||||
|
||||
int acpi_unmap_lsapic(int cpu)
|
||||
int acpi_unmap_cpu(int cpu)
|
||||
{
|
||||
ia64_cpu_to_sapicid[cpu] = -1;
|
||||
set_cpu_present(cpu, false);
|
||||
|
|
@ -910,8 +910,7 @@ int acpi_unmap_lsapic(int cpu)
|
|||
|
||||
return (0);
|
||||
}
|
||||
|
||||
EXPORT_SYMBOL(acpi_unmap_lsapic);
|
||||
EXPORT_SYMBOL(acpi_unmap_cpu);
|
||||
#endif /* CONFIG_ACPI_HOTPLUG_CPU */
|
||||
|
||||
#ifdef CONFIG_ACPI_NUMA
|
||||
|
|
|
|||
|
|
@ -1779,6 +1779,7 @@ sys_call_table:
|
|||
data8 sys_getrandom
|
||||
data8 sys_memfd_create // 1340
|
||||
data8 sys_bpf
|
||||
data8 sys_execveat
|
||||
|
||||
.org sys_call_table + 8*NR_syscalls // guard against failures to increase NR_syscalls
|
||||
#endif /* __IA64_ASM_PARAVIRTUALIZED_NATIVE */
|
||||
|
|
|
|||
|
|
@ -4,7 +4,7 @@
|
|||
#include <uapi/asm/unistd.h>
|
||||
|
||||
|
||||
#define NR_syscalls 355
|
||||
#define NR_syscalls 356
|
||||
|
||||
#define __ARCH_WANT_OLD_READDIR
|
||||
#define __ARCH_WANT_OLD_STAT
|
||||
|
|
|
|||
|
|
@ -360,5 +360,6 @@
|
|||
#define __NR_getrandom 352
|
||||
#define __NR_memfd_create 353
|
||||
#define __NR_bpf 354
|
||||
#define __NR_execveat 355
|
||||
|
||||
#endif /* _UAPI_ASM_M68K_UNISTD_H_ */
|
||||
|
|
|
|||
|
|
@ -375,4 +375,5 @@ ENTRY(sys_call_table)
|
|||
.long sys_getrandom
|
||||
.long sys_memfd_create
|
||||
.long sys_bpf
|
||||
.long sys_execveat /* 355 */
|
||||
|
||||
|
|
|
|||
|
|
@ -72,6 +72,7 @@ void __init setup_cpuinfo(void)
|
|||
cpuinfo.has_div = fcpu_has(cpu, "altr,has-div");
|
||||
cpuinfo.has_mul = fcpu_has(cpu, "altr,has-mul");
|
||||
cpuinfo.has_mulx = fcpu_has(cpu, "altr,has-mulx");
|
||||
cpuinfo.mmu = fcpu_has(cpu, "altr,has-mmu");
|
||||
|
||||
if (IS_ENABLED(CONFIG_NIOS2_HW_DIV_SUPPORT) && !cpuinfo.has_div)
|
||||
err_cpu("DIV");
|
||||
|
|
|
|||
|
|
@ -365,30 +365,14 @@ ENTRY(ret_from_interrupt)
|
|||
GET_THREAD_INFO r1
|
||||
ldw r4, TI_PREEMPT_COUNT(r1)
|
||||
bne r4, r0, restore_all
|
||||
|
||||
need_resched:
|
||||
ldw r4, TI_FLAGS(r1) /* ? Need resched set */
|
||||
BTBZ r10, r4, TIF_NEED_RESCHED, restore_all
|
||||
ldw r4, PT_ESTATUS(sp) /* ? Interrupts off */
|
||||
andi r10, r4, ESTATUS_EPIE
|
||||
beq r10, r0, restore_all
|
||||
movia r4, PREEMPT_ACTIVE
|
||||
stw r4, TI_PREEMPT_COUNT(r1)
|
||||
rdctl r10, status /* enable intrs again */
|
||||
ori r10, r10 ,STATUS_PIE
|
||||
wrctl status, r10
|
||||
PUSH r1
|
||||
call schedule
|
||||
POP r1
|
||||
mov r4, r0
|
||||
stw r4, TI_PREEMPT_COUNT(r1)
|
||||
rdctl r10, status /* disable intrs */
|
||||
andi r10, r10, %lo(~STATUS_PIE)
|
||||
wrctl status, r10
|
||||
br need_resched
|
||||
#else
|
||||
br restore_all
|
||||
call preempt_schedule_irq
|
||||
#endif
|
||||
br restore_all
|
||||
|
||||
/***********************************************************************
|
||||
* A few syscall wrappers
|
||||
|
|
|
|||
|
|
@ -86,6 +86,11 @@ extern int overlaps_crashkernel(unsigned long start, unsigned long size);
|
|||
extern void reserve_crashkernel(void);
|
||||
extern void machine_kexec_mask_interrupts(void);
|
||||
|
||||
static inline bool kdump_in_progress(void)
|
||||
{
|
||||
return crashing_cpu >= 0;
|
||||
}
|
||||
|
||||
#else /* !CONFIG_KEXEC */
|
||||
static inline void crash_kexec_secondary(struct pt_regs *regs) { }
|
||||
|
||||
|
|
@ -106,6 +111,11 @@ static inline int crash_shutdown_unregister(crash_shutdown_t handler)
|
|||
return 0;
|
||||
}
|
||||
|
||||
static inline bool kdump_in_progress(void)
|
||||
{
|
||||
return false;
|
||||
}
|
||||
|
||||
#endif /* CONFIG_KEXEC */
|
||||
#endif /* ! __ASSEMBLY__ */
|
||||
#endif /* __KERNEL__ */
|
||||
|
|
|
|||
|
|
@ -366,3 +366,4 @@ SYSCALL_SPU(seccomp)
|
|||
SYSCALL_SPU(getrandom)
|
||||
SYSCALL_SPU(memfd_create)
|
||||
SYSCALL_SPU(bpf)
|
||||
COMPAT_SYS(execveat)
|
||||
|
|
|
|||
|
|
@ -23,9 +23,9 @@
|
|||
#define THREAD_SIZE (1 << THREAD_SHIFT)
|
||||
|
||||
#ifdef CONFIG_PPC64
|
||||
#define CURRENT_THREAD_INFO(dest, sp) clrrdi dest, sp, THREAD_SHIFT
|
||||
#define CURRENT_THREAD_INFO(dest, sp) stringify_in_c(clrrdi dest, sp, THREAD_SHIFT)
|
||||
#else
|
||||
#define CURRENT_THREAD_INFO(dest, sp) rlwinm dest, sp, 0, 0, 31-THREAD_SHIFT
|
||||
#define CURRENT_THREAD_INFO(dest, sp) stringify_in_c(rlwinm dest, sp, 0, 0, 31-THREAD_SHIFT)
|
||||
#endif
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
|
|
@ -71,12 +71,13 @@ struct thread_info {
|
|||
#define THREAD_SIZE_ORDER (THREAD_SHIFT - PAGE_SHIFT)
|
||||
|
||||
/* how to get the thread information struct from C */
|
||||
register unsigned long __current_r1 asm("r1");
|
||||
static inline struct thread_info *current_thread_info(void)
|
||||
{
|
||||
/* gcc4, at least, is smart enough to turn this into a single
|
||||
* rlwinm for ppc32 and clrrdi for ppc64 */
|
||||
return (struct thread_info *)(__current_r1 & ~(THREAD_SIZE-1));
|
||||
unsigned long val;
|
||||
|
||||
asm (CURRENT_THREAD_INFO(%0,1) : "=r" (val));
|
||||
|
||||
return (struct thread_info *)val;
|
||||
}
|
||||
|
||||
#endif /* __ASSEMBLY__ */
|
||||
|
|
|
|||
|
|
@ -12,7 +12,7 @@
|
|||
#include <uapi/asm/unistd.h>
|
||||
|
||||
|
||||
#define __NR_syscalls 362
|
||||
#define __NR_syscalls 363
|
||||
|
||||
#define __NR__exit __NR_exit
|
||||
#define NR_syscalls __NR_syscalls
|
||||
|
|
|
|||
|
|
@ -384,5 +384,6 @@
|
|||
#define __NR_getrandom 359
|
||||
#define __NR_memfd_create 360
|
||||
#define __NR_bpf 361
|
||||
#define __NR_execveat 362
|
||||
|
||||
#endif /* _UAPI_ASM_POWERPC_UNISTD_H_ */
|
||||
|
|
|
|||
|
|
@ -330,7 +330,7 @@ void default_machine_kexec(struct kimage *image)
|
|||
* using debugger IPI.
|
||||
*/
|
||||
|
||||
if (crashing_cpu == -1)
|
||||
if (!kdump_in_progress())
|
||||
kexec_prepare_cpus();
|
||||
|
||||
pr_debug("kexec: Starting switchover sequence.\n");
|
||||
|
|
|
|||
|
|
@ -700,6 +700,7 @@ void start_secondary(void *unused)
|
|||
smp_store_cpu_info(cpu);
|
||||
set_dec(tb_ticks_per_jiffy);
|
||||
preempt_disable();
|
||||
cpu_callin_map[cpu] = 1;
|
||||
|
||||
if (smp_ops->setup_cpu)
|
||||
smp_ops->setup_cpu(cpu);
|
||||
|
|
@ -738,14 +739,6 @@ void start_secondary(void *unused)
|
|||
notify_cpu_starting(cpu);
|
||||
set_cpu_online(cpu, true);
|
||||
|
||||
/*
|
||||
* CPU must be marked active and online before we signal back to the
|
||||
* master, because the scheduler needs to see the cpu_online and
|
||||
* cpu_active bits set.
|
||||
*/
|
||||
smp_wmb();
|
||||
cpu_callin_map[cpu] = 1;
|
||||
|
||||
local_irq_enable();
|
||||
|
||||
cpu_startup_entry(CPUHP_ONLINE);
|
||||
|
|
|
|||
|
|
@ -40,7 +40,6 @@ BEGIN_FTR_SECTION; \
|
|||
b 1f; \
|
||||
END_FTR_SECTION(0, 1); \
|
||||
ld r12,opal_tracepoint_refcount@toc(r2); \
|
||||
std r12,32(r1); \
|
||||
cmpdi r12,0; \
|
||||
bne- LABEL; \
|
||||
1:
|
||||
|
|
|
|||
|
|
@ -43,6 +43,7 @@
|
|||
#include <asm/trace.h>
|
||||
#include <asm/firmware.h>
|
||||
#include <asm/plpar_wrappers.h>
|
||||
#include <asm/kexec.h>
|
||||
#include <asm/fadump.h>
|
||||
|
||||
#include "pseries.h"
|
||||
|
|
@ -267,8 +268,13 @@ static void pSeries_lpar_hptab_clear(void)
|
|||
* out to the user, but at least this will stop us from
|
||||
* continuing on further and creating an even more
|
||||
* difficult to debug situation.
|
||||
*
|
||||
* There is a known problem when kdump'ing, if cpus are offline
|
||||
* the above call will fail. Rather than panicking again, keep
|
||||
* going and hope the kdump kernel is also little endian, which
|
||||
* it usually is.
|
||||
*/
|
||||
if (rc)
|
||||
if (rc && !kdump_in_progress())
|
||||
panic("Could not enable big endian exceptions");
|
||||
}
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -231,7 +231,7 @@ failed:
|
|||
struct dbfs_d2fc_hdr {
|
||||
u64 len; /* Length of d2fc buffer without header */
|
||||
u16 version; /* Version of header */
|
||||
char tod_ext[16]; /* TOD clock for d2fc */
|
||||
char tod_ext[STORE_CLOCK_EXT_SIZE]; /* TOD clock for d2fc */
|
||||
u64 count; /* Number of VM guests in d2fc buffer */
|
||||
char reserved[30];
|
||||
} __attribute__ ((packed));
|
||||
|
|
|
|||
|
|
@ -36,7 +36,7 @@ static inline notrace void __arch_local_irq_ssm(unsigned long flags)
|
|||
|
||||
static inline notrace unsigned long arch_local_save_flags(void)
|
||||
{
|
||||
return __arch_local_irq_stosm(0x00);
|
||||
return __arch_local_irq_stnsm(0xff);
|
||||
}
|
||||
|
||||
static inline notrace unsigned long arch_local_irq_save(void)
|
||||
|
|
|
|||
|
|
@ -67,20 +67,22 @@ static inline void local_tick_enable(unsigned long long comp)
|
|||
set_clock_comparator(S390_lowcore.clock_comparator);
|
||||
}
|
||||
|
||||
#define CLOCK_TICK_RATE 1193180 /* Underlying HZ */
|
||||
#define CLOCK_TICK_RATE 1193180 /* Underlying HZ */
|
||||
#define STORE_CLOCK_EXT_SIZE 16 /* stcke writes 16 bytes */
|
||||
|
||||
typedef unsigned long long cycles_t;
|
||||
|
||||
static inline void get_tod_clock_ext(char clk[16])
|
||||
static inline void get_tod_clock_ext(char *clk)
|
||||
{
|
||||
typedef struct { char _[sizeof(clk)]; } addrtype;
|
||||
typedef struct { char _[STORE_CLOCK_EXT_SIZE]; } addrtype;
|
||||
|
||||
asm volatile("stcke %0" : "=Q" (*(addrtype *) clk) : : "cc");
|
||||
}
|
||||
|
||||
static inline unsigned long long get_tod_clock(void)
|
||||
{
|
||||
unsigned char clk[16];
|
||||
unsigned char clk[STORE_CLOCK_EXT_SIZE];
|
||||
|
||||
get_tod_clock_ext(clk);
|
||||
return *((unsigned long long *)&clk[1]);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -289,7 +289,8 @@
|
|||
#define __NR_bpf 351
|
||||
#define __NR_s390_pci_mmio_write 352
|
||||
#define __NR_s390_pci_mmio_read 353
|
||||
#define NR_syscalls 354
|
||||
#define __NR_execveat 354
|
||||
#define NR_syscalls 355
|
||||
|
||||
/*
|
||||
* There are some system calls that are not present on 64 bit, some
|
||||
|
|
|
|||
|
|
@ -362,3 +362,4 @@ SYSCALL(sys_memfd_create,sys_memfd_create,compat_sys_memfd_create) /* 350 */
|
|||
SYSCALL(sys_bpf,sys_bpf,compat_sys_bpf)
|
||||
SYSCALL(sys_ni_syscall,sys_s390_pci_mmio_write,compat_sys_s390_pci_mmio_write)
|
||||
SYSCALL(sys_ni_syscall,sys_s390_pci_mmio_read,compat_sys_s390_pci_mmio_read)
|
||||
SYSCALL(sys_execveat,sys_execveat,compat_sys_execveat)
|
||||
|
|
|
|||
|
|
@ -48,6 +48,30 @@ bool arch_uprobe_xol_was_trapped(struct task_struct *tsk)
|
|||
return false;
|
||||
}
|
||||
|
||||
static int check_per_event(unsigned short cause, unsigned long control,
|
||||
struct pt_regs *regs)
|
||||
{
|
||||
if (!(regs->psw.mask & PSW_MASK_PER))
|
||||
return 0;
|
||||
/* user space single step */
|
||||
if (control == 0)
|
||||
return 1;
|
||||
/* over indication for storage alteration */
|
||||
if ((control & 0x20200000) && (cause & 0x2000))
|
||||
return 1;
|
||||
if (cause & 0x8000) {
|
||||
/* all branches */
|
||||
if ((control & 0x80800000) == 0x80000000)
|
||||
return 1;
|
||||
/* branch into selected range */
|
||||
if (((control & 0x80800000) == 0x80800000) &&
|
||||
regs->psw.addr >= current->thread.per_user.start &&
|
||||
regs->psw.addr <= current->thread.per_user.end)
|
||||
return 1;
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
int arch_uprobe_post_xol(struct arch_uprobe *auprobe, struct pt_regs *regs)
|
||||
{
|
||||
int fixup = probe_get_fixup_type(auprobe->insn);
|
||||
|
|
@ -71,9 +95,13 @@ int arch_uprobe_post_xol(struct arch_uprobe *auprobe, struct pt_regs *regs)
|
|||
if (regs->psw.addr - utask->xol_vaddr == ilen)
|
||||
regs->psw.addr = utask->vaddr + ilen;
|
||||
}
|
||||
/* If per tracing was active generate trap */
|
||||
if (regs->psw.mask & PSW_MASK_PER)
|
||||
do_per_trap(regs);
|
||||
if (check_per_event(current->thread.per_event.cause,
|
||||
current->thread.per_user.control, regs)) {
|
||||
/* fix per address */
|
||||
current->thread.per_event.address = utask->vaddr;
|
||||
/* trigger per event */
|
||||
set_pt_regs_flag(regs, PIF_PER_TRAP);
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
@ -106,6 +134,7 @@ void arch_uprobe_abort_xol(struct arch_uprobe *auprobe, struct pt_regs *regs)
|
|||
clear_thread_flag(TIF_UPROBE_SINGLESTEP);
|
||||
regs->int_code = auprobe->saved_int_code;
|
||||
regs->psw.addr = current->utask->vaddr;
|
||||
current->thread.per_event.address = current->utask->vaddr;
|
||||
}
|
||||
|
||||
unsigned long arch_uretprobe_hijack_return_addr(unsigned long trampoline,
|
||||
|
|
@ -146,17 +175,20 @@ static void adjust_psw_addr(psw_t *psw, unsigned long len)
|
|||
__rc; \
|
||||
})
|
||||
|
||||
#define emu_store_ril(ptr, input) \
|
||||
#define emu_store_ril(regs, ptr, input) \
|
||||
({ \
|
||||
unsigned int mask = sizeof(*(ptr)) - 1; \
|
||||
__typeof__(ptr) __ptr = (ptr); \
|
||||
int __rc = 0; \
|
||||
\
|
||||
if (!test_facility(34)) \
|
||||
__rc = EMU_ILLEGAL_OP; \
|
||||
else if ((u64 __force)ptr & mask) \
|
||||
else if ((u64 __force)__ptr & mask) \
|
||||
__rc = EMU_SPECIFICATION; \
|
||||
else if (put_user(*(input), ptr)) \
|
||||
else if (put_user(*(input), __ptr)) \
|
||||
__rc = EMU_ADDRESSING; \
|
||||
if (__rc == 0) \
|
||||
sim_stor_event(regs, __ptr, mask + 1); \
|
||||
__rc; \
|
||||
})
|
||||
|
||||
|
|
@ -197,6 +229,25 @@ union split_register {
|
|||
s16 s16[4];
|
||||
};
|
||||
|
||||
/*
|
||||
* If user per registers are setup to trace storage alterations and an
|
||||
* emulated store took place on a fitting address a user trap is generated.
|
||||
*/
|
||||
static void sim_stor_event(struct pt_regs *regs, void *addr, int len)
|
||||
{
|
||||
if (!(regs->psw.mask & PSW_MASK_PER))
|
||||
return;
|
||||
if (!(current->thread.per_user.control & PER_EVENT_STORE))
|
||||
return;
|
||||
if ((void *)current->thread.per_user.start > (addr + len))
|
||||
return;
|
||||
if ((void *)current->thread.per_user.end < addr)
|
||||
return;
|
||||
current->thread.per_event.address = regs->psw.addr;
|
||||
current->thread.per_event.cause = PER_EVENT_STORE >> 16;
|
||||
set_pt_regs_flag(regs, PIF_PER_TRAP);
|
||||
}
|
||||
|
||||
/*
|
||||
* pc relative instructions are emulated, since parameters may not be
|
||||
* accessible from the xol area due to range limitations.
|
||||
|
|
@ -249,13 +300,13 @@ static void handle_insn_ril(struct arch_uprobe *auprobe, struct pt_regs *regs)
|
|||
rc = emu_load_ril((u32 __user *)uptr, &rx->u64);
|
||||
break;
|
||||
case 0x07: /* sthrl */
|
||||
rc = emu_store_ril((u16 __user *)uptr, &rx->u16[3]);
|
||||
rc = emu_store_ril(regs, (u16 __user *)uptr, &rx->u16[3]);
|
||||
break;
|
||||
case 0x0b: /* stgrl */
|
||||
rc = emu_store_ril((u64 __user *)uptr, &rx->u64);
|
||||
rc = emu_store_ril(regs, (u64 __user *)uptr, &rx->u64);
|
||||
break;
|
||||
case 0x0f: /* strl */
|
||||
rc = emu_store_ril((u32 __user *)uptr, &rx->u32[1]);
|
||||
rc = emu_store_ril(regs, (u32 __user *)uptr, &rx->u32[1]);
|
||||
break;
|
||||
}
|
||||
break;
|
||||
|
|
|
|||
|
|
@ -128,8 +128,6 @@ void vtime_account_irq_enter(struct task_struct *tsk)
|
|||
struct thread_info *ti = task_thread_info(tsk);
|
||||
u64 timer, system;
|
||||
|
||||
WARN_ON_ONCE(!irqs_disabled());
|
||||
|
||||
timer = S390_lowcore.last_update_timer;
|
||||
S390_lowcore.last_update_timer = get_vtimer();
|
||||
S390_lowcore.system_timer += timer - S390_lowcore.last_update_timer;
|
||||
|
|
|
|||
|
|
@ -322,11 +322,12 @@ static int gmap_alloc_table(struct gmap *gmap, unsigned long *table,
|
|||
static unsigned long __gmap_segment_gaddr(unsigned long *entry)
|
||||
{
|
||||
struct page *page;
|
||||
unsigned long offset;
|
||||
unsigned long offset, mask;
|
||||
|
||||
offset = (unsigned long) entry / sizeof(unsigned long);
|
||||
offset = (offset & (PTRS_PER_PMD - 1)) * PMD_SIZE;
|
||||
page = pmd_to_page((pmd_t *) entry);
|
||||
mask = ~(PTRS_PER_PMD * sizeof(pmd_t) - 1);
|
||||
page = virt_to_page((void *)((unsigned long) entry & mask));
|
||||
return page->index + offset;
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -431,8 +431,8 @@ static int bpf_jit_insn(struct bpf_jit *jit, struct sock_filter *filter,
|
|||
EMIT4_DISP(0x88500000, K);
|
||||
break;
|
||||
case BPF_ALU | BPF_NEG: /* A = -A */
|
||||
/* lnr %r5,%r5 */
|
||||
EMIT2(0x1155);
|
||||
/* lcr %r5,%r5 */
|
||||
EMIT2(0x1355);
|
||||
break;
|
||||
case BPF_JMP | BPF_JA: /* ip += K */
|
||||
offset = addrs[i + K] + jit->start - jit->prg;
|
||||
|
|
@ -502,8 +502,8 @@ branch: if (filter->jt == filter->jf) {
|
|||
xbranch: /* Emit compare if the branch targets are different */
|
||||
if (filter->jt != filter->jf) {
|
||||
jit->seen |= SEEN_XREG;
|
||||
/* cr %r5,%r12 */
|
||||
EMIT2(0x195c);
|
||||
/* clr %r5,%r12 */
|
||||
EMIT2(0x155c);
|
||||
}
|
||||
goto branch;
|
||||
case BPF_JMP | BPF_JSET | BPF_X: /* ip += (A & X) ? jt : jf */
|
||||
|
|
|
|||
|
|
@ -3,6 +3,7 @@ config UML
|
|||
default y
|
||||
select HAVE_ARCH_AUDITSYSCALL
|
||||
select HAVE_UID16
|
||||
select HAVE_FUTEX_CMPXCHG if FUTEX
|
||||
select GENERIC_IRQ_SHOW
|
||||
select GENERIC_CPU_DEVICES
|
||||
select GENERIC_IO
|
||||
|
|
|
|||
|
|
@ -51,6 +51,7 @@ targets += cpustr.h
|
|||
$(obj)/cpustr.h: $(obj)/mkcpustr FORCE
|
||||
$(call if_changed,cpustr)
|
||||
endif
|
||||
clean-files += cpustr.h
|
||||
|
||||
# ---------------------------------------------------------------------------
|
||||
|
||||
|
|
|
|||
|
|
@ -26,7 +26,6 @@ obj-$(CONFIG_CRYPTO_GHASH_CLMUL_NI_INTEL) += ghash-clmulni-intel.o
|
|||
|
||||
obj-$(CONFIG_CRYPTO_CRC32C_INTEL) += crc32c-intel.o
|
||||
obj-$(CONFIG_CRYPTO_SHA1_SSSE3) += sha1-ssse3.o
|
||||
obj-$(CONFIG_CRYPTO_SHA1_MB) += sha-mb/
|
||||
obj-$(CONFIG_CRYPTO_CRC32_PCLMUL) += crc32-pclmul.o
|
||||
obj-$(CONFIG_CRYPTO_SHA256_SSSE3) += sha256-ssse3.o
|
||||
obj-$(CONFIG_CRYPTO_SHA512_SSSE3) += sha512-ssse3.o
|
||||
|
|
@ -46,6 +45,7 @@ endif
|
|||
ifeq ($(avx2_supported),yes)
|
||||
obj-$(CONFIG_CRYPTO_CAMELLIA_AESNI_AVX2_X86_64) += camellia-aesni-avx2.o
|
||||
obj-$(CONFIG_CRYPTO_SERPENT_AVX2_X86_64) += serpent-avx2.o
|
||||
obj-$(CONFIG_CRYPTO_SHA1_MB) += sha-mb/
|
||||
endif
|
||||
|
||||
aes-i586-y := aes-i586-asm_32.o aes_glue.o
|
||||
|
|
|
|||
|
|
@ -208,7 +208,7 @@ ddq_add_8:
|
|||
|
||||
.if (klen == KEY_128)
|
||||
.if (load_keys)
|
||||
vmovdqa 3*16(p_keys), xkeyA
|
||||
vmovdqa 3*16(p_keys), xkey4
|
||||
.endif
|
||||
.else
|
||||
vmovdqa 3*16(p_keys), xkeyA
|
||||
|
|
@ -224,7 +224,7 @@ ddq_add_8:
|
|||
add $(16*by), p_in
|
||||
|
||||
.if (klen == KEY_128)
|
||||
vmovdqa 4*16(p_keys), xkey4
|
||||
vmovdqa 4*16(p_keys), xkeyB
|
||||
.else
|
||||
.if (load_keys)
|
||||
vmovdqa 4*16(p_keys), xkey4
|
||||
|
|
@ -234,7 +234,12 @@ ddq_add_8:
|
|||
.set i, 0
|
||||
.rept by
|
||||
club XDATA, i
|
||||
vaesenc xkeyA, var_xdata, var_xdata /* key 3 */
|
||||
/* key 3 */
|
||||
.if (klen == KEY_128)
|
||||
vaesenc xkey4, var_xdata, var_xdata
|
||||
.else
|
||||
vaesenc xkeyA, var_xdata, var_xdata
|
||||
.endif
|
||||
.set i, (i +1)
|
||||
.endr
|
||||
|
||||
|
|
@ -243,13 +248,18 @@ ddq_add_8:
|
|||
.set i, 0
|
||||
.rept by
|
||||
club XDATA, i
|
||||
vaesenc xkey4, var_xdata, var_xdata /* key 4 */
|
||||
/* key 4 */
|
||||
.if (klen == KEY_128)
|
||||
vaesenc xkeyB, var_xdata, var_xdata
|
||||
.else
|
||||
vaesenc xkey4, var_xdata, var_xdata
|
||||
.endif
|
||||
.set i, (i +1)
|
||||
.endr
|
||||
|
||||
.if (klen == KEY_128)
|
||||
.if (load_keys)
|
||||
vmovdqa 6*16(p_keys), xkeyB
|
||||
vmovdqa 6*16(p_keys), xkey8
|
||||
.endif
|
||||
.else
|
||||
vmovdqa 6*16(p_keys), xkeyB
|
||||
|
|
@ -267,12 +277,17 @@ ddq_add_8:
|
|||
.set i, 0
|
||||
.rept by
|
||||
club XDATA, i
|
||||
vaesenc xkeyB, var_xdata, var_xdata /* key 6 */
|
||||
/* key 6 */
|
||||
.if (klen == KEY_128)
|
||||
vaesenc xkey8, var_xdata, var_xdata
|
||||
.else
|
||||
vaesenc xkeyB, var_xdata, var_xdata
|
||||
.endif
|
||||
.set i, (i +1)
|
||||
.endr
|
||||
|
||||
.if (klen == KEY_128)
|
||||
vmovdqa 8*16(p_keys), xkey8
|
||||
vmovdqa 8*16(p_keys), xkeyB
|
||||
.else
|
||||
.if (load_keys)
|
||||
vmovdqa 8*16(p_keys), xkey8
|
||||
|
|
@ -288,7 +303,7 @@ ddq_add_8:
|
|||
|
||||
.if (klen == KEY_128)
|
||||
.if (load_keys)
|
||||
vmovdqa 9*16(p_keys), xkeyA
|
||||
vmovdqa 9*16(p_keys), xkey12
|
||||
.endif
|
||||
.else
|
||||
vmovdqa 9*16(p_keys), xkeyA
|
||||
|
|
@ -297,7 +312,12 @@ ddq_add_8:
|
|||
.set i, 0
|
||||
.rept by
|
||||
club XDATA, i
|
||||
vaesenc xkey8, var_xdata, var_xdata /* key 8 */
|
||||
/* key 8 */
|
||||
.if (klen == KEY_128)
|
||||
vaesenc xkeyB, var_xdata, var_xdata
|
||||
.else
|
||||
vaesenc xkey8, var_xdata, var_xdata
|
||||
.endif
|
||||
.set i, (i +1)
|
||||
.endr
|
||||
|
||||
|
|
@ -306,7 +326,12 @@ ddq_add_8:
|
|||
.set i, 0
|
||||
.rept by
|
||||
club XDATA, i
|
||||
vaesenc xkeyA, var_xdata, var_xdata /* key 9 */
|
||||
/* key 9 */
|
||||
.if (klen == KEY_128)
|
||||
vaesenc xkey12, var_xdata, var_xdata
|
||||
.else
|
||||
vaesenc xkeyA, var_xdata, var_xdata
|
||||
.endif
|
||||
.set i, (i +1)
|
||||
.endr
|
||||
|
||||
|
|
@ -412,7 +437,6 @@ ddq_add_8:
|
|||
/* main body of aes ctr load */
|
||||
|
||||
.macro do_aes_ctrmain key_len
|
||||
|
||||
cmp $16, num_bytes
|
||||
jb .Ldo_return2\key_len
|
||||
|
||||
|
|
|
|||
|
|
@ -80,9 +80,11 @@ static inline unsigned int __getcpu(void)
|
|||
|
||||
/*
|
||||
* Load per CPU data from GDT. LSL is faster than RDTSCP and
|
||||
* works on all CPUs.
|
||||
* works on all CPUs. This is volatile so that it orders
|
||||
* correctly wrt barrier() and to keep gcc from cleverly
|
||||
* hoisting it out of the calling function.
|
||||
*/
|
||||
asm("lsl %1,%0" : "=r" (p) : "r" (__PER_CPU_SEG));
|
||||
asm volatile ("lsl %1,%0" : "=r" (p) : "r" (__PER_CPU_SEG));
|
||||
|
||||
return p;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -750,13 +750,13 @@ static int _acpi_map_lsapic(acpi_handle handle, int physid, int *pcpu)
|
|||
}
|
||||
|
||||
/* wrapper to silence section mismatch warning */
|
||||
int __ref acpi_map_lsapic(acpi_handle handle, int physid, int *pcpu)
|
||||
int __ref acpi_map_cpu(acpi_handle handle, int physid, int *pcpu)
|
||||
{
|
||||
return _acpi_map_lsapic(handle, physid, pcpu);
|
||||
}
|
||||
EXPORT_SYMBOL(acpi_map_lsapic);
|
||||
EXPORT_SYMBOL(acpi_map_cpu);
|
||||
|
||||
int acpi_unmap_lsapic(int cpu)
|
||||
int acpi_unmap_cpu(int cpu)
|
||||
{
|
||||
#ifdef CONFIG_ACPI_NUMA
|
||||
set_apicid_to_node(per_cpu(x86_cpu_to_apicid, cpu), NUMA_NO_NODE);
|
||||
|
|
@ -768,8 +768,7 @@ int acpi_unmap_lsapic(int cpu)
|
|||
|
||||
return (0);
|
||||
}
|
||||
|
||||
EXPORT_SYMBOL(acpi_unmap_lsapic);
|
||||
EXPORT_SYMBOL(acpi_unmap_cpu);
|
||||
#endif /* CONFIG_ACPI_HOTPLUG_CPU */
|
||||
|
||||
int acpi_register_ioapic(acpi_handle handle, u64 phys_addr, u32 gsi_base)
|
||||
|
|
|
|||
Some files were not shown because too many files have changed in this diff Show More
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Reference in New Issue