powerpc/powernv: Use pci_dn, not device_node, in PCI config accessor
The PCI config accessors previously relied on device_node. Unfortunately, VFs don't have a corresponding device_node, so change the accessors to use pci_dn instead. [bhelgaas: changelog] Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
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@ -1038,21 +1038,31 @@ static inline bool pnv_eeh_cfg_blocked(struct device_node *dn)
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static int pnv_eeh_read_config(struct device_node *dn,
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int where, int size, u32 *val)
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{
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struct pci_dn *pdn = PCI_DN(dn);
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if (!pdn)
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return PCIBIOS_DEVICE_NOT_FOUND;
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if (pnv_eeh_cfg_blocked(dn)) {
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*val = 0xFFFFFFFF;
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return PCIBIOS_SET_FAILED;
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}
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return pnv_pci_cfg_read(dn, where, size, val);
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return pnv_pci_cfg_read(pdn, where, size, val);
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}
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static int pnv_eeh_write_config(struct device_node *dn,
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int where, int size, u32 val)
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{
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struct pci_dn *pdn = PCI_DN(dn);
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if (!pdn)
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return PCIBIOS_DEVICE_NOT_FOUND;
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if (pnv_eeh_cfg_blocked(dn))
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return PCIBIOS_SET_FAILED;
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return pnv_pci_cfg_write(dn, where, size, val);
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return pnv_pci_cfg_write(pdn, where, size, val);
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}
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static void pnv_eeh_dump_hub_diag_common(struct OpalIoP7IOCErrorData *data)
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@ -366,9 +366,9 @@ static void pnv_pci_handle_eeh_config(struct pnv_phb *phb, u32 pe_no)
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spin_unlock_irqrestore(&phb->lock, flags);
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}
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static void pnv_pci_config_check_eeh(struct pnv_phb *phb,
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struct device_node *dn)
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static void pnv_pci_config_check_eeh(struct pci_dn *pdn)
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{
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struct pnv_phb *phb = pdn->phb->private_data;
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u8 fstate;
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__be16 pcierr;
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int pe_no;
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@ -379,7 +379,7 @@ static void pnv_pci_config_check_eeh(struct pnv_phb *phb,
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* setup that yet. So all ER errors should be mapped to
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* reserved PE.
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*/
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pe_no = PCI_DN(dn)->pe_number;
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pe_no = pdn->pe_number;
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if (pe_no == IODA_INVALID_PE) {
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if (phb->type == PNV_PHB_P5IOC2)
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pe_no = 0;
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@ -407,8 +407,7 @@ static void pnv_pci_config_check_eeh(struct pnv_phb *phb,
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}
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cfg_dbg(" -> EEH check, bdfn=%04x PE#%d fstate=%x\n",
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(PCI_DN(dn)->busno << 8) | (PCI_DN(dn)->devfn),
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pe_no, fstate);
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(pdn->busno << 8) | (pdn->devfn), pe_no, fstate);
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/* Clear the frozen state if applicable */
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if (fstate == OPAL_EEH_STOPPED_MMIO_FREEZE ||
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@ -425,10 +424,9 @@ static void pnv_pci_config_check_eeh(struct pnv_phb *phb,
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}
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}
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int pnv_pci_cfg_read(struct device_node *dn,
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int pnv_pci_cfg_read(struct pci_dn *pdn,
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int where, int size, u32 *val)
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{
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struct pci_dn *pdn = PCI_DN(dn);
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struct pnv_phb *phb = pdn->phb->private_data;
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u32 bdfn = (pdn->busno << 8) | pdn->devfn;
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s64 rc;
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@ -462,10 +460,9 @@ int pnv_pci_cfg_read(struct device_node *dn,
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return PCIBIOS_SUCCESSFUL;
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}
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int pnv_pci_cfg_write(struct device_node *dn,
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int pnv_pci_cfg_write(struct pci_dn *pdn,
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int where, int size, u32 val)
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{
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struct pci_dn *pdn = PCI_DN(dn);
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struct pnv_phb *phb = pdn->phb->private_data;
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u32 bdfn = (pdn->busno << 8) | pdn->devfn;
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@ -489,18 +486,17 @@ int pnv_pci_cfg_write(struct device_node *dn,
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}
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#if CONFIG_EEH
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static bool pnv_pci_cfg_check(struct pci_controller *hose,
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struct device_node *dn)
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static bool pnv_pci_cfg_check(struct pci_dn *pdn)
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{
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struct eeh_dev *edev = NULL;
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struct pnv_phb *phb = hose->private_data;
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struct pnv_phb *phb = pdn->phb->private_data;
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/* EEH not enabled ? */
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if (!(phb->flags & PNV_PHB_FLAG_EEH))
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return true;
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/* PE reset or device removed ? */
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edev = of_node_to_eeh_dev(dn);
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edev = pdn->edev;
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if (edev) {
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if (edev->pe &&
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(edev->pe->state & EEH_PE_CFG_BLOCKED))
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@ -513,8 +509,7 @@ static bool pnv_pci_cfg_check(struct pci_controller *hose,
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return true;
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}
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#else
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static inline pnv_pci_cfg_check(struct pci_controller *hose,
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struct device_node *dn)
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static inline pnv_pci_cfg_check(struct pci_dn *pdn)
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{
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return true;
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}
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@ -524,32 +519,26 @@ static int pnv_pci_read_config(struct pci_bus *bus,
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unsigned int devfn,
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int where, int size, u32 *val)
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{
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struct device_node *dn, *busdn = pci_bus_to_OF_node(bus);
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struct pci_dn *pdn;
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struct pnv_phb *phb;
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bool found = false;
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int ret;
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*val = 0xFFFFFFFF;
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for (dn = busdn->child; dn; dn = dn->sibling) {
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pdn = PCI_DN(dn);
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if (pdn && pdn->devfn == devfn) {
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phb = pdn->phb->private_data;
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found = true;
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break;
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}
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}
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if (!found || !pnv_pci_cfg_check(pdn->phb, dn))
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pdn = pci_get_pdn_by_devfn(bus, devfn);
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if (!pdn)
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return PCIBIOS_DEVICE_NOT_FOUND;
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ret = pnv_pci_cfg_read(dn, where, size, val);
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if (phb->flags & PNV_PHB_FLAG_EEH) {
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if (!pnv_pci_cfg_check(pdn))
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return PCIBIOS_DEVICE_NOT_FOUND;
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ret = pnv_pci_cfg_read(pdn, where, size, val);
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phb = pdn->phb->private_data;
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if (phb->flags & PNV_PHB_FLAG_EEH && pdn->edev) {
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if (*val == EEH_IO_ERROR_VALUE(size) &&
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eeh_dev_check_failure(of_node_to_eeh_dev(dn)))
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eeh_dev_check_failure(pdn->edev))
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return PCIBIOS_DEVICE_NOT_FOUND;
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} else {
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pnv_pci_config_check_eeh(phb, dn);
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pnv_pci_config_check_eeh(pdn);
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}
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return ret;
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@ -559,27 +548,21 @@ static int pnv_pci_write_config(struct pci_bus *bus,
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unsigned int devfn,
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int where, int size, u32 val)
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{
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struct device_node *dn, *busdn = pci_bus_to_OF_node(bus);
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struct pci_dn *pdn;
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struct pnv_phb *phb;
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bool found = false;
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int ret;
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for (dn = busdn->child; dn; dn = dn->sibling) {
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pdn = PCI_DN(dn);
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if (pdn && pdn->devfn == devfn) {
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phb = pdn->phb->private_data;
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found = true;
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break;
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}
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}
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if (!found || !pnv_pci_cfg_check(pdn->phb, dn))
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pdn = pci_get_pdn_by_devfn(bus, devfn);
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if (!pdn)
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return PCIBIOS_DEVICE_NOT_FOUND;
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ret = pnv_pci_cfg_write(dn, where, size, val);
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if (!pnv_pci_cfg_check(pdn))
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return PCIBIOS_DEVICE_NOT_FOUND;
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ret = pnv_pci_cfg_write(pdn, where, size, val);
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phb = pdn->phb->private_data;
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if (!(phb->flags & PNV_PHB_FLAG_EEH))
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pnv_pci_config_check_eeh(phb, dn);
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pnv_pci_config_check_eeh(pdn);
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return ret;
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}
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@ -196,9 +196,9 @@ extern struct pci_ops pnv_pci_ops;
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void pnv_pci_dump_phb_diag_data(struct pci_controller *hose,
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unsigned char *log_buff);
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int pnv_pci_cfg_read(struct device_node *dn,
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int pnv_pci_cfg_read(struct pci_dn *pdn,
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int where, int size, u32 *val);
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int pnv_pci_cfg_write(struct device_node *dn,
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int pnv_pci_cfg_write(struct pci_dn *pdn,
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int where, int size, u32 val);
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extern void pnv_pci_setup_iommu_table(struct iommu_table *tbl,
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void *tce_mem, u64 tce_size,
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