x86/resctrl: Rename the RDT functions and definitions
As AMD is starting to support RESCTRL features, rename the RDT functions and definitions to more generic names. Replace "intel_rdt" with "resctrl" where applicable. Signed-off-by: Babu Moger <babu.moger@amd.com> Signed-off-by: Borislav Petkov <bp@suse.de> Reviewed-by: Borislav Petkov <bp@suse.de> Cc: Andrew Morton <akpm@linux-foundation.org> Cc: Andy Lutomirski <luto@kernel.org> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Brijesh Singh <brijesh.singh@amd.com> Cc: "Chang S. Bae" <chang.seok.bae@intel.com> Cc: David Miller <davem@davemloft.net> Cc: David Woodhouse <dwmw2@infradead.org> Cc: Dmitry Safonov <dima@arista.com> Cc: Fenghua Yu <fenghua.yu@intel.com> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: "H. Peter Anvin" <hpa@zytor.com> Cc: Ingo Molnar <mingo@redhat.com> Cc: Jann Horn <jannh@google.com> Cc: Joerg Roedel <jroedel@suse.de> Cc: Jonathan Corbet <corbet@lwn.net> Cc: Josh Poimboeuf <jpoimboe@redhat.com> Cc: Kate Stewart <kstewart@linuxfoundation.org> Cc: "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com> Cc: <linux-doc@vger.kernel.org> Cc: Mauro Carvalho Chehab <mchehab+samsung@kernel.org> Cc: Paolo Bonzini <pbonzini@redhat.com> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Philippe Ombredanne <pombredanne@nexb.com> Cc: Pu Wen <puwen@hygon.cn> Cc: <qianyue.zj@alibaba-inc.com> Cc: "Rafael J. Wysocki" <rafael@kernel.org> Cc: Reinette Chatre <reinette.chatre@intel.com> Cc: Rian Hunter <rian@alum.mit.edu> Cc: Sherry Hurwitz <sherry.hurwitz@amd.com> Cc: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Thomas Lendacky <Thomas.Lendacky@amd.com> Cc: Tony Luck <tony.luck@intel.com> Cc: Vitaly Kuznetsov <vkuznets@redhat.com> Cc: <xiaochen.shen@intel.com> Link: https://lkml.kernel.org/r/20181121202811.4492-3-babu.moger@amd.com
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fa7d949337
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352940ecec
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@ -1,6 +1,6 @@
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/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef _ASM_X86_INTEL_RDT_SCHED_H
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#define _ASM_X86_INTEL_RDT_SCHED_H
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#ifndef _ASM_X86_RESCTRL_SCHED_H
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#define _ASM_X86_RESCTRL_SCHED_H
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#ifdef CONFIG_INTEL_RDT
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@ -10,7 +10,7 @@
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#define IA32_PQR_ASSOC 0x0c8f
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/**
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* struct intel_pqr_state - State cache for the PQR MSR
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* struct resctrl_pqr_state - State cache for the PQR MSR
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* @cur_rmid: The cached Resource Monitoring ID
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* @cur_closid: The cached Class Of Service ID
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* @default_rmid: The user assigned Resource Monitoring ID
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@ -24,21 +24,21 @@
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* The cache also helps to avoid pointless updates if the value does
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* not change.
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*/
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struct intel_pqr_state {
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struct resctrl_pqr_state {
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u32 cur_rmid;
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u32 cur_closid;
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u32 default_rmid;
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u32 default_closid;
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};
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DECLARE_PER_CPU(struct intel_pqr_state, pqr_state);
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DECLARE_PER_CPU(struct resctrl_pqr_state, pqr_state);
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DECLARE_STATIC_KEY_FALSE(rdt_enable_key);
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DECLARE_STATIC_KEY_FALSE(rdt_alloc_enable_key);
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DECLARE_STATIC_KEY_FALSE(rdt_mon_enable_key);
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/*
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* __intel_rdt_sched_in() - Writes the task's CLOSid/RMID to IA32_PQR_MSR
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* __resctrl_sched_in() - Writes the task's CLOSid/RMID to IA32_PQR_MSR
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*
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* Following considerations are made so that this has minimal impact
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* on scheduler hot path:
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@ -51,9 +51,9 @@ DECLARE_STATIC_KEY_FALSE(rdt_mon_enable_key);
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* simple as possible.
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* Must be called with preemption disabled.
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*/
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static void __intel_rdt_sched_in(void)
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static void __resctrl_sched_in(void)
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{
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struct intel_pqr_state *state = this_cpu_ptr(&pqr_state);
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struct resctrl_pqr_state *state = this_cpu_ptr(&pqr_state);
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u32 closid = state->default_closid;
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u32 rmid = state->default_rmid;
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@ -78,16 +78,16 @@ static void __intel_rdt_sched_in(void)
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}
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}
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static inline void intel_rdt_sched_in(void)
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static inline void resctrl_sched_in(void)
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{
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if (static_branch_likely(&rdt_enable_key))
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__intel_rdt_sched_in();
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__resctrl_sched_in();
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}
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#else
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static inline void intel_rdt_sched_in(void) {}
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static inline void resctrl_sched_in(void) {}
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#endif /* CONFIG_INTEL_RDT */
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#endif /* _ASM_X86_INTEL_RDT_SCHED_H */
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#endif /* _ASM_X86_RESCTRL_SCHED_H */
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@ -22,7 +22,7 @@
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* Software Developer Manual June 2016, volume 3, section 17.17.
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*/
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#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
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#define pr_fmt(fmt) "resctrl: " fmt
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#include <linux/slab.h>
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#include <linux/err.h>
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@ -40,12 +40,12 @@
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DEFINE_MUTEX(rdtgroup_mutex);
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/*
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* The cached intel_pqr_state is strictly per CPU and can never be
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* The cached resctrl_pqr_state is strictly per CPU and can never be
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* updated from a remote CPU. Functions which modify the state
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* are called with interrupts disabled and no preemption, which
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* is sufficient for the protection.
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*/
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DEFINE_PER_CPU(struct intel_pqr_state, pqr_state);
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DEFINE_PER_CPU(struct resctrl_pqr_state, pqr_state);
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/*
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* Used to store the max resource name width and max resource data width
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@ -639,7 +639,7 @@ static void domain_remove_cpu(int cpu, struct rdt_resource *r)
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static void clear_closid_rmid(int cpu)
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{
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struct intel_pqr_state *state = this_cpu_ptr(&pqr_state);
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struct resctrl_pqr_state *state = this_cpu_ptr(&pqr_state);
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state->default_closid = 0;
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state->default_rmid = 0;
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@ -648,7 +648,7 @@ static void clear_closid_rmid(int cpu)
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wrmsr(IA32_PQR_ASSOC, 0, 0);
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}
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static int intel_rdt_online_cpu(unsigned int cpu)
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static int resctrl_online_cpu(unsigned int cpu)
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{
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struct rdt_resource *r;
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@ -674,7 +674,7 @@ static void clear_childcpus(struct rdtgroup *r, unsigned int cpu)
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}
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}
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static int intel_rdt_offline_cpu(unsigned int cpu)
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static int resctrl_offline_cpu(unsigned int cpu)
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{
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struct rdtgroup *rdtgrp;
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struct rdt_resource *r;
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@ -866,7 +866,7 @@ static __init bool get_rdt_resources(void)
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static enum cpuhp_state rdt_online;
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static int __init intel_rdt_late_init(void)
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static int __init resctrl_late_init(void)
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{
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struct rdt_resource *r;
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int state, ret;
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@ -877,8 +877,8 @@ static int __init intel_rdt_late_init(void)
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rdt_init_padding();
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state = cpuhp_setup_state(CPUHP_AP_ONLINE_DYN,
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"x86/rdt/cat:online:",
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intel_rdt_online_cpu, intel_rdt_offline_cpu);
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"x86/resctrl/cat:online:",
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resctrl_online_cpu, resctrl_offline_cpu);
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if (state < 0)
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return state;
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@ -890,20 +890,20 @@ static int __init intel_rdt_late_init(void)
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rdt_online = state;
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for_each_alloc_capable_rdt_resource(r)
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pr_info("Intel RDT %s allocation detected\n", r->name);
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pr_info("%s allocation detected\n", r->name);
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for_each_mon_capable_rdt_resource(r)
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pr_info("Intel RDT %s monitoring detected\n", r->name);
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pr_info("%s monitoring detected\n", r->name);
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return 0;
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}
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late_initcall(intel_rdt_late_init);
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late_initcall(resctrl_late_init);
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static void __exit intel_rdt_exit(void)
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static void __exit resctrl_exit(void)
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{
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cpuhp_remove_state(rdt_online);
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rdtgroup_exit();
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}
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__exitcall(intel_rdt_exit);
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__exitcall(resctrl_exit);
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@ -69,7 +69,7 @@ struct rmid_read {
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u64 val;
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};
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extern unsigned int intel_cqm_threshold;
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extern unsigned int resctrl_cqm_threshold;
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extern bool rdt_alloc_capable;
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extern bool rdt_mon_capable;
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extern unsigned int rdt_mon_features;
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@ -73,7 +73,7 @@ unsigned int rdt_mon_features;
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* This is the threshold cache occupancy at which we will consider an
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* RMID available for re-allocation.
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*/
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unsigned int intel_cqm_threshold;
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unsigned int resctrl_cqm_threshold;
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static inline struct rmid_entry *__rmid_entry(u32 rmid)
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{
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@ -107,7 +107,7 @@ static bool rmid_dirty(struct rmid_entry *entry)
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{
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u64 val = __rmid_read(entry->rmid, QOS_L3_OCCUP_EVENT_ID);
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return val >= intel_cqm_threshold;
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return val >= resctrl_cqm_threshold;
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}
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/*
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@ -187,7 +187,7 @@ static void add_rmid_to_limbo(struct rmid_entry *entry)
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list_for_each_entry(d, &r->domains, list) {
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if (cpumask_test_cpu(cpu, &d->cpu_mask)) {
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val = __rmid_read(entry->rmid, QOS_L3_OCCUP_EVENT_ID);
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if (val <= intel_cqm_threshold)
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if (val <= resctrl_cqm_threshold)
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continue;
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}
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@ -625,6 +625,7 @@ static void l3_mon_evt_init(struct rdt_resource *r)
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int rdt_get_mon_l3_config(struct rdt_resource *r)
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{
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unsigned int cl_size = boot_cpu_data.x86_cache_size;
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int ret;
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r->mon_scale = boot_cpu_data.x86_cache_occ_scale;
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@ -637,10 +638,10 @@ int rdt_get_mon_l3_config(struct rdt_resource *r)
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*
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* For a 35MB LLC and 56 RMIDs, this is ~1.8% of the LLC.
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*/
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intel_cqm_threshold = boot_cpu_data.x86_cache_size * 1024 / r->num_rmid;
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resctrl_cqm_threshold = cl_size * 1024 / r->num_rmid;
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/* h/w works in units of "boot_cpu_data.x86_cache_occ_scale" */
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intel_cqm_threshold /= r->mon_scale;
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resctrl_cqm_threshold /= r->mon_scale;
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ret = dom_data_init(r);
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if (ret)
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@ -298,7 +298,7 @@ static int rdtgroup_cpus_show(struct kernfs_open_file *of,
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}
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/*
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* This is safe against intel_rdt_sched_in() called from __switch_to()
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* This is safe against resctrl_sched_in() called from __switch_to()
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* because __switch_to() is executed with interrupts disabled. A local call
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* from update_closid_rmid() is proteced against __switch_to() because
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* preemption is disabled.
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* executing task might have its own closid selected. Just reuse
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* the context switch code.
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*/
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intel_rdt_sched_in();
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resctrl_sched_in();
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}
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/*
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@ -542,7 +542,7 @@ static void move_myself(struct callback_head *head)
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preempt_disable();
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/* update PQR_ASSOC MSR to make resource group go into effect */
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intel_rdt_sched_in();
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resctrl_sched_in();
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preempt_enable();
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kfree(callback);
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@ -926,7 +926,7 @@ static int max_threshold_occ_show(struct kernfs_open_file *of,
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{
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struct rdt_resource *r = of->kn->parent->priv;
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seq_printf(seq, "%u\n", intel_cqm_threshold * r->mon_scale);
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seq_printf(seq, "%u\n", resctrl_cqm_threshold * r->mon_scale);
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return 0;
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}
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@ -945,7 +945,7 @@ static ssize_t max_threshold_occ_write(struct kernfs_open_file *of,
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if (bytes > (boot_cpu_data.x86_cache_size * 1024))
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return -EINVAL;
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intel_cqm_threshold = bytes / r->mon_scale;
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resctrl_cqm_threshold = bytes / r->mon_scale;
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return nbytes;
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}
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@ -302,7 +302,7 @@ __switch_to(struct task_struct *prev_p, struct task_struct *next_p)
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this_cpu_write(current_task, next_p);
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/* Load the Intel cache allocation PQR MSR. */
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intel_rdt_sched_in();
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resctrl_sched_in();
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return prev_p;
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}
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@ -664,7 +664,7 @@ __switch_to(struct task_struct *prev_p, struct task_struct *next_p)
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}
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/* Load the Intel cache allocation PQR MSR. */
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intel_rdt_sched_in();
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resctrl_sched_in();
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return prev_p;
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}
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