i40e/i40evf: AdminQ updates ww36
Several little tweaks to keep FW, SV, and SW in line together - Remove the unused and deprecated i40e_aqc_opc_debug_modify_internals - Add define for iSCSI capability - Fix queue mask size - Adjust i40e_aqc_oem_param_change for ease-of-use Change-ID: I51f250b367912968a7cec61b3a68110d9796e914 Signed-off-by: Shannon Nelson <shannon.nelson@intel.com> Signed-off-by: Kamil Kacperski <kamil.kacperski@intel.com> Acked-by: Greg Rose <gregory.v.rose@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
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@ -276,7 +276,6 @@ enum i40e_admin_queue_opc {
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i40e_aqc_opc_debug_write_reg = 0xFF04,
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i40e_aqc_opc_debug_modify_reg = 0xFF07,
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i40e_aqc_opc_debug_dump_internals = 0xFF08,
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i40e_aqc_opc_debug_modify_internals = 0xFF09,
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};
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/* command structures and indirect data structures */
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@ -410,6 +409,7 @@ struct i40e_aqc_list_capabilities_element_resp {
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#define I40E_AQ_CAP_ID_VSI 0x0017
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#define I40E_AQ_CAP_ID_DCB 0x0018
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#define I40E_AQ_CAP_ID_FCOE 0x0021
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#define I40E_AQ_CAP_ID_ISCSI 0x0022
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#define I40E_AQ_CAP_ID_RSS 0x0040
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#define I40E_AQ_CAP_ID_RXQ 0x0041
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#define I40E_AQ_CAP_ID_TXQ 0x0042
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@ -1207,7 +1207,7 @@ struct i40e_aqc_add_remove_cloud_filters_element_data {
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} ipaddr;
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__le16 flags;
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#define I40E_AQC_ADD_CLOUD_FILTER_SHIFT 0
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#define I40E_AQC_ADD_CLOUD_FILTER_MASK (0x3F << \
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#define I40E_AQC_ADD_CLOUD_FILTER_MASK (0x3F << \
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I40E_AQC_ADD_CLOUD_FILTER_SHIFT)
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/* 0x0000 reserved */
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#define I40E_AQC_ADD_CLOUD_FILTER_OIP 0x0001
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@ -1240,7 +1240,7 @@ struct i40e_aqc_add_remove_cloud_filters_element_data {
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u8 reserved[4];
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__le16 queue_number;
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#define I40E_AQC_ADD_CLOUD_QUEUE_SHIFT 0
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#define I40E_AQC_ADD_CLOUD_QUEUE_MASK (0x3F << \
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#define I40E_AQC_ADD_CLOUD_QUEUE_MASK (0x7FF << \
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I40E_AQC_ADD_CLOUD_QUEUE_SHIFT)
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u8 reserved2[14];
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/* response section */
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@ -2106,7 +2106,8 @@ struct i40e_aqc_oem_param_change {
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#define I40E_AQ_OEM_PARAM_TYPE_BW_CTL 1
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#define I40E_AQ_OEM_PARAM_MAC 2
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__le32 param_value1;
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u8 param_value2[8];
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__le16 param_value2;
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u8 reserved[6];
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};
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I40E_CHECK_CMD_LENGTH(i40e_aqc_oem_param_change);
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@ -276,7 +276,6 @@ enum i40e_admin_queue_opc {
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i40e_aqc_opc_debug_write_reg = 0xFF04,
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i40e_aqc_opc_debug_modify_reg = 0xFF07,
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i40e_aqc_opc_debug_dump_internals = 0xFF08,
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i40e_aqc_opc_debug_modify_internals = 0xFF09,
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};
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/* command structures and indirect data structures */
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@ -410,6 +409,7 @@ struct i40e_aqc_list_capabilities_element_resp {
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#define I40E_AQ_CAP_ID_VSI 0x0017
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#define I40E_AQ_CAP_ID_DCB 0x0018
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#define I40E_AQ_CAP_ID_FCOE 0x0021
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#define I40E_AQ_CAP_ID_ISCSI 0x0022
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#define I40E_AQ_CAP_ID_RSS 0x0040
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#define I40E_AQ_CAP_ID_RXQ 0x0041
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#define I40E_AQ_CAP_ID_TXQ 0x0042
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@ -1207,7 +1207,7 @@ struct i40e_aqc_add_remove_cloud_filters_element_data {
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} ipaddr;
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__le16 flags;
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#define I40E_AQC_ADD_CLOUD_FILTER_SHIFT 0
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#define I40E_AQC_ADD_CLOUD_FILTER_MASK (0x3F << \
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#define I40E_AQC_ADD_CLOUD_FILTER_MASK (0x3F << \
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I40E_AQC_ADD_CLOUD_FILTER_SHIFT)
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/* 0x0000 reserved */
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#define I40E_AQC_ADD_CLOUD_FILTER_OIP 0x0001
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@ -1240,7 +1240,7 @@ struct i40e_aqc_add_remove_cloud_filters_element_data {
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u8 reserved[4];
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__le16 queue_number;
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#define I40E_AQC_ADD_CLOUD_QUEUE_SHIFT 0
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#define I40E_AQC_ADD_CLOUD_QUEUE_MASK (0x3F << \
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#define I40E_AQC_ADD_CLOUD_QUEUE_MASK (0x7FF << \
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I40E_AQC_ADD_CLOUD_QUEUE_SHIFT)
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u8 reserved2[14];
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/* response section */
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@ -2082,7 +2082,8 @@ struct i40e_aqc_oem_param_change {
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#define I40E_AQ_OEM_PARAM_TYPE_BW_CTL 1
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#define I40E_AQ_OEM_PARAM_MAC 2
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__le32 param_value1;
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u8 param_value2[8];
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__le16 param_value2;
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u8 reserved[6];
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};
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I40E_CHECK_CMD_LENGTH(i40e_aqc_oem_param_change);
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