net: dsa: sja1105: Implement the .gettimex64 system call for PTP
Through the PTP_SYS_OFFSET_EXTENDED ioctl, it is possible for userspace applications (i.e. phc2sys) to compensate for the delays incurred while reading the PHC's time. The task itself of taking the software timestamp is delegated to the SPI subsystem, through the newly introduced API in struct spi_transfer. The goal is to cross-timestamp I/O operations on the switch's PTP clock with values in the local system clock (CLOCK_REALTIME). For that we need to understand a bit of the hardware internals. The 'read PTP time' message is a 12 byte structure, first 4 bytes of which represent the SPI header, and the last 8 bytes represent the 64-bit PTP time. The switch itself starts processing the command immediately after receiving the last bit of the address, i.e. at the middle of byte 3 (last byte of header). The PTP time is shadowed to a buffer register in the switch, and retrieved atomically during the subsequent SPI frames. A similar thing goes on for the 'write PTP time' message, although in that case the switch waits until the 64-bit PTP time becomes fully available before taking any action. So the byte that needs to be software-timestamped is byte 11 (last) of the transfer. The patch creates a common (and local) sja1105_xfer implementation for the SPI I/O, and offers 3 front-ends: - sja1105_xfer_u32 and sja1105_xfer_u64: these are capable of optionally requesting a PTP timestamp - sja1105_xfer_buf: this is for large transfers (e.g. the static config buffer) and other misc data, and there is no point in giving timestamping capabilities to this. Signed-off-by: Vladimir Oltean <olteanv@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -122,9 +122,11 @@ int sja1105_xfer_buf(const struct sja1105_private *priv,
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sja1105_spi_rw_mode_t rw, u64 reg_addr,
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u8 *buf, size_t len);
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int sja1105_xfer_u32(const struct sja1105_private *priv,
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sja1105_spi_rw_mode_t rw, u64 reg_addr, u32 *value);
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sja1105_spi_rw_mode_t rw, u64 reg_addr, u32 *value,
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struct ptp_system_timestamp *ptp_sts);
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int sja1105_xfer_u64(const struct sja1105_private *priv,
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sja1105_spi_rw_mode_t rw, u64 reg_addr, u64 *value);
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sja1105_spi_rw_mode_t rw, u64 reg_addr, u64 *value,
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struct ptp_system_timestamp *ptp_sts);
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int sja1105_static_config_upload(struct sja1105_private *priv);
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int sja1105_inhibit_tx(const struct sja1105_private *priv,
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unsigned long port_bitmap, bool tx_inhibited);
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@ -1973,7 +1973,8 @@ static int sja1105_check_device_id(struct sja1105_private *priv)
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u64 part_no;
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int rc;
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rc = sja1105_xfer_u32(priv, SPI_READ, regs->device_id, &device_id);
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rc = sja1105_xfer_u32(priv, SPI_READ, regs->device_id, &device_id,
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NULL);
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if (rc < 0)
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return rc;
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@ -1,6 +1,7 @@
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// SPDX-License-Identifier: GPL-2.0
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/* Copyright (c) 2019, Vladimir Oltean <olteanv@gmail.com>
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*/
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#include <linux/spi/spi.h>
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#include "sja1105.h"
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/* The adjfine API clamps ppb between [-32,768,000, 32,768,000], and
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@ -335,11 +336,13 @@ static int sja1105_ptpegr_ts_poll(struct dsa_switch *ds, int port, u64 *ts)
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}
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/* Caller must hold ptp_data->lock */
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static int sja1105_ptpclkval_read(struct sja1105_private *priv, u64 *ticks)
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static int sja1105_ptpclkval_read(struct sja1105_private *priv, u64 *ticks,
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struct ptp_system_timestamp *ptp_sts)
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{
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const struct sja1105_regs *regs = priv->info->regs;
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return sja1105_xfer_u64(priv, SPI_READ, regs->ptpclkval, ticks);
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return sja1105_xfer_u64(priv, SPI_READ, regs->ptpclkval, ticks,
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ptp_sts);
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}
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/* Caller must hold ptp_data->lock */
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@ -347,7 +350,8 @@ static int sja1105_ptpclkval_write(struct sja1105_private *priv, u64 ticks)
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{
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const struct sja1105_regs *regs = priv->info->regs;
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return sja1105_xfer_u64(priv, SPI_WRITE, regs->ptpclkval, &ticks);
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return sja1105_xfer_u64(priv, SPI_WRITE, regs->ptpclkval, &ticks,
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NULL);
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}
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#define rxtstamp_to_tagger(d) \
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@ -370,7 +374,7 @@ static void sja1105_rxtstamp_work(struct work_struct *work)
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u64 ticks, ts;
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int rc;
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rc = sja1105_ptpclkval_read(priv, &ticks);
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rc = sja1105_ptpclkval_read(priv, &ticks, NULL);
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if (rc < 0) {
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dev_err(ds->dev, "Failed to read PTP clock: %d\n", rc);
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kfree_skb(skb);
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@ -441,8 +445,9 @@ int sja1105_ptp_reset(struct dsa_switch *ds)
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return rc;
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}
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static int sja1105_ptp_gettime(struct ptp_clock_info *ptp,
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struct timespec64 *ts)
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static int sja1105_ptp_gettimex(struct ptp_clock_info *ptp,
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struct timespec64 *ts,
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struct ptp_system_timestamp *ptp_sts)
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{
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struct sja1105_ptp_data *ptp_data = ptp_caps_to_data(ptp);
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struct sja1105_private *priv = ptp_data_to_sja1105(ptp_data);
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@ -451,7 +456,7 @@ static int sja1105_ptp_gettime(struct ptp_clock_info *ptp,
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mutex_lock(&ptp_data->lock);
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rc = sja1105_ptpclkval_read(priv, &ticks);
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rc = sja1105_ptpclkval_read(priv, &ticks, ptp_sts);
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*ts = ns_to_timespec64(sja1105_ticks_to_ns(ticks));
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mutex_unlock(&ptp_data->lock);
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@ -516,7 +521,8 @@ static int sja1105_ptp_adjfine(struct ptp_clock_info *ptp, long scaled_ppm)
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mutex_lock(&ptp_data->lock);
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rc = sja1105_xfer_u32(priv, SPI_WRITE, regs->ptpclkrate, &clkrate32);
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rc = sja1105_xfer_u32(priv, SPI_WRITE, regs->ptpclkrate, &clkrate32,
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NULL);
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mutex_unlock(&ptp_data->lock);
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@ -558,7 +564,7 @@ int sja1105_ptp_clock_register(struct dsa_switch *ds)
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.name = "SJA1105 PHC",
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.adjfine = sja1105_ptp_adjfine,
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.adjtime = sja1105_ptp_adjtime,
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.gettime64 = sja1105_ptp_gettime,
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.gettimex64 = sja1105_ptp_gettimex,
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.settime64 = sja1105_ptp_settime,
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.max_adj = SJA1105_MAX_ADJ_PPB,
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};
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@ -604,7 +610,7 @@ void sja1105_ptp_txtstamp_skb(struct dsa_switch *ds, int slot,
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mutex_lock(&ptp_data->lock);
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rc = sja1105_ptpclkval_read(priv, &ticks);
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rc = sja1105_ptpclkval_read(priv, &ticks, NULL);
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if (rc < 0) {
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dev_err(ds->dev, "Failed to read PTP clock: %d\n", rc);
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kfree_skb(skb);
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@ -42,9 +42,9 @@ sja1105_spi_message_pack(void *buf, const struct sja1105_spi_message *msg)
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* - SPI_READ: creates and sends an SPI read message from absolute
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* address reg_addr, writing @len bytes into *buf
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*/
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int sja1105_xfer_buf(const struct sja1105_private *priv,
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sja1105_spi_rw_mode_t rw, u64 reg_addr,
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u8 *buf, size_t len)
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static int sja1105_xfer(const struct sja1105_private *priv,
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sja1105_spi_rw_mode_t rw, u64 reg_addr, u8 *buf,
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size_t len, struct ptp_system_timestamp *ptp_sts)
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{
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struct sja1105_chunk chunk = {
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.len = min_t(size_t, len, SJA1105_SIZE_SPI_MSG_MAXLEN),
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@ -81,6 +81,7 @@ int sja1105_xfer_buf(const struct sja1105_private *priv,
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struct spi_transfer *chunk_xfer = sja1105_chunk_xfer(xfers, i);
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struct spi_transfer *hdr_xfer = sja1105_hdr_xfer(xfers, i);
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u8 *hdr_buf = sja1105_hdr_buf(hdr_bufs, i);
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struct spi_transfer *ptp_sts_xfer;
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struct sja1105_spi_message msg;
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/* Populate the transfer's header buffer */
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@ -102,6 +103,26 @@ int sja1105_xfer_buf(const struct sja1105_private *priv,
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chunk_xfer->tx_buf = chunk.buf;
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chunk_xfer->len = chunk.len;
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/* Request timestamping for the transfer. Instead of letting
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* callers specify which byte they want to timestamp, we can
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* make certain assumptions:
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* - A read operation will request a software timestamp when
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* what's being read is the PTP time. That is snapshotted by
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* the switch hardware at the end of the command portion
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* (hdr_xfer).
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* - A write operation will request a software timestamp on
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* actions that modify the PTP time. Taking clock stepping as
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* an example, the switch writes the PTP time at the end of
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* the data portion (chunk_xfer).
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*/
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if (rw == SPI_READ)
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ptp_sts_xfer = hdr_xfer;
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else
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ptp_sts_xfer = chunk_xfer;
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ptp_sts_xfer->ptp_sts_word_pre = ptp_sts_xfer->len - 1;
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ptp_sts_xfer->ptp_sts_word_post = ptp_sts_xfer->len - 1;
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ptp_sts_xfer->ptp_sts = ptp_sts;
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/* Calculate next chunk */
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chunk.buf += chunk.len;
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chunk.reg_addr += chunk.len / 4;
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@ -123,6 +144,13 @@ int sja1105_xfer_buf(const struct sja1105_private *priv,
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return rc;
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}
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int sja1105_xfer_buf(const struct sja1105_private *priv,
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sja1105_spi_rw_mode_t rw, u64 reg_addr,
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u8 *buf, size_t len)
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{
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return sja1105_xfer(priv, rw, reg_addr, buf, len, NULL);
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}
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/* If @rw is:
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* - SPI_WRITE: creates and sends an SPI write message at absolute
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* address reg_addr
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@ -133,7 +161,8 @@ int sja1105_xfer_buf(const struct sja1105_private *priv,
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* CPU endianness and directly usable by software running on the core.
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*/
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int sja1105_xfer_u64(const struct sja1105_private *priv,
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sja1105_spi_rw_mode_t rw, u64 reg_addr, u64 *value)
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sja1105_spi_rw_mode_t rw, u64 reg_addr, u64 *value,
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struct ptp_system_timestamp *ptp_sts)
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{
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u8 packed_buf[8];
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int rc;
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@ -141,7 +170,7 @@ int sja1105_xfer_u64(const struct sja1105_private *priv,
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if (rw == SPI_WRITE)
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sja1105_pack(packed_buf, value, 63, 0, 8);
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rc = sja1105_xfer_buf(priv, rw, reg_addr, packed_buf, 8);
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rc = sja1105_xfer(priv, rw, reg_addr, packed_buf, 8, ptp_sts);
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if (rw == SPI_READ)
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sja1105_unpack(packed_buf, value, 63, 0, 8);
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@ -151,7 +180,8 @@ int sja1105_xfer_u64(const struct sja1105_private *priv,
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/* Same as above, but transfers only a 4 byte word */
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int sja1105_xfer_u32(const struct sja1105_private *priv,
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sja1105_spi_rw_mode_t rw, u64 reg_addr, u32 *value)
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sja1105_spi_rw_mode_t rw, u64 reg_addr, u32 *value,
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struct ptp_system_timestamp *ptp_sts)
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{
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u8 packed_buf[4];
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u64 tmp;
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sja1105_pack(packed_buf, &tmp, 31, 0, 4);
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}
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rc = sja1105_xfer_buf(priv, rw, reg_addr, packed_buf, 4);
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rc = sja1105_xfer(priv, rw, reg_addr, packed_buf, 4, ptp_sts);
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if (rw == SPI_READ) {
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sja1105_unpack(packed_buf, &tmp, 31, 0, 4);
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@ -293,7 +323,7 @@ int sja1105_inhibit_tx(const struct sja1105_private *priv,
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int rc;
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rc = sja1105_xfer_u32(priv, SPI_READ, regs->port_control,
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&inhibit_cmd);
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&inhibit_cmd, NULL);
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if (rc < 0)
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return rc;
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inhibit_cmd &= ~port_bitmap;
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return sja1105_xfer_u32(priv, SPI_WRITE, regs->port_control,
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&inhibit_cmd);
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&inhibit_cmd, NULL);
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}
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struct sja1105_status {
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