EDAC, Documentation: Update X-Gene EDAC binding for L3/SoC subnodes

Update documentation for the APM X-Gene SoC EDAC DTS binding for L3/SoC
subnodes.

Signed-off-by: Loc Ho <lho@apm.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Cc: devicetree@vger.kernel.org
Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
Cc: jcm@redhat.com
Cc: Kumar Gala <galak@codeaurora.org>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-edac <linux-edac@vger.kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: mchehab@osg.samsung.com
Cc: patches@apm.com
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Rob Herring <robh+dt@kernel.org>
Link: http://lkml.kernel.org/r/1443055261-8613-2-git-send-email-lho@apm.com
Signed-off-by: Borislav Petkov <bp@suse.de>
This commit is contained in:
Loc Ho 2015-09-23 17:40:58 -07:00 committed by Borislav Petkov
parent 2900ea6096
commit 3498355eec
1 changed files with 23 additions and 0 deletions

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@ -5,6 +5,8 @@ The follow error types are supported:
memory controller - Memory controller
PMD (L1/L2) - Processor module unit (PMD) L1/L2 cache
L3 - L3 cache controller
SoC - SoC IP's such as Ethernet, SATA, and etc
The following section describes the EDAC DT node binding.
@ -30,6 +32,17 @@ Required properties for PMD subnode:
- reg : First resource shall be the PMD resource.
- pmd-controller : Instance number of the PMD controller.
Required properties for L3 subnode:
- compatible : Shall be "apm,xgene-edac-l3" or
"apm,xgene-edac-l3-v2".
- reg : First resource shall be the L3 EDAC resource.
Required properties for SoC subnode:
- compatible : Shall be "apm,xgene-edac-soc-v1" for revision 1 or
"apm,xgene-edac-l3-soc" for general value reporting
only.
- reg : First resource shall be the SoC EDAC resource.
Example:
csw: csw@7e200000 {
compatible = "apm,xgene-csw", "syscon";
@ -76,4 +89,14 @@ Example:
reg = <0x0 0x7c000000 0x0 0x200000>;
pmd-controller = <0>;
};
edacl3@7e600000 {
compatible = "apm,xgene-edac-l3";
reg = <0x0 0x7e600000 0x0 0x1000>;
};
edacsoc@7e930000 {
compatible = "apm,xgene-edac-soc-v1";
reg = <0x0 0x7e930000 0x0 0x1000>;
};
};