drm/i915/selftests: add write-dword test for LMEM
Simple test writing to dwords across an object, using various engines in a randomized order, checking that our writes land from the cpu. Signed-off-by: Matthew Auld <matthew.auld@intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Link: https://patchwork.freedesktop.org/patch/msgid/20191025153728.23689-4-chris@chris-wilson.co.uk
This commit is contained in:
Matthew Auld
Chris Wilson
parent
01377a0d7e
commit
340be48f2c
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@ -11,9 +11,11 @@
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#include "mock_gem_device.h"
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#include "mock_region.h"
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#include "gem/i915_gem_context.h"
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#include "gem/i915_gem_lmem.h"
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#include "gem/i915_gem_region.h"
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#include "gem/i915_gem_object_blt.h"
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#include "gem/selftests/igt_gem_utils.h"
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#include "gem/selftests/mock_context.h"
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#include "gt/intel_gt.h"
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#include "selftests/igt_flush_test.h"
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@ -256,6 +258,125 @@ err_close_objects:
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return err;
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}
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static int igt_gpu_write_dw(struct intel_context *ce,
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struct i915_vma *vma,
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u32 dword,
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u32 value)
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{
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return igt_gpu_fill_dw(ce, vma, dword * sizeof(u32),
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vma->size >> PAGE_SHIFT, value);
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}
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static int igt_cpu_check(struct drm_i915_gem_object *obj, u32 dword, u32 val)
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{
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unsigned long n;
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int err;
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i915_gem_object_lock(obj);
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err = i915_gem_object_set_to_wc_domain(obj, false);
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i915_gem_object_unlock(obj);
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if (err)
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return err;
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err = i915_gem_object_pin_pages(obj);
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if (err)
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return err;
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for (n = 0; n < obj->base.size >> PAGE_SHIFT; ++n) {
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u32 __iomem *base;
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u32 read_val;
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base = i915_gem_object_lmem_io_map_page_atomic(obj, n);
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read_val = ioread32(base + dword);
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io_mapping_unmap_atomic(base);
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if (read_val != val) {
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pr_err("n=%lu base[%u]=%u, val=%u\n",
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n, dword, read_val, val);
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err = -EINVAL;
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break;
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}
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}
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i915_gem_object_unpin_pages(obj);
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return err;
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}
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static int igt_gpu_write(struct i915_gem_context *ctx,
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struct drm_i915_gem_object *obj)
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{
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struct i915_gem_engines *engines;
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struct i915_gem_engines_iter it;
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struct i915_address_space *vm;
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struct intel_context *ce;
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I915_RND_STATE(prng);
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IGT_TIMEOUT(end_time);
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unsigned int count;
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struct i915_vma *vma;
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int *order;
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int i, n;
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int err = 0;
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GEM_BUG_ON(!i915_gem_object_has_pinned_pages(obj));
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n = 0;
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count = 0;
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for_each_gem_engine(ce, i915_gem_context_lock_engines(ctx), it) {
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count++;
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if (!intel_engine_can_store_dword(ce->engine))
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continue;
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vm = ce->vm;
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n++;
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}
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i915_gem_context_unlock_engines(ctx);
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if (!n)
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return 0;
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order = i915_random_order(count * count, &prng);
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if (!order)
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return -ENOMEM;
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vma = i915_vma_instance(obj, vm, NULL);
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if (IS_ERR(vma)) {
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err = PTR_ERR(vma);
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goto out_free;
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}
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err = i915_vma_pin(vma, 0, 0, PIN_USER);
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if (err)
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goto out_free;
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i = 0;
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engines = i915_gem_context_lock_engines(ctx);
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do {
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u32 rng = prandom_u32_state(&prng);
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u32 dword = offset_in_page(rng) / 4;
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ce = engines->engines[order[i] % engines->num_engines];
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i = (i + 1) % (count * count);
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if (!ce || !intel_engine_can_store_dword(ce->engine))
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continue;
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err = igt_gpu_write_dw(ce, vma, dword, rng);
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if (err)
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break;
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err = igt_cpu_check(obj, dword, rng);
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if (err)
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break;
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} while (!__igt_timeout(end_time, NULL));
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i915_gem_context_unlock_engines(ctx);
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out_free:
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kfree(order);
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if (err == -ENOMEM)
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err = 0;
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return err;
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}
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static int igt_lmem_create(void *arg)
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{
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struct drm_i915_private *i915 = arg;
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@ -277,6 +398,50 @@ out_put:
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return err;
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}
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static int igt_lmem_write_gpu(void *arg)
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{
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struct drm_i915_private *i915 = arg;
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struct drm_i915_gem_object *obj;
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struct i915_gem_context *ctx;
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struct drm_file *file;
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I915_RND_STATE(prng);
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u32 sz;
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int err;
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file = mock_file(i915);
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if (IS_ERR(file))
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return PTR_ERR(file);
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ctx = live_context(i915, file);
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if (IS_ERR(ctx)) {
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err = PTR_ERR(ctx);
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goto out_file;
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}
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sz = round_up(prandom_u32_state(&prng) % SZ_32M, PAGE_SIZE);
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obj = i915_gem_object_create_lmem(i915, sz, 0);
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if (IS_ERR(obj)) {
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err = PTR_ERR(obj);
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goto out_file;
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}
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err = i915_gem_object_pin_pages(obj);
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if (err)
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goto out_put;
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err = igt_gpu_write(ctx, obj);
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if (err)
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pr_err("igt_gpu_write failed(%d)\n", err);
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i915_gem_object_unpin_pages(obj);
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out_put:
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i915_gem_object_put(obj);
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out_file:
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mock_file_free(i915, file);
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return err;
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}
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static int igt_lmem_write_cpu(void *arg)
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{
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struct drm_i915_private *i915 = arg;
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@ -421,6 +586,7 @@ int intel_memory_region_live_selftests(struct drm_i915_private *i915)
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static const struct i915_subtest tests[] = {
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SUBTEST(igt_lmem_create),
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SUBTEST(igt_lmem_write_cpu),
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SUBTEST(igt_lmem_write_gpu),
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};
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if (!HAS_LMEM(i915)) {
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