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net/mlx5e: Split the main flow steering table 

Currently, the main flow table is used for two purposes:
One is to do mac filtering and the other is to classify
the packet l3-l4 header in order to steer the packet to
the right RSS TIR.

This design is very complex, for each configured mac address we
have to add eleven rules (rule for each traffic type), the same if the
device is put to promiscuous/allmulti mode.
This scheme isn't scalable for future features like aRFS.

In order to simplify it, the main flow table is split to two flow
tables:
1. l2 table - filter the packet dmac address, if there is a match
we forward to the ttc flow table.

2. TTC (Traffic Type Classifier) table - classify the traffic
type of the packet and steer the packet to the right TIR.

In this new design, when new mac address is added, the driver adds
only one flow rule instead of eleven.

Signed-off-by: Maor Gottlieb <maorg@mellanox.com>
Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Maor Gottlieb 2016-04-29 01:36:38 +03:00 committed by David S. Miller
parent acff797cd1
commit 33cfaaa8f3
4 changed files with 534 additions and 635 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

42
drivers/net/ethernet/mellanox/mlx5/core/en.h
View File

@ -399,31 +399,18 @@ struct mlx5e_vxlan_db {
struct radix_tree_root tree;
};
struct mlx5e_eth_addr_info {
struct mlx5e_l2_rule {
u8 addr[ETH_ALEN + 2];
u32 tt_vec;
struct mlx5_flow_rule *ft_rule[MLX5E_NUM_TT];
struct mlx5_flow_rule *rule;
};
#define MLX5E_ETH_ADDR_HASH_SIZE (1 << BITS_PER_BYTE)
struct mlx5e_flow_table {
int num_groups;
struct mlx5_flow_table *t;
struct mlx5_flow_group **g;
};
struct mlx5e_main_table {
struct mlx5e_flow_table ft;
struct hlist_head netdev_uc[MLX5E_ETH_ADDR_HASH_SIZE];
struct hlist_head netdev_mc[MLX5E_ETH_ADDR_HASH_SIZE];
struct mlx5e_eth_addr_info broadcast;
struct mlx5e_eth_addr_info allmulti;
struct mlx5e_eth_addr_info promisc;
bool broadcast_enabled;
bool allmulti_enabled;
bool promisc_enabled;
};
#define MLX5E_L2_ADDR_HASH_SIZE BIT(BITS_PER_BYTE)
struct mlx5e_tc_table {
struct mlx5_flow_table *t;
@ -441,11 +428,30 @@ struct mlx5e_vlan_table {
bool filter_disabled;
};
struct mlx5e_l2_table {
struct mlx5e_flow_table ft;
struct hlist_head netdev_uc[MLX5E_L2_ADDR_HASH_SIZE];
struct hlist_head netdev_mc[MLX5E_L2_ADDR_HASH_SIZE];
struct mlx5e_l2_rule broadcast;
struct mlx5e_l2_rule allmulti;
struct mlx5e_l2_rule promisc;
bool broadcast_enabled;
bool allmulti_enabled;
bool promisc_enabled;
};
/* L3/L4 traffic type classifier */
struct mlx5e_ttc_table {
struct mlx5e_flow_table ft;
struct mlx5_flow_rule *rules[MLX5E_NUM_TT];
};
struct mlx5e_flow_steering {
struct mlx5_flow_namespace *ns;
struct mlx5e_tc_table tc;
struct mlx5e_vlan_table vlan;
struct mlx5e_main_table main;
struct mlx5e_l2_table l2;
struct mlx5e_ttc_table ttc;
};
struct mlx5e_direct_tir {
@ -563,7 +569,7 @@ void mlx5e_update_stats(struct mlx5e_priv *priv);
int mlx5e_create_flow_steering(struct mlx5e_priv *priv);
void mlx5e_destroy_flow_steering(struct mlx5e_priv *priv);
void mlx5e_init_eth_addr(struct mlx5e_priv *priv);
void mlx5e_init_l2_addr(struct mlx5e_priv *priv);
void mlx5e_set_rx_mode_work(struct work_struct *work);
void mlx5e_fill_hwstamp(struct mlx5e_tstamp *clock, u64 timestamp,

1123
drivers/net/ethernet/mellanox/mlx5/core/en_fs.c
View File

File diff suppressed because it is too large Load Diff

2
drivers/net/ethernet/mellanox/mlx5/core/en_main.c
View File

@ -2977,7 +2977,7 @@ static void *mlx5e_create_netdev(struct mlx5_core_dev *mdev)
mlx5e_create_q_counter(priv);
mlx5e_init_eth_addr(priv);
mlx5e_init_l2_addr(priv);
mlx5e_vxlan_init(priv);

2
drivers/net/ethernet/mellanox/mlx5/core/fs_core.c
View File

@ -74,7 +74,7 @@
#define BY_PASS_MIN_LEVEL (KERNEL_MIN_LEVEL + MLX5_BY_PASS_NUM_PRIOS +\
LEFTOVERS_NUM_PRIOS)
#define KERNEL_NIC_PRIO_NUM_LEVELS 2
#define KERNEL_NIC_PRIO_NUM_LEVELS 3
#define KERNEL_NIC_NUM_PRIOS 1
/* One more level for tc */
#define KERNEL_MIN_LEVEL (KERNEL_NIC_PRIO_NUM_LEVELS + 1)