arm64: KVM: Optimize arm64 skip 30-50% vfp/simd save/restore on exits
This patch only saves and restores FP/SIMD registers on Guest access. To do this cptr_el2 FP/SIMD trap is set on Guest entry and later checked on exit. lmbench, hackbench show significant improvements, for 30-50% exits FP/SIMD context is not saved/restored [chazy/maz: fixed save/restore logic for 32bit guests] Signed-off-by: Mario Smarduch <m.smarduch@samsung.com> Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
This commit is contained in:
Mario Smarduch
Marc Zyngier
parent
f120cd6533
commit
33c76a0b81
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@ -171,10 +171,13 @@
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#define HSTR_EL2_TTEE (1 << 16)
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#define HSTR_EL2_T(x) (1 << x)
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/* Hyp Coproccessor Trap Register Shifts */
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#define CPTR_EL2_TFP_SHIFT 10
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/* Hyp Coprocessor Trap Register */
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#define CPTR_EL2_TCPAC (1 << 31)
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#define CPTR_EL2_TTA (1 << 20)
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#define CPTR_EL2_TFP (1 << 10)
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#define CPTR_EL2_TFP (1 << CPTR_EL2_TFP_SHIFT)
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/* Hyp Debug Configuration Register bits */
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#define MDCR_EL2_TDRA (1 << 11)
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@ -385,6 +385,14 @@
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tbz \tmp, #KVM_ARM64_DEBUG_DIRTY_SHIFT, \target
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.endm
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/*
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* Branch to target if CPTR_EL2.TFP bit is set (VFP/SIMD trapping enabled)
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*/
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.macro skip_fpsimd_state tmp, target
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mrs \tmp, cptr_el2
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tbnz \tmp, #CPTR_EL2_TFP_SHIFT, \target
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.endm
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.macro compute_debug_state target
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// Compute debug state: If any of KDE, MDE or KVM_ARM64_DEBUG_DIRTY
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// is set, we do a full save/restore cycle and disable trapping.
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@ -423,10 +431,12 @@
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add x3, x2, #CPU_SYSREG_OFFSET(DACR32_EL2)
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mrs x4, dacr32_el2
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mrs x5, ifsr32_el2
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mrs x6, fpexc32_el2
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stp x4, x5, [x3]
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str x6, [x3, #16]
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skip_fpsimd_state x8, 3f
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mrs x6, fpexc32_el2
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str x6, [x3, #16]
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3:
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skip_debug_state x8, 2f
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mrs x7, dbgvcr32_el2
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str x7, [x3, #24]
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@ -453,10 +463,8 @@
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add x3, x2, #CPU_SYSREG_OFFSET(DACR32_EL2)
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ldp x4, x5, [x3]
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ldr x6, [x3, #16]
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msr dacr32_el2, x4
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msr ifsr32_el2, x5
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msr fpexc32_el2, x6
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skip_debug_state x8, 2f
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ldr x7, [x3, #24]
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@ -473,8 +481,22 @@
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.macro activate_traps
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ldr x2, [x0, #VCPU_HCR_EL2]
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/*
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* We are about to set CPTR_EL2.TFP to trap all floating point
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* register accesses to EL2, however, the ARM ARM clearly states that
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* traps are only taken to EL2 if the operation would not otherwise
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* trap to EL1. Therefore, always make sure that for 32-bit guests,
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* we set FPEXC.EN to prevent traps to EL1, when setting the TFP bit.
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*/
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tbnz x2, #HCR_RW_SHIFT, 99f // open code skip_32bit_state
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mov x3, #(1 << 30)
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msr fpexc32_el2, x3
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isb
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99:
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msr hcr_el2, x2
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mov x2, #CPTR_EL2_TTA
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orr x2, x2, #CPTR_EL2_TFP
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msr cptr_el2, x2
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mov x2, #(1 << 15) // Trap CP15 Cr=15
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@ -488,7 +510,6 @@
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.macro deactivate_traps
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mov x2, #HCR_RW
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msr hcr_el2, x2
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msr cptr_el2, xzr
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msr hstr_el2, xzr
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mrs x2, mdcr_el2
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@ -653,12 +674,41 @@ __restore_debug:
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ret
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__save_fpsimd:
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skip_fpsimd_state x3, 1f
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save_fpsimd
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ret
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1: ret
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__restore_fpsimd:
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skip_fpsimd_state x3, 1f
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restore_fpsimd
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ret
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1: ret
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switch_to_guest_fpsimd:
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push x4, lr
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mrs x2, cptr_el2
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bic x2, x2, #CPTR_EL2_TFP
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msr cptr_el2, x2
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isb
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mrs x0, tpidr_el2
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ldr x2, [x0, #VCPU_HOST_CONTEXT]
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kern_hyp_va x2
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bl __save_fpsimd
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add x2, x0, #VCPU_CONTEXT
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bl __restore_fpsimd
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skip_32bit_state x3, 1f
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ldr x4, [x2, #CPU_SYSREG_OFFSET(FPEXC32_EL2)]
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msr fpexc32_el2, x4
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1:
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pop x4, lr
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pop x2, x3
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pop x0, x1
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eret
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/*
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* u64 __kvm_vcpu_run(struct kvm_vcpu *vcpu);
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@ -680,7 +730,6 @@ ENTRY(__kvm_vcpu_run)
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kern_hyp_va x2
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save_host_regs
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bl __save_fpsimd
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bl __save_sysregs
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compute_debug_state 1f
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@ -697,7 +746,6 @@ ENTRY(__kvm_vcpu_run)
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add x2, x0, #VCPU_CONTEXT
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bl __restore_sysregs
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bl __restore_fpsimd
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skip_debug_state x3, 1f
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ldr x3, [x0, #VCPU_DEBUG_PTR]
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@ -740,6 +788,8 @@ __kvm_vcpu_return:
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bl __restore_sysregs
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bl __restore_fpsimd
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/* Clear FPSIMD and Trace trapping */
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msr cptr_el2, xzr
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skip_debug_state x3, 1f
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// Clear the dirty flag for the next run, as all the state has
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@ -949,6 +999,11 @@ el1_trap:
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* x1: ESR
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* x2: ESR_EC
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*/
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/* Guest accessed VFP/SIMD registers, save host, restore Guest */
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cmp x2, #ESR_ELx_EC_FP_ASIMD
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b.eq switch_to_guest_fpsimd
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cmp x2, #ESR_ELx_EC_DABT_LOW
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mov x0, #ESR_ELx_EC_IABT_LOW
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ccmp x2, x0, #4, ne
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