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mlxsw: Rename 'read_frc_capable' bit to 'read_clock_capable' 

Rename the 'read_frc_capable' bit to 'read_clock_capable' since now it can
be both the FRC and UTC clocks.

Signed-off-by: Danielle Ratson <danieller@nvidia.com>
Reviewed-by: Petr Machata <petrm@nvidia.com>
Signed-off-by: Amit Cohen <amcohen@nvidia.com>
Signed-off-by: Ido Schimmel <idosch@nvidia.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Danielle Ratson 2022-07-24 11:03:23 +03:00 committed by David S. Miller
parent 448e9cb363
commit 33a9583f9a
3 changed files with 3 additions and 3 deletions
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2
drivers/net/ethernet/mellanox/mlxsw/core.h
View File

@ -487,7 +487,7 @@ struct mlxsw_bus_info {
u8 vsd[MLXSW_CMD_BOARDINFO_VSD_LEN];
u8 psid[MLXSW_CMD_BOARDINFO_PSID_LEN];
u8 low_frequency:1,
read_frc_capable:1;
read_clock_capable:1;
};
struct mlxsw_hwmon;

2
drivers/net/ethernet/mellanox/mlxsw/pci.c
View File

@ -1923,7 +1923,7 @@ static int mlxsw_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
mlxsw_pci->bus_info.device_kind = driver_name;
mlxsw_pci->bus_info.device_name = pci_name(mlxsw_pci->pdev);
mlxsw_pci->bus_info.dev = &pdev->dev;
mlxsw_pci->bus_info.read_frc_capable = true;
mlxsw_pci->bus_info.read_clock_capable = true;
mlxsw_pci->id = id;
err = mlxsw_core_bus_device_register(&mlxsw_pci->bus_info,

2
drivers/net/ethernet/mellanox/mlxsw/spectrum.c
View File

@ -3096,7 +3096,7 @@ static int mlxsw_sp_init(struct mlxsw_core *mlxsw_core,
goto err_router_init;
}
if (mlxsw_sp->bus_info->read_frc_capable) {
if (mlxsw_sp->bus_info->read_clock_capable) {
/* NULL is a valid return value from clock_init */
mlxsw_sp->clock =
mlxsw_sp->ptp_ops->clock_init(mlxsw_sp,