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m68knommu: use common interrupt controller code for older ColdFire CPU's 

The old ColdFire CPU's (5206, 5307, 5407, 5249 etc) use a simple
interrupt controller. Use common setup code for them. This addition
means that all ColdFire CPU's now have some specific type of interrupt
controller code.

Signed-off-by: Greg Ungerer <gerg@uclinux.org>
This commit is contained in:
Greg Ungerer 2009-04-30 16:22:24 +10:00
parent 6589c1d715
commit 33a21263bf
4 changed files with 63 additions and 28 deletions
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4
arch/m68knommu/kernel/irq.c
View File

@ -29,9 +29,7 @@ asmlinkage void do_IRQ(int irq, struct pt_regs *regs)
set_irq_regs(oldregs);
}
#if !defined(CONFIG_M520x) && !defined(CONFIG_M523x) && \
!defined(CONFIG_M527x) && !defined(CONFIG_M528x) && \
!defined(CONFIG_M532x)
#if !defined(CONFIG_COLDFIRE)
static struct irq_chip m_irq_chip = {
.name = "M68K-INTC",

12
arch/m68knommu/platform/coldfire/Makefile
View File

@ -15,17 +15,17 @@
asflags-$(CONFIG_FULLDEBUG) := -DDEBUGGER_COMPATIBLE_CACHE=1
obj-$(CONFIG_COLDFIRE) += clk.o dma.o entry.o vectors.o
obj-$(CONFIG_M5206) += timers.o
obj-$(CONFIG_M5206e) += timers.o
obj-$(CONFIG_M5206) += timers.o intc.o
obj-$(CONFIG_M5206e) += timers.o intc.o
obj-$(CONFIG_M520x) += pit.o intc-simr.o
obj-$(CONFIG_M523x) += pit.o dma_timer.o intc-2.o
obj-$(CONFIG_M5249) += timers.o
obj-$(CONFIG_M5249) += timers.o intc.o
obj-$(CONFIG_M527x) += pit.o intc-2.o
obj-$(CONFIG_M5272) += timers.o
obj-$(CONFIG_M5272) += timers.o intc.o
obj-$(CONFIG_M528x) += pit.o intc-2.o
obj-$(CONFIG_M5307) += timers.o
obj-$(CONFIG_M5307) += timers.o intc.o
obj-$(CONFIG_M532x) += timers.o intc-simr.o
obj-$(CONFIG_M5407) += timers.o
obj-$(CONFIG_M5407) += timers.o intc.o
obj-y += pinmux.o gpio.o
extra-y := head.o

55
arch/m68knommu/platform/coldfire/intc.c Normal file
View File

@ -0,0 +1,55 @@
/*
* intc.c
*
* (C) Copyright 2009, Greg Ungerer <gerg@snapgear.com>
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file COPYING in the main directory of this archive
* for more details.
*/
#include <linux/types.h>
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/interrupt.h>
#include <linux/irq.h>
#include <linux/io.h>
#include <asm/traps.h>
#include <asm/coldfire.h>
#include <asm/mcfsim.h>
static void intc_irq_mask(unsigned int irq)
{
}
static void intc_irq_unmask(unsigned int irq)
{
}
static int intc_irq_set_type(unsigned int irq, unsigned int type)
{
return 0;
}
static struct irq_chip intc_irq_chip = {
.name = "CF-INTC",
.mask = intc_irq_mask,
.unmask = intc_irq_unmask,
.set_type = intc_irq_set_type,
};
void __init init_IRQ(void)
{
int irq;
init_vectors();
for (irq = 0; (irq < NR_IRQS); irq++) {
irq_desc[irq].status = IRQ_DISABLED;
irq_desc[irq].action = NULL;
irq_desc[irq].depth = 1;
irq_desc[irq].chip = &intc_irq_chip;
intc_irq_set_type(irq, 0);
}
}

20
arch/m68knommu/platform/coldfire/vectors.c
View File

@ -1,7 +1,7 @@
/***************************************************************************/
/*
* linux/arch/m68knommu/platform/5307/vectors.c
* linux/arch/m68knommu/platform/coldfire/vectors.c
*
* Copyright (C) 1999-2007, Greg Ungerer <gerg@snapgear.com>
*/
@ -15,7 +15,6 @@
#include <asm/machdep.h>
#include <asm/coldfire.h>
#include <asm/mcfsim.h>
#include <asm/mcfdma.h>
#include <asm/mcfwdebug.h>
/***************************************************************************/
@ -79,20 +78,3 @@ void __init init_vectors(void)
}
/***************************************************************************/
void enable_vector(unsigned int irq)
{
/* Currently no action on ColdFire */
}
void disable_vector(unsigned int irq)
{
/* Currently no action on ColdFire */
}
void ack_vector(unsigned int irq)
{
/* Currently no action on ColdFire */
}
/***************************************************************************/