ASoC: ak4458: Add DSD support for ak4458 and ak4497
Ak4458 can't support DSD512 format, but ak4497 can, so add a new enum variable (enum ak4458_type) in ak4458_drvdata to distinguish these two platforms. Ak4497 has two kinds of DSD input pin, it can be selected by the dsd-path property from DT. In hw_params(), bit clock is calculated according to different DSD format (DSD64, DSD128, DSD256, DSD512), then registers are configured. Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com> Link: https://lore.kernel.org/r/1600178220-28973-2-git-send-email-shengjiu.wang@nxp.com Signed-off-by: Mark Brown <broonie@kernel.org>
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@ -28,14 +28,21 @@ static const char *ak4458_supply_names[AK4458_NUM_SUPPLIES] = {
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"AVDD",
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};
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enum ak4458_type {
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AK4458 = 0,
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AK4497 = 1,
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};
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struct ak4458_drvdata {
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struct snd_soc_dai_driver *dai_drv;
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const struct snd_soc_component_driver *comp_drv;
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enum ak4458_type type;
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};
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/* AK4458 Codec Private Data */
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struct ak4458_priv {
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struct regulator_bulk_data supplies[AK4458_NUM_SUPPLIES];
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const struct ak4458_drvdata *drvdata;
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struct device *dev;
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struct regmap *regmap;
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struct gpio_desc *reset_gpiod;
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@ -45,6 +52,7 @@ struct ak4458_priv {
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int fmt;
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int slots;
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int slot_width;
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u32 dsd_path; /* For ak4497 */
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};
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static const struct reg_default ak4458_reg_defaults[] = {
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@ -325,12 +333,54 @@ static int ak4458_hw_params(struct snd_pcm_substream *substream,
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struct snd_soc_component *component = dai->component;
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struct ak4458_priv *ak4458 = snd_soc_component_get_drvdata(component);
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int pcm_width = max(params_physical_width(params), ak4458->slot_width);
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int nfs1;
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u8 format;
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u8 format, dsdsel0, dsdsel1;
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int nfs1, dsd_bclk;
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nfs1 = params_rate(params);
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ak4458->fs = nfs1;
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/* calculate bit clock */
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switch (params_format(params)) {
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case SNDRV_PCM_FORMAT_DSD_U8:
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case SNDRV_PCM_FORMAT_DSD_U16_LE:
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case SNDRV_PCM_FORMAT_DSD_U16_BE:
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case SNDRV_PCM_FORMAT_DSD_U32_LE:
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case SNDRV_PCM_FORMAT_DSD_U32_BE:
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dsd_bclk = nfs1 * params_physical_width(params);
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switch (dsd_bclk) {
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case 2822400:
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dsdsel0 = 0;
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dsdsel1 = 0;
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break;
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case 5644800:
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dsdsel0 = 1;
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dsdsel1 = 0;
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break;
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case 11289600:
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dsdsel0 = 0;
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dsdsel1 = 1;
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break;
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case 22579200:
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if (ak4458->drvdata->type == AK4497) {
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dsdsel0 = 1;
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dsdsel1 = 1;
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} else {
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dev_err(dai->dev, "DSD512 not supported.\n");
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return -EINVAL;
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}
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break;
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default:
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dev_err(dai->dev, "Unsupported dsd bclk.\n");
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return -EINVAL;
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}
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snd_soc_component_update_bits(component, AK4458_06_DSD1,
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AK4458_DSDSEL_MASK, dsdsel0);
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snd_soc_component_update_bits(component, AK4458_09_DSD2,
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AK4458_DSDSEL_MASK, dsdsel1);
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break;
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}
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/* Master Clock Frequency Auto Setting Mode Enable */
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snd_soc_component_update_bits(component, AK4458_00_CONTROL1, 0x80, 0x80);
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@ -355,6 +405,9 @@ static int ak4458_hw_params(struct snd_pcm_substream *substream,
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case SND_SOC_DAIFMT_DSP_B:
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format = AK4458_DIF_32BIT_MSB;
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break;
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case SND_SOC_DAIFMT_PDM:
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format = AK4458_DIF_32BIT_MSB;
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break;
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default:
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return -EINVAL;
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}
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@ -393,6 +446,7 @@ static int ak4458_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
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case SND_SOC_DAIFMT_LEFT_J:
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case SND_SOC_DAIFMT_RIGHT_J:
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case SND_SOC_DAIFMT_DSP_B:
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case SND_SOC_DAIFMT_PDM:
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ak4458->fmt = fmt & SND_SOC_DAIFMT_FORMAT_MASK;
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break;
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default:
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@ -401,6 +455,12 @@ static int ak4458_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
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return -EINVAL;
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}
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/* DSD mode */
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snd_soc_component_update_bits(component, AK4458_02_CONTROL3,
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AK4458_DP_MASK,
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ak4458->fmt == SND_SOC_DAIFMT_PDM ?
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AK4458_DP_MASK : 0);
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ak4458_rstn_control(component, 0);
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ak4458_rstn_control(component, 1);
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@ -472,7 +532,10 @@ static int ak4458_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask,
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#define AK4458_FORMATS (SNDRV_PCM_FMTBIT_S16_LE |\
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SNDRV_PCM_FMTBIT_S24_LE |\
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SNDRV_PCM_FMTBIT_S32_LE)
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SNDRV_PCM_FMTBIT_S32_LE |\
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SNDRV_PCM_FMTBIT_DSD_U8 |\
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SNDRV_PCM_FMTBIT_DSD_U16_LE |\
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SNDRV_PCM_FMTBIT_DSD_U32_LE)
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static const unsigned int ak4458_rates[] = {
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8000, 11025, 16000, 22050,
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@ -564,6 +627,13 @@ static int ak4458_init(struct snd_soc_component *component)
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if (ret < 0)
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return ret;
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if (ak4458->drvdata->type == AK4497) {
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ret = snd_soc_component_update_bits(component, AK4458_09_DSD2,
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0x4, (ak4458->dsd_path << 2));
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if (ret < 0)
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return ret;
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}
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return ak4458_rstn_control(component, 1);
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}
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@ -668,11 +738,13 @@ static const struct regmap_config ak4458_regmap = {
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static const struct ak4458_drvdata ak4458_drvdata = {
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.dai_drv = &ak4458_dai,
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.comp_drv = &soc_codec_dev_ak4458,
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.type = AK4458,
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};
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static const struct ak4458_drvdata ak4497_drvdata = {
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.dai_drv = &ak4497_dai,
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.comp_drv = &soc_codec_dev_ak4497,
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.type = AK4497,
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};
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static const struct dev_pm_ops ak4458_pm = {
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@ -684,7 +756,6 @@ static const struct dev_pm_ops ak4458_pm = {
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static int ak4458_i2c_probe(struct i2c_client *i2c)
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{
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struct ak4458_priv *ak4458;
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const struct ak4458_drvdata *drvdata;
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int ret, i;
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ak4458 = devm_kzalloc(&i2c->dev, sizeof(*ak4458), GFP_KERNEL);
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@ -698,7 +769,7 @@ static int ak4458_i2c_probe(struct i2c_client *i2c)
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i2c_set_clientdata(i2c, ak4458);
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ak4458->dev = &i2c->dev;
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drvdata = of_device_get_match_data(&i2c->dev);
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ak4458->drvdata = of_device_get_match_data(&i2c->dev);
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ak4458->reset_gpiod = devm_gpiod_get_optional(ak4458->dev, "reset",
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GPIOD_OUT_LOW);
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@ -710,6 +781,9 @@ static int ak4458_i2c_probe(struct i2c_client *i2c)
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if (IS_ERR(ak4458->mute_gpiod))
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return PTR_ERR(ak4458->mute_gpiod);
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/* Optional property for ak4497 */
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of_property_read_u32(i2c->dev.of_node, "dsd-path", &ak4458->dsd_path);
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for (i = 0; i < ARRAY_SIZE(ak4458->supplies); i++)
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ak4458->supplies[i].supply = ak4458_supply_names[i];
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@ -720,8 +794,9 @@ static int ak4458_i2c_probe(struct i2c_client *i2c)
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return ret;
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}
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ret = devm_snd_soc_register_component(ak4458->dev, drvdata->comp_drv,
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drvdata->dai_drv, 1);
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ret = devm_snd_soc_register_component(ak4458->dev,
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ak4458->drvdata->comp_drv,
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ak4458->drvdata->dai_drv, 1);
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if (ret < 0) {
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dev_err(ak4458->dev, "Failed to register CODEC: %d\n", ret);
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return ret;
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@ -83,4 +83,7 @@
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#define AK4458_ATS_SHIFT 6
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#define AK4458_ATS_MASK GENMASK(7, 6)
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#endif /* _AK4458_H */
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#define AK4458_DSDSEL_MASK (0x1 << 0)
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#define AK4458_DP_MASK (0x1 << 7)
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#endif
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