powerpc: drop MPC8272_ADS platform support
The MPC8272-ADS also supported other 82xx CPU variants, had 64MB RAM, 8MB flash, and like the 85xx ADS platforms, was on a fairly large PCB in order to have space for breakout connectors for all the features. These 82xx platforms are two decades old, and originally made for a small group of industry related people in order to assist in new OEM board designs. Given that, it makes sense to remove support today. Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://msgid.link/20230224204959.17425-2-paul.gortmaker@windriver.com
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@ -329,7 +329,6 @@ image-$(CONFIG_PPC_LITE5200) += cuImage.lite5200b
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image-$(CONFIG_PPC_MEDIA5200) += cuImage.media5200
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# Board ports in arch/powerpc/platform/82xx/Kconfig
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image-$(CONFIG_MPC8272_ADS) += cuImage.mpc8272ads
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image-$(CONFIG_PQ2FADS) += cuImage.pq2fads
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image-$(CONFIG_EP8248E) += dtbImage.ep8248e
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@ -1,263 +0,0 @@
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// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* MPC8272 ADS Device Tree Source
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*
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* Copyright 2005,2008 Freescale Semiconductor Inc.
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*/
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/dts-v1/;
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/ {
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model = "MPC8272ADS";
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compatible = "fsl,mpc8272ads";
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#address-cells = <1>;
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#size-cells = <1>;
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aliases {
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ethernet0 = ð0;
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ethernet1 = ð1;
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serial0 = &scc1;
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serial1 = &scc4;
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};
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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PowerPC,8272@0 {
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device_type = "cpu";
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reg = <0x0>;
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d-cache-line-size = <32>;
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i-cache-line-size = <32>;
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d-cache-size = <16384>;
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i-cache-size = <16384>;
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timebase-frequency = <0>;
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bus-frequency = <0>;
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clock-frequency = <0>;
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};
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};
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memory {
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device_type = "memory";
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reg = <0x0 0x0>;
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};
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localbus@f0010100 {
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compatible = "fsl,mpc8272-localbus",
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"fsl,pq2-localbus";
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#address-cells = <2>;
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#size-cells = <1>;
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reg = <0xf0010100 0x40>;
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ranges = <0x0 0x0 0xff800000 0x00800000
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0x1 0x0 0xf4500000 0x8000
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0x3 0x0 0xf8200000 0x8000>;
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flash@0,0 {
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compatible = "jedec-flash";
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reg = <0x0 0x0 0x00800000>;
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bank-width = <4>;
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device-width = <1>;
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};
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board-control@1,0 {
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reg = <0x1 0x0 0x20>;
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compatible = "fsl,mpc8272ads-bcsr";
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};
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PCI_PIC: interrupt-controller@3,0 {
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compatible = "fsl,mpc8272ads-pci-pic",
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"fsl,pq2ads-pci-pic";
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#interrupt-cells = <1>;
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interrupt-controller;
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reg = <0x3 0x0 0x8>;
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interrupt-parent = <&PIC>;
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interrupts = <20 8>;
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};
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};
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pci@f0010800 {
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device_type = "pci";
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reg = <0xf0010800 0x10c 0xf00101ac 0x8 0xf00101c4 0x8>;
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compatible = "fsl,mpc8272-pci", "fsl,pq2-pci";
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#interrupt-cells = <1>;
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#size-cells = <2>;
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#address-cells = <3>;
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clock-frequency = <66666666>;
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interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
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interrupt-map = <
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/* IDSEL 0x16 */
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0xb000 0x0 0x0 0x1 &PCI_PIC 0
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0xb000 0x0 0x0 0x2 &PCI_PIC 1
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0xb000 0x0 0x0 0x3 &PCI_PIC 2
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0xb000 0x0 0x0 0x4 &PCI_PIC 3
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/* IDSEL 0x17 */
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0xb800 0x0 0x0 0x1 &PCI_PIC 4
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0xb800 0x0 0x0 0x2 &PCI_PIC 5
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0xb800 0x0 0x0 0x3 &PCI_PIC 6
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0xb800 0x0 0x0 0x4 &PCI_PIC 7
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/* IDSEL 0x18 */
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0xc000 0x0 0x0 0x1 &PCI_PIC 8
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0xc000 0x0 0x0 0x2 &PCI_PIC 9
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0xc000 0x0 0x0 0x3 &PCI_PIC 10
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0xc000 0x0 0x0 0x4 &PCI_PIC 11>;
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interrupt-parent = <&PIC>;
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interrupts = <18 8>;
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ranges = <0x42000000 0x0 0x80000000 0x80000000 0x0 0x20000000
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0x2000000 0x0 0xa0000000 0xa0000000 0x0 0x20000000
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0x1000000 0x0 0x0 0xf6000000 0x0 0x2000000>;
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};
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soc@f0000000 {
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#address-cells = <1>;
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#size-cells = <1>;
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device_type = "soc";
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compatible = "fsl,mpc8272", "fsl,pq2-soc";
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ranges = <0x0 0xf0000000 0x53000>;
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// Temporary -- will go away once kernel uses ranges for get_immrbase().
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reg = <0xf0000000 0x53000>;
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cpm@119c0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "fsl,mpc8272-cpm", "fsl,cpm2";
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reg = <0x119c0 0x30>;
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ranges;
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muram@0 {
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0x0 0x0 0x10000>;
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data@0 {
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compatible = "fsl,cpm-muram-data";
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reg = <0x0 0x2000 0x9800 0x800>;
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};
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};
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brg@119f0 {
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compatible = "fsl,mpc8272-brg",
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"fsl,cpm2-brg",
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"fsl,cpm-brg";
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reg = <0x119f0 0x10 0x115f0 0x10>;
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};
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scc1: serial@11a00 {
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device_type = "serial";
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compatible = "fsl,mpc8272-scc-uart",
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"fsl,cpm2-scc-uart";
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reg = <0x11a00 0x20 0x8000 0x100>;
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interrupts = <40 8>;
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interrupt-parent = <&PIC>;
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fsl,cpm-brg = <1>;
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fsl,cpm-command = <0x800000>;
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};
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scc4: serial@11a60 {
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device_type = "serial";
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compatible = "fsl,mpc8272-scc-uart",
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"fsl,cpm2-scc-uart";
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reg = <0x11a60 0x20 0x8300 0x100>;
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interrupts = <43 8>;
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interrupt-parent = <&PIC>;
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fsl,cpm-brg = <4>;
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fsl,cpm-command = <0xce00000>;
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};
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usb@11b60 {
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compatible = "fsl,mpc8272-cpm-usb";
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reg = <0x11b60 0x40 0x8b00 0x100>;
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interrupts = <11 8>;
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interrupt-parent = <&PIC>;
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mode = "peripheral";
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};
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mdio@10d40 {
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compatible = "fsl,mpc8272ads-mdio-bitbang",
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"fsl,mpc8272-mdio-bitbang",
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"fsl,cpm2-mdio-bitbang";
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reg = <0x10d40 0x14>;
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#address-cells = <1>;
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#size-cells = <0>;
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fsl,mdio-pin = <18>;
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fsl,mdc-pin = <19>;
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PHY0: ethernet-phy@0 {
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interrupt-parent = <&PIC>;
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interrupts = <23 8>;
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reg = <0x0>;
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};
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PHY1: ethernet-phy@1 {
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interrupt-parent = <&PIC>;
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interrupts = <23 8>;
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reg = <0x3>;
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};
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};
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eth0: ethernet@11300 {
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device_type = "network";
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compatible = "fsl,mpc8272-fcc-enet",
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"fsl,cpm2-fcc-enet";
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reg = <0x11300 0x20 0x8400 0x100 0x11390 0x1>;
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local-mac-address = [ 00 00 00 00 00 00 ];
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interrupts = <32 8>;
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interrupt-parent = <&PIC>;
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phy-handle = <&PHY0>;
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linux,network-index = <0>;
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fsl,cpm-command = <0x12000300>;
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};
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eth1: ethernet@11320 {
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device_type = "network";
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compatible = "fsl,mpc8272-fcc-enet",
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"fsl,cpm2-fcc-enet";
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reg = <0x11320 0x20 0x8500 0x100 0x113b0 0x1>;
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local-mac-address = [ 00 00 00 00 00 00 ];
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interrupts = <33 8>;
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interrupt-parent = <&PIC>;
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phy-handle = <&PHY1>;
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linux,network-index = <1>;
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fsl,cpm-command = <0x16200300>;
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};
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i2c@11860 {
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compatible = "fsl,mpc8272-i2c",
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"fsl,cpm2-i2c";
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reg = <0x11860 0x20 0x8afc 0x2>;
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interrupts = <1 8>;
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interrupt-parent = <&PIC>;
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fsl,cpm-command = <0x29600000>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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};
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PIC: interrupt-controller@10c00 {
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#interrupt-cells = <2>;
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interrupt-controller;
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reg = <0x10c00 0x80>;
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compatible = "fsl,mpc8272-pic", "fsl,cpm2-pic";
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};
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crypto@30000 {
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compatible = "fsl,sec1.0";
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reg = <0x40000 0x13000>;
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interrupts = <47 0x8>;
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interrupt-parent = <&PIC>;
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fsl,num-channels = <4>;
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fsl,channel-fifo-len = <24>;
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fsl,exec-units-mask = <0x7e>;
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fsl,descriptor-types-mask = <0x1010415>;
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};
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};
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chosen {
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stdout-path = "/soc/cpm/serial@11a00";
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};
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};
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@ -1,79 +0,0 @@
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CONFIG_SYSVIPC=y
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CONFIG_NO_HZ=y
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CONFIG_HIGH_RES_TIMERS=y
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CONFIG_IKCONFIG=y
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CONFIG_IKCONFIG_PROC=y
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CONFIG_LOG_BUF_SHIFT=14
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CONFIG_EXPERT=y
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CONFIG_KALLSYMS_ALL=y
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CONFIG_PARTITION_ADVANCED=y
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# CONFIG_PPC_CHRP is not set
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# CONFIG_PPC_PMAC is not set
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CONFIG_PPC_82xx=y
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CONFIG_MPC8272_ADS=y
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CONFIG_BINFMT_MISC=y
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CONFIG_PCI=y
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CONFIG_NET=y
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CONFIG_PACKET=y
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CONFIG_UNIX=y
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CONFIG_INET=y
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CONFIG_IP_MULTICAST=y
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CONFIG_IP_PNP=y
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CONFIG_IP_PNP_DHCP=y
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CONFIG_IP_PNP_BOOTP=y
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CONFIG_SYN_COOKIES=y
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CONFIG_NETFILTER=y
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# CONFIG_FW_LOADER is not set
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CONFIG_MTD=y
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CONFIG_MTD_BLOCK=y
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CONFIG_MTD_JEDECPROBE=y
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CONFIG_MTD_CFI_ADV_OPTIONS=y
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CONFIG_MTD_CFI_GEOMETRY=y
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# CONFIG_MTD_MAP_BANK_WIDTH_1 is not set
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# CONFIG_MTD_MAP_BANK_WIDTH_2 is not set
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# CONFIG_MTD_CFI_I1 is not set
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# CONFIG_MTD_CFI_I2 is not set
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CONFIG_MTD_CFI_I4=y
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CONFIG_MTD_CFI_INTELEXT=y
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CONFIG_MTD_PHYSMAP_OF=y
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CONFIG_BLK_DEV_LOOP=y
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CONFIG_NETDEVICES=y
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CONFIG_TUN=y
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CONFIG_FS_ENET=y
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# CONFIG_FS_ENET_HAS_SCC is not set
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CONFIG_FS_ENET_MDIO_FCC=y
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CONFIG_DAVICOM_PHY=y
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CONFIG_PPP=y
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CONFIG_PPP_DEFLATE=y
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CONFIG_PPP_ASYNC=y
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CONFIG_PPP_SYNC_TTY=y
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CONFIG_INPUT_EVDEV=y
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# CONFIG_VT is not set
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CONFIG_SERIAL_CPM=y
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CONFIG_SERIAL_CPM_CONSOLE=y
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# CONFIG_HWMON is not set
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# CONFIG_USB_SUPPORT is not set
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CONFIG_EXT2_FS=y
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CONFIG_EXT4_FS=y
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CONFIG_AUTOFS4_FS=y
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CONFIG_PROC_KCORE=y
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CONFIG_TMPFS=y
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CONFIG_CRAMFS=y
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CONFIG_NFS_FS=y
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CONFIG_NFS_V3_ACL=y
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CONFIG_ROOT_NFS=y
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CONFIG_NLS=y
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CONFIG_NLS_CODEPAGE_437=y
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CONFIG_NLS_ASCII=y
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CONFIG_NLS_ISO8859_1=y
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CONFIG_NLS_UTF8=y
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CONFIG_DEBUG_INFO_DWARF_TOOLCHAIN_DEFAULT=y
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CONFIG_MAGIC_SYSRQ=y
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CONFIG_DETECT_HUNG_TASK=y
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CONFIG_BDI_SWITCH=y
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CONFIG_CRYPTO_CBC=y
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CONFIG_CRYPTO_ECB=y
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CONFIG_CRYPTO_PCBC=y
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CONFIG_CRYPTO_MD5=y
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CONFIG_CRYPTO_DES=y
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# CONFIG_CRYPTO_HW is not set
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@ -38,7 +38,6 @@ CONFIG_PPC_MPC52xx=y
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CONFIG_PPC_EFIKA=y
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CONFIG_PPC_MPC5200_BUGFIX=y
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CONFIG_PPC_82xx=y
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CONFIG_MPC8272_ADS=y
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CONFIG_PQ2FADS=y
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CONFIG_EP8248E=y
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CONFIG_MGCOGE=y
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@ -5,17 +5,6 @@ menuconfig PPC_82xx
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if PPC_82xx
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config MPC8272_ADS
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bool "Freescale MPC8272 ADS"
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select DEFAULT_UIMAGE
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select PQ2ADS
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select 8272
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select 8260
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select FSL_SOC
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select PQ2_ADS_PCI_PIC if PCI
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help
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This option enables support for the MPC8272 ADS board
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config PQ2FADS
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bool "Freescale PQ2FADS"
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select DEFAULT_UIMAGE
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@ -2,7 +2,6 @@
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#
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# Makefile for the PowerPC 82xx linux kernel.
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#
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obj-$(CONFIG_MPC8272_ADS) += mpc8272_ads.o
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obj-$(CONFIG_CPM2) += pq2.o
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obj-$(CONFIG_PQ2_ADS_PCI_PIC) += pq2ads-pci-pic.o
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obj-$(CONFIG_PQ2FADS) += pq2fads.o
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@ -1,204 +0,0 @@
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// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* MPC8272 ADS board support
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*
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* Copyright 2007 Freescale Semiconductor, Inc.
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* Author: Scott Wood <scottwood@freescale.com>
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*
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* Based on code by Vitaly Bordug <vbordug@ru.mvista.com>
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* Copyright (c) 2006 MontaVista Software, Inc.
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*/
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#include <linux/init.h>
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#include <linux/interrupt.h>
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#include <linux/fsl_devices.h>
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#include <linux/of_address.h>
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#include <linux/of_fdt.h>
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#include <linux/of_platform.h>
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#include <linux/io.h>
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#include <asm/cpm2.h>
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#include <asm/udbg.h>
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#include <asm/machdep.h>
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#include <asm/time.h>
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#include <platforms/82xx/pq2.h>
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#include <sysdev/fsl_soc.h>
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#include <sysdev/cpm2_pic.h>
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#include "pq2.h"
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static void __init mpc8272_ads_pic_init(void)
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{
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struct device_node *np = of_find_compatible_node(NULL, NULL,
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"fsl,cpm2-pic");
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if (!np) {
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printk(KERN_ERR "PIC init: can not find fsl,cpm2-pic node\n");
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return;
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}
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cpm2_pic_init(np);
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of_node_put(np);
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/* Initialize stuff for the 82xx CPLD IC and install demux */
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pq2ads_pci_init_irq();
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}
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struct cpm_pin {
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int port, pin, flags;
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};
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static struct cpm_pin mpc8272_ads_pins[] = {
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/* SCC1 */
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{3, 30, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
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{3, 31, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
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/* SCC4 */
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{3, 21, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
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{3, 22, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
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/* FCC1 */
|
||||
{0, 14, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
|
||||
{0, 15, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
|
||||
{0, 16, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
|
||||
{0, 17, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
|
||||
{0, 18, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
|
||||
{0, 19, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
|
||||
{0, 20, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
|
||||
{0, 21, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
|
||||
{0, 26, CPM_PIN_INPUT | CPM_PIN_SECONDARY},
|
||||
{0, 27, CPM_PIN_INPUT | CPM_PIN_SECONDARY},
|
||||
{0, 28, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
|
||||
{0, 29, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
|
||||
{0, 30, CPM_PIN_INPUT | CPM_PIN_SECONDARY},
|
||||
{0, 31, CPM_PIN_INPUT | CPM_PIN_SECONDARY},
|
||||
{2, 21, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
|
||||
{2, 22, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
|
||||
|
||||
/* FCC2 */
|
||||
{1, 18, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
|
||||
{1, 19, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
|
||||
{1, 20, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
|
||||
{1, 21, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
|
||||
{1, 22, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
|
||||
{1, 23, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
|
||||
{1, 24, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
|
||||
{1, 25, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
|
||||
{1, 26, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
|
||||
{1, 27, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
|
||||
{1, 28, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
|
||||
{1, 29, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
|
||||
{1, 30, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
|
||||
{1, 31, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
|
||||
{2, 16, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
|
||||
{2, 17, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
|
||||
|
||||
/* I2C */
|
||||
{3, 14, CPM_PIN_INPUT | CPM_PIN_SECONDARY | CPM_PIN_OPENDRAIN},
|
||||
{3, 15, CPM_PIN_INPUT | CPM_PIN_SECONDARY | CPM_PIN_OPENDRAIN},
|
||||
|
||||
/* USB */
|
||||
{2, 10, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
|
||||
{2, 11, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
|
||||
{2, 20, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
|
||||
{2, 24, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
|
||||
{3, 23, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
|
||||
{3, 24, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
|
||||
{3, 25, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
|
||||
};
|
||||
|
||||
static void __init init_ioports(void)
|
||||
{
|
||||
int i;
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(mpc8272_ads_pins); i++) {
|
||||
struct cpm_pin *pin = &mpc8272_ads_pins[i];
|
||||
cpm2_set_pin(pin->port, pin->pin, pin->flags);
|
||||
}
|
||||
|
||||
cpm2_clk_setup(CPM_CLK_SCC1, CPM_BRG1, CPM_CLK_RX);
|
||||
cpm2_clk_setup(CPM_CLK_SCC1, CPM_BRG1, CPM_CLK_TX);
|
||||
cpm2_clk_setup(CPM_CLK_SCC3, CPM_CLK8, CPM_CLK_RX);
|
||||
cpm2_clk_setup(CPM_CLK_SCC3, CPM_CLK8, CPM_CLK_TX);
|
||||
cpm2_clk_setup(CPM_CLK_SCC4, CPM_BRG4, CPM_CLK_RX);
|
||||
cpm2_clk_setup(CPM_CLK_SCC4, CPM_BRG4, CPM_CLK_TX);
|
||||
cpm2_clk_setup(CPM_CLK_FCC1, CPM_CLK11, CPM_CLK_RX);
|
||||
cpm2_clk_setup(CPM_CLK_FCC1, CPM_CLK10, CPM_CLK_TX);
|
||||
cpm2_clk_setup(CPM_CLK_FCC2, CPM_CLK15, CPM_CLK_RX);
|
||||
cpm2_clk_setup(CPM_CLK_FCC2, CPM_CLK16, CPM_CLK_TX);
|
||||
}
|
||||
|
||||
static void __init mpc8272_ads_setup_arch(void)
|
||||
{
|
||||
struct device_node *np;
|
||||
__be32 __iomem *bcsr;
|
||||
|
||||
if (ppc_md.progress)
|
||||
ppc_md.progress("mpc8272_ads_setup_arch()", 0);
|
||||
|
||||
cpm2_reset();
|
||||
|
||||
np = of_find_compatible_node(NULL, NULL, "fsl,mpc8272ads-bcsr");
|
||||
if (!np) {
|
||||
printk(KERN_ERR "No bcsr in device tree\n");
|
||||
return;
|
||||
}
|
||||
|
||||
bcsr = of_iomap(np, 0);
|
||||
of_node_put(np);
|
||||
if (!bcsr) {
|
||||
printk(KERN_ERR "Cannot map BCSR registers\n");
|
||||
return;
|
||||
}
|
||||
|
||||
#define BCSR1_FETHIEN 0x08000000
|
||||
#define BCSR1_FETH_RST 0x04000000
|
||||
#define BCSR1_RS232_EN1 0x02000000
|
||||
#define BCSR1_RS232_EN2 0x01000000
|
||||
#define BCSR3_USB_nEN 0x80000000
|
||||
#define BCSR3_FETHIEN2 0x10000000
|
||||
#define BCSR3_FETH2_RST 0x08000000
|
||||
|
||||
clrbits32(&bcsr[1], BCSR1_RS232_EN1 | BCSR1_RS232_EN2 | BCSR1_FETHIEN);
|
||||
setbits32(&bcsr[1], BCSR1_FETH_RST);
|
||||
|
||||
clrbits32(&bcsr[3], BCSR3_FETHIEN2);
|
||||
setbits32(&bcsr[3], BCSR3_FETH2_RST);
|
||||
|
||||
clrbits32(&bcsr[3], BCSR3_USB_nEN);
|
||||
|
||||
iounmap(bcsr);
|
||||
|
||||
init_ioports();
|
||||
|
||||
if (ppc_md.progress)
|
||||
ppc_md.progress("mpc8272_ads_setup_arch(), finish", 0);
|
||||
}
|
||||
|
||||
static const struct of_device_id of_bus_ids[] __initconst = {
|
||||
{ .name = "soc", },
|
||||
{ .name = "cpm", },
|
||||
{ .name = "localbus", },
|
||||
{},
|
||||
};
|
||||
|
||||
static int __init declare_of_platform_devices(void)
|
||||
{
|
||||
/* Publish the QE devices */
|
||||
of_platform_bus_probe(NULL, of_bus_ids, NULL);
|
||||
return 0;
|
||||
}
|
||||
machine_device_initcall(mpc8272_ads, declare_of_platform_devices);
|
||||
|
||||
define_machine(mpc8272_ads)
|
||||
{
|
||||
.name = "Freescale MPC8272 ADS",
|
||||
.compatible = "fsl,mpc8272ads",
|
||||
.setup_arch = mpc8272_ads_setup_arch,
|
||||
.discover_phbs = pq2_init_pci,
|
||||
.init_IRQ = mpc8272_ads_pic_init,
|
||||
.get_irq = cpm2_get_irq,
|
||||
.restart = pq2_restart,
|
||||
.progress = udbg_progress,
|
||||
};
|
Loading…
Reference in New Issue