ARM: OMAP2+: gpmc: fix gpmc_hwecc_bch_capable()
This patch adds bch8 ecc software fallback which is mostly used by
omap3s because they lack hardware elm support.
Fixes: 0611c41934
(ARM: OMAP2+: gpmc:
update gpmc_hwecc_bch_capable() for new platforms and ECC schemes)
Cc: <stable@vger.kernel.org> # 3.15.x+
Signed-off-by: Christoph Fritz <chf.fritz@googlemail.com>
Reviewed-by: Pekon Gupta <pekon@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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@ -50,6 +50,16 @@ static bool gpmc_hwecc_bch_capable(enum omap_ecc ecc_opt)
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soc_is_omap54xx() || soc_is_dra7xx())
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return 1;
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if (ecc_opt == OMAP_ECC_BCH4_CODE_HW_DETECTION_SW ||
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ecc_opt == OMAP_ECC_BCH8_CODE_HW_DETECTION_SW) {
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if (cpu_is_omap24xx())
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return 0;
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else if (cpu_is_omap3630() && (GET_OMAP_REVISION() == 0))
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return 0;
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else
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return 1;
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}
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/* OMAP3xxx do not have ELM engine, so cannot support ECC schemes
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* which require H/W based ECC error detection */
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if ((cpu_is_omap34xx() || cpu_is_omap3630()) &&
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@ -57,14 +67,6 @@ static bool gpmc_hwecc_bch_capable(enum omap_ecc ecc_opt)
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(ecc_opt == OMAP_ECC_BCH8_CODE_HW)))
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return 0;
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/*
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* For now, assume 4-bit mode is only supported on OMAP3630 ES1.x, x>=1
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* and AM33xx derivates. Other chips may be added if confirmed to work.
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*/
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if ((ecc_opt == OMAP_ECC_BCH4_CODE_HW_DETECTION_SW) &&
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(!cpu_is_omap3630() || (GET_OMAP_REVISION() == 0)))
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return 0;
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/* legacy platforms support only HAM1 (1-bit Hamming) ECC scheme */
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if (ecc_opt == OMAP_ECC_HAM1_CODE_HW)
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return 1;
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