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thermal/drivers/mediatek: Control buffer enablement tweaks 

Add logic in order to be able to turn on the control buffer on MT8365.
This change now allows to have control buffer support for MTK_THERMAL_V1,
and it allows to define the register offset, and mask used to enable it.

Signed-off-by: Markus Schneider-Pargmann <msp@baylibre.com>
Signed-off-by: Fabien Parent <fparent@baylibre.com>
Signed-off-by: Amjad Ouled-Ameur <aouledameur@baylibre.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20221018-up-i350-thermal-bringup-v9-2-55a1ae14af74@baylibre.com
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
This commit is contained in:
Markus Schneider-Pargmann 2023-01-27 16:44:43 +01:00 committed by Daniel Lezcano
parent dfd7956f00
commit 33140e668b
1 changed files with 19 additions and 9 deletions
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28
drivers/thermal/mediatek/auxadc_thermal.c
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@ -307,6 +307,9 @@ struct mtk_thermal_data {
bool need_switch_bank; bool need_switch_bank;
struct thermal_bank_cfg bank_data[MAX_NUM_ZONES]; struct thermal_bank_cfg bank_data[MAX_NUM_ZONES];
enum mtk_thermal_version version; enum mtk_thermal_version version;
u32 apmixed_buffer_ctl_reg;
u32 apmixed_buffer_ctl_mask;
u32 apmixed_buffer_ctl_set;
}; };
struct mtk_thermal { struct mtk_thermal {
@ -560,6 +563,9 @@ static const struct mtk_thermal_data mt7622_thermal_data = {
.adcpnp = mt7622_adcpnp, .adcpnp = mt7622_adcpnp,
.sensor_mux_values = mt7622_mux_values, .sensor_mux_values = mt7622_mux_values,
.version = MTK_THERMAL_V2, .version = MTK_THERMAL_V2,
.apmixed_buffer_ctl_reg = APMIXED_SYS_TS_CON1,
.apmixed_buffer_ctl_mask = GENMASK(31, 6) | BIT(3),
.apmixed_buffer_ctl_set = BIT(0),
}; };
/* /*
@ -1079,14 +1085,18 @@ static const struct of_device_id mtk_thermal_of_match[] = {
}; };
MODULE_DEVICE_TABLE(of, mtk_thermal_of_match); MODULE_DEVICE_TABLE(of, mtk_thermal_of_match);
static void mtk_thermal_turn_on_buffer(void __iomem *apmixed_base) static void mtk_thermal_turn_on_buffer(struct mtk_thermal *mt,
void __iomem *apmixed_base)
{ {
int tmp; u32 tmp;
tmp = readl(apmixed_base + APMIXED_SYS_TS_CON1); if (!mt->conf->apmixed_buffer_ctl_reg)
tmp &= ~(0x37); return;
tmp |= 0x1;
writel(tmp, apmixed_base + APMIXED_SYS_TS_CON1); tmp = readl(apmixed_base + mt->conf->apmixed_buffer_ctl_reg);
tmp &= mt->conf->apmixed_buffer_ctl_mask;
tmp |= mt->conf->apmixed_buffer_ctl_set;
writel(tmp, apmixed_base + mt->conf->apmixed_buffer_ctl_reg);
udelay(200); udelay(200);
} }
@ -1184,10 +1194,10 @@ static int mtk_thermal_probe(struct platform_device *pdev)
goto err_disable_clk_auxadc; goto err_disable_clk_auxadc;
} }
if (mt->conf->version != MTK_THERMAL_V1) { mtk_thermal_turn_on_buffer(mt, apmixed_base);
mtk_thermal_turn_on_buffer(apmixed_base);
if (mt->conf->version != MTK_THERMAL_V2)
mtk_thermal_release_periodic_ts(mt, auxadc_base); mtk_thermal_release_periodic_ts(mt, auxadc_base);
}
if (mt->conf->version == MTK_THERMAL_V1) if (mt->conf->version == MTK_THERMAL_V1)
mt->raw_to_mcelsius = raw_to_mcelsius_v1; mt->raw_to_mcelsius = raw_to_mcelsius_v1;