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drm/i915: Transform whitelisting WAs into a simple reg write 

RING_FORCE_TO_NONPRIV registers do not live in the logical context. They are simply
global privileged MMIO registers that happen to be powercontext saved and restored
(meaning only they can survive RC6). Therefore, there is absolutely no need to save
them so that they can be restored everytime we create a new logical context.

Suggested-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Oscar Mateo <oscar.mateo@intel.com>
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/1506638439-6903-1-git-send-email-oscar.mateo@intel.com
Acked-by: Michel Thierry <michel.thierry@intel.com>
Tested-by: Chris Wilson <chris@chris-wilson.co.uk> #bxt
Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
This commit is contained in:
Oscar Mateo 2017-09-28 15:40:39 -07:00 committed by Chris Wilson
parent 8279aaf590
commit 32ced39c1b
1 changed files with 2 additions and 2 deletions
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4
drivers/gpu/drm/i915/intel_engine_cs.c
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@ -845,8 +845,8 @@ static int wa_ring_whitelist_reg(struct intel_engine_cs *engine,
if (WARN_ON(index >= RING_MAX_NONPRIV_SLOTS)) if (WARN_ON(index >= RING_MAX_NONPRIV_SLOTS))
return -EINVAL; return -EINVAL;
WA_WRITE(RING_FORCE_TO_NONPRIV(engine->mmio_base, index), I915_WRITE(RING_FORCE_TO_NONPRIV(engine->mmio_base, index),
i915_mmio_reg_offset(reg)); i915_mmio_reg_offset(reg));
wa->hw_whitelist_count[engine->id]++; wa->hw_whitelist_count[engine->id]++;
return 0; return 0;