spi: make `cs_change_delay` the first user of the `spi_delay` logic
Since the logic for `spi_delay` struct + `spi_delay_exec()` has been copied from the `cs_change_delay` logic, it's natural to make this delay, the first user. The `cs_change_delay` logic requires that the default remain 10 uS, in case it is unspecified/unconfigured. So, there is some special handling needed to do that. The ADIS library is one of the few users of the new `cs_change_delay` parameter for an spi_transfer. The introduction of the `spi_delay` struct, requires that the users of of `cs_change_delay` get an update. This change also updates the ADIS library. Signed-off-by: Alexandru Ardelean <alexandru.ardelean@analog.com> Link: https://lore.kernel.org/r/20190926105147.7839-4-alexandru.ardelean@analog.com Signed-off-by: Mark Brown <broonie@kernel.org>
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@ -39,24 +39,24 @@ int adis_write_reg(struct adis *adis, unsigned int reg,
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.len = 2,
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.cs_change = 1,
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.delay_usecs = adis->data->write_delay,
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.cs_change_delay = adis->data->cs_change_delay,
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.cs_change_delay_unit = SPI_DELAY_UNIT_USECS,
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.cs_change_delay.value = adis->data->cs_change_delay,
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.cs_change_delay.unit = SPI_DELAY_UNIT_USECS,
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}, {
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.tx_buf = adis->tx + 2,
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.bits_per_word = 8,
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.len = 2,
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.cs_change = 1,
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.delay_usecs = adis->data->write_delay,
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.cs_change_delay = adis->data->cs_change_delay,
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.cs_change_delay_unit = SPI_DELAY_UNIT_USECS,
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.cs_change_delay.value = adis->data->cs_change_delay,
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.cs_change_delay.unit = SPI_DELAY_UNIT_USECS,
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}, {
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.tx_buf = adis->tx + 4,
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.bits_per_word = 8,
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.len = 2,
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.cs_change = 1,
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.delay_usecs = adis->data->write_delay,
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.cs_change_delay = adis->data->cs_change_delay,
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.cs_change_delay_unit = SPI_DELAY_UNIT_USECS,
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.cs_change_delay.value = adis->data->cs_change_delay,
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.cs_change_delay.unit = SPI_DELAY_UNIT_USECS,
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}, {
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.tx_buf = adis->tx + 6,
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.bits_per_word = 8,
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@ -139,16 +139,16 @@ int adis_read_reg(struct adis *adis, unsigned int reg,
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.len = 2,
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.cs_change = 1,
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.delay_usecs = adis->data->write_delay,
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.cs_change_delay = adis->data->cs_change_delay,
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.cs_change_delay_unit = SPI_DELAY_UNIT_USECS,
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.cs_change_delay.value = adis->data->cs_change_delay,
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.cs_change_delay.unit = SPI_DELAY_UNIT_USECS,
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}, {
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.tx_buf = adis->tx + 2,
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.bits_per_word = 8,
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.len = 2,
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.cs_change = 1,
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.delay_usecs = adis->data->read_delay,
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.cs_change_delay = adis->data->cs_change_delay,
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.cs_change_delay_unit = SPI_DELAY_UNIT_USECS,
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.cs_change_delay.value = adis->data->cs_change_delay,
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.cs_change_delay.unit = SPI_DELAY_UNIT_USECS,
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}, {
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.tx_buf = adis->tx + 4,
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.rx_buf = adis->rx,
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@ -156,8 +156,8 @@ int adis_read_reg(struct adis *adis, unsigned int reg,
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.len = 2,
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.cs_change = 1,
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.delay_usecs = adis->data->read_delay,
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.cs_change_delay = adis->data->cs_change_delay,
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.cs_change_delay_unit = SPI_DELAY_UNIT_USECS,
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.cs_change_delay.value = adis->data->cs_change_delay,
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.cs_change_delay.unit = SPI_DELAY_UNIT_USECS,
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}, {
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.rx_buf = adis->rx + 2,
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.bits_per_word = 8,
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@ -1160,9 +1160,9 @@ EXPORT_SYMBOL_GPL(spi_delay_exec);
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static void _spi_transfer_cs_change_delay(struct spi_message *msg,
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struct spi_transfer *xfer)
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{
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u32 delay = xfer->cs_change_delay;
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u32 unit = xfer->cs_change_delay_unit;
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u32 hz;
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u32 delay = xfer->cs_change_delay.value;
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u32 unit = xfer->cs_change_delay.unit;
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int ret;
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/* return early on "fast" mode - for everything but USECS */
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if (!delay) {
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@ -1171,27 +1171,13 @@ static void _spi_transfer_cs_change_delay(struct spi_message *msg,
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return;
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}
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switch (unit) {
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case SPI_DELAY_UNIT_USECS:
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delay *= 1000;
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break;
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case SPI_DELAY_UNIT_NSECS: /* nothing to do here */
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break;
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case SPI_DELAY_UNIT_SCK:
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/* if there is no effective speed know, then approximate
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* by underestimating with half the requested hz
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*/
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hz = xfer->effective_speed_hz ?: xfer->speed_hz / 2;
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delay *= DIV_ROUND_UP(1000000000, hz);
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break;
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default:
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ret = spi_delay_exec(&xfer->cs_change_delay, xfer);
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if (ret) {
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dev_err_once(&msg->spi->dev,
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"Use of unsupported delay unit %i, using default of 10us\n",
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xfer->cs_change_delay_unit);
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delay = 10000;
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unit);
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_spi_transfer_delay_ns(10000);
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}
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/* now sleep for the requested amount of time */
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_spi_transfer_delay_ns(delay);
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}
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/*
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@ -778,7 +778,6 @@ extern void spi_res_release(struct spi_controller *ctlr,
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* @cs_change: affects chipselect after this transfer completes
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* @cs_change_delay: delay between cs deassert and assert when
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* @cs_change is set and @spi_transfer is not the last in @spi_message
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* @cs_change_delay_unit: unit of cs_change_delay
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* @delay_usecs: microseconds to delay after this transfer before
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* (optionally) changing the chipselect status, then starting
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* the next transfer or completing this @spi_message.
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@ -900,8 +899,7 @@ struct spi_transfer {
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u8 bits_per_word;
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u8 word_delay_usecs;
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u16 delay_usecs;
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u16 cs_change_delay;
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u8 cs_change_delay_unit;
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struct spi_delay cs_change_delay;
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u32 speed_hz;
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u16 word_delay;
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