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bnxt_en: Add additional chip ID definitions. 

Add additional chip definitions and macros for all supported chips.
Add a new macro BNXT_CHIP_P4_PLUS for the newer generation of chips and
use the macro to properly determine the features supported by these
newer chips.

Signed-off-by: Michael Chan <michael.chan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Michael Chan 2017-05-29 19:06:07 -04:00 committed by David S. Miller
parent 0efd2fc65c
commit 3284f9e1ab
2 changed files with 27 additions and 8 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
drivers/net/ethernet/broadcom/bnxt/bnxt.c
View File

@ -7712,7 +7712,7 @@ static int bnxt_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
init_waitqueue_head(&bp->sriov_cfg_wait); init_waitqueue_head(&bp->sriov_cfg_wait);
#endif #endif
bp->gro_func = bnxt_gro_func_5730x; bp->gro_func = bnxt_gro_func_5730x;
if (BNXT_CHIP_NUM_57X1X(bp->chip_num)) if (BNXT_CHIP_P4_PLUS(bp))
bp->gro_func = bnxt_gro_func_5731x; bp->gro_func = bnxt_gro_func_5731x;
rc = bnxt_hwrm_func_drv_rgtr(bp); rc = bnxt_hwrm_func_drv_rgtr(bp);
@ -7763,9 +7763,7 @@ static int bnxt_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV4 | VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV4 |
VNIC_RSS_CFG_REQ_HASH_TYPE_IPV6 | VNIC_RSS_CFG_REQ_HASH_TYPE_IPV6 |
VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV6; VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV6;
if (!BNXT_CHIP_NUM_57X0X(bp->chip_num) && if (BNXT_CHIP_P4_PLUS(bp) && bp->hwrm_spec_code >= 0x10501) {
!BNXT_CHIP_TYPE_NITRO_A0(bp) &&
bp->hwrm_spec_code >= 0x10501) {
bp->flags |= BNXT_FLAG_UDP_RSS_CAP; bp->flags |= BNXT_FLAG_UDP_RSS_CAP;
bp->rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV4 | bp->rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV4 |
VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV6; VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV6;

29
drivers/net/ethernet/broadcom/bnxt/bnxt.h
View File

@ -938,31 +938,45 @@ struct bnxt {
#define CHIP_NUM_57402 0x16d0 #define CHIP_NUM_57402 0x16d0
#define CHIP_NUM_57404 0x16d1 #define CHIP_NUM_57404 0x16d1
#define CHIP_NUM_57406 0x16d2 #define CHIP_NUM_57406 0x16d2
#define CHIP_NUM_57407 0x16d5
#define CHIP_NUM_57311 0x16ce #define CHIP_NUM_57311 0x16ce
#define CHIP_NUM_57312 0x16cf #define CHIP_NUM_57312 0x16cf
#define CHIP_NUM_57314 0x16df #define CHIP_NUM_57314 0x16df
#define CHIP_NUM_57317 0x16e0
#define CHIP_NUM_57412 0x16d6 #define CHIP_NUM_57412 0x16d6
#define CHIP_NUM_57414 0x16d7 #define CHIP_NUM_57414 0x16d7
#define CHIP_NUM_57416 0x16d8 #define CHIP_NUM_57416 0x16d8
#define CHIP_NUM_57417 0x16d9 #define CHIP_NUM_57417 0x16d9
#define CHIP_NUM_57412L 0x16da
#define CHIP_NUM_57414L 0x16db
#define CHIP_NUM_5745X 0xd730
#define BNXT_CHIP_NUM_5730X(chip_num) \ #define BNXT_CHIP_NUM_5730X(chip_num) \
((chip_num) >= CHIP_NUM_57301 && \ ((chip_num) >= CHIP_NUM_57301 && \
(chip_num) <= CHIP_NUM_57304) (chip_num) <= CHIP_NUM_57304)
#define BNXT_CHIP_NUM_5740X(chip_num) \ #define BNXT_CHIP_NUM_5740X(chip_num) \
((chip_num) >= CHIP_NUM_57402 && \ (((chip_num) >= CHIP_NUM_57402 && \
(chip_num) <= CHIP_NUM_57406) (chip_num) <= CHIP_NUM_57406) || \
(chip_num) == CHIP_NUM_57407)
#define BNXT_CHIP_NUM_5731X(chip_num) \ #define BNXT_CHIP_NUM_5731X(chip_num) \
((chip_num) == CHIP_NUM_57311 || \ ((chip_num) == CHIP_NUM_57311 || \
(chip_num) == CHIP_NUM_57312 || \ (chip_num) == CHIP_NUM_57312 || \
(chip_num) == CHIP_NUM_57314) (chip_num) == CHIP_NUM_57314 || \
(chip_num) == CHIP_NUM_57317)
#define BNXT_CHIP_NUM_5741X(chip_num) \ #define BNXT_CHIP_NUM_5741X(chip_num) \
((chip_num) >= CHIP_NUM_57412 && \ ((chip_num) >= CHIP_NUM_57412 && \
(chip_num) <= CHIP_NUM_57417) (chip_num) <= CHIP_NUM_57414L)
#define BNXT_CHIP_NUM_58700(chip_num) \
((chip_num) == CHIP_NUM_58700)
#define BNXT_CHIP_NUM_5745X(chip_num) \
((chip_num) == CHIP_NUM_5745X)
#define BNXT_CHIP_NUM_57X0X(chip_num) \ #define BNXT_CHIP_NUM_57X0X(chip_num) \
(BNXT_CHIP_NUM_5730X(chip_num) || BNXT_CHIP_NUM_5740X(chip_num)) (BNXT_CHIP_NUM_5730X(chip_num) || BNXT_CHIP_NUM_5740X(chip_num))
@ -1022,6 +1036,13 @@ struct bnxt {
#define BNXT_CHIP_TYPE_NITRO_A0(bp) ((bp)->flags & BNXT_FLAG_CHIP_NITRO_A0) #define BNXT_CHIP_TYPE_NITRO_A0(bp) ((bp)->flags & BNXT_FLAG_CHIP_NITRO_A0)
#define BNXT_RX_PAGE_MODE(bp) ((bp)->flags & BNXT_FLAG_RX_PAGE_MODE) #define BNXT_RX_PAGE_MODE(bp) ((bp)->flags & BNXT_FLAG_RX_PAGE_MODE)
/* Chip class phase 4 and later */
#define BNXT_CHIP_P4_PLUS(bp) \
(BNXT_CHIP_NUM_57X1X((bp)->chip_num) || \
BNXT_CHIP_NUM_5745X((bp)->chip_num) || \
(BNXT_CHIP_NUM_58700((bp)->chip_num) && \
!BNXT_CHIP_TYPE_NITRO_A0(bp)))
struct bnxt_en_dev *edev; struct bnxt_en_dev *edev;
struct bnxt_en_dev * (*ulp_probe)(struct net_device *); struct bnxt_en_dev * (*ulp_probe)(struct net_device *);