MIPS: lantiq: Enable AHB Bus for USB
On Danube and AR9 the USB core is connected though a AHB bus to the main
system cross bar, hence we need to enable the gating clock of the AHB
Bus as well to make the USB controller work.
Fixes: dea54fbad3
("phy: Add an USB PHY driver for the Lantiq SoCs using the RCU module")
Signed-off-by: Mathias Kresin <dev@kresin.me>
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Acked-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: John Crispin <john@phrozen.org>
Cc: linux-mips@linux-mips.org
Cc: <stable@vger.kernel.org> # 4.14+
Patchwork: https://patchwork.linux-mips.org/patch/18814/
Signed-off-by: James Hogan <jhogan@kernel.org>
This commit is contained in:
parent
214cbc1473
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@ -549,9 +549,9 @@ void __init ltq_soc_init(void)
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clkdev_add_static(ltq_ar9_cpu_hz(), ltq_ar9_fpi_hz(),
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ltq_ar9_fpi_hz(), CLOCK_250M);
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clkdev_add_pmu("1f203018.usb2-phy", "phy", 1, 0, PMU_USB0_P);
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clkdev_add_pmu("1e101000.usb", "otg", 1, 0, PMU_USB0);
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clkdev_add_pmu("1e101000.usb", "otg", 1, 0, PMU_USB0 | PMU_AHBM);
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clkdev_add_pmu("1f203034.usb2-phy", "phy", 1, 0, PMU_USB1_P);
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clkdev_add_pmu("1e106000.usb", "otg", 1, 0, PMU_USB1);
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clkdev_add_pmu("1e106000.usb", "otg", 1, 0, PMU_USB1 | PMU_AHBM);
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clkdev_add_pmu("1e180000.etop", "switch", 1, 0, PMU_SWITCH);
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clkdev_add_pmu("1e103000.sdio", NULL, 1, 0, PMU_SDIO);
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clkdev_add_pmu("1e103100.deu", NULL, 1, 0, PMU_DEU);
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@ -560,7 +560,7 @@ void __init ltq_soc_init(void)
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} else {
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clkdev_add_static(ltq_danube_cpu_hz(), ltq_danube_fpi_hz(),
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ltq_danube_fpi_hz(), ltq_danube_pp32_hz());
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clkdev_add_pmu("1e101000.usb", "otg", 1, 0, PMU_USB0);
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clkdev_add_pmu("1e101000.usb", "otg", 1, 0, PMU_USB0 | PMU_AHBM);
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clkdev_add_pmu("1f203018.usb2-phy", "phy", 1, 0, PMU_USB0_P);
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clkdev_add_pmu("1e103000.sdio", NULL, 1, 0, PMU_SDIO);
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clkdev_add_pmu("1e103100.deu", NULL, 1, 0, PMU_DEU);
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