ARM: dts: rockchip: add LVDS node for rk3288
Add LVDS info in rk3288.dtsi for LVDS driver Signed-off-by: Sandy Huang <hjc@rock-chips.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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@ -1002,6 +1002,11 @@
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reg = <2>;
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remote-endpoint = <&mipi_in_vopb>;
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};
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vopb_out_lvds: endpoint@3 {
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reg = <3>;
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remote-endpoint = <&lvds_in_vopb>;
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};
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};
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};
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@ -1045,6 +1050,11 @@
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reg = <2>;
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remote-endpoint = <&mipi_in_vopl>;
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};
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vopl_out_lvds: endpoint@3 {
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reg = <3>;
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remote-endpoint = <&lvds_in_vopl>;
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};
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};
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};
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@ -1086,6 +1096,39 @@
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};
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};
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lvds: lvds@ff96c000 {
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compatible = "rockchip,rk3288-lvds";
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reg = <0x0 0xff96c000 0x0 0x4000>;
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clocks = <&cru PCLK_LVDS_PHY>;
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clock-names = "pclk_lvds";
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pinctrl-names = "lcdc";
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pinctrl-0 = <&lcdc_ctl>;
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power-domains = <&power RK3288_PD_VIO>;
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rockchip,grf = <&grf>;
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status = "disabled";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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lvds_in: port@0 {
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reg = <0>;
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#address-cells = <1>;
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#size-cells = <0>;
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lvds_in_vopb: endpoint@0 {
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reg = <0>;
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remote-endpoint = <&vopb_out_lvds>;
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};
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lvds_in_vopl: endpoint@1 {
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reg = <1>;
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remote-endpoint = <&vopl_out_lvds>;
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};
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};
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};
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};
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edp: dp@ff970000 {
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compatible = "rockchip,rk3288-dp";
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reg = <0x0 0xff970000 0x0 0x4000>;
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@ -1527,6 +1570,15 @@
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};
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};
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lcdc {
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lcdc_ctl: lcdc-ctl {
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rockchip,pins = <1 24 RK_FUNC_1 &pcfg_pull_none>,
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<1 25 RK_FUNC_1 &pcfg_pull_none>,
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<1 26 RK_FUNC_1 &pcfg_pull_none>,
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<1 27 RK_FUNC_1 &pcfg_pull_none>;
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};
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};
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sdmmc {
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sdmmc_clk: sdmmc-clk {
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rockchip,pins = <6 20 RK_FUNC_1 &pcfg_pull_none>;
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