ARM: dts: ast2600-evb: eMMC configuration
Enable the eMMC controller and limit it to 52MHz to avoid the host controller reporting bus error conditions. Reviewed-by: Joel Stanley <joel@jms.id.au> Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
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@ -71,10 +71,16 @@
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phy-handle = <ðphy3>;
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};
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&emmc {
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&emmc_controller {
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status = "okay";
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};
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&emmc {
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non-removable;
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bus-width = <4>;
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max-frequency = <52000000>;
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};
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&rtc {
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status = "okay";
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};
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@ -235,7 +235,7 @@
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};
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};
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emmc: sdc@1e750000 {
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emmc_controller: sdc@1e750000 {
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compatible = "aspeed,ast2600-sd-controller";
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reg = <0x1e750000 0x100>;
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#address-cells = <1>;
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@ -244,7 +244,7 @@
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clocks = <&syscon ASPEED_CLK_GATE_EMMCCLK>;
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status = "disabled";
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sdhci@1e750100 {
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emmc: sdhci@1e750100 {
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compatible = "aspeed,ast2600-sdhci";
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reg = <0x100 0x100>;
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sdhci,auto-cmd12;
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