UbiquitousOS
/
OpenCloudOS-Kernel
mirror of https://gitee.com/OpenCloudOS/OpenCloudOS-Kernel.git
11
0
Fork 0
Code Issues Projects Releases Wiki Activity

rtl8xxxu: Remove unneeded 8192eu hack 

This removes an unneeded hack for 8192eu, and allows for initializing
REG_FPGA0_XAB_RF_SW_CTRL at the same point as it is done for all other
parts.

Signed-off-by: Jes Sorensen <Jes.Sorensen@redhat.com>
Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
This commit is contained in:
Jes Sorensen 2016-04-14 14:59:05 -04:00 committed by Kalle Valo
parent 747bf23759
commit 31133da702
1 changed files with 6 additions and 9 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

15
drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu.c
View File

@ -7680,15 +7680,12 @@ static int rtl8xxxu_init_device(struct ieee80211_hw *hw)
/* RFSW Control - clear bit 14 ?? */ /* RFSW Control - clear bit 14 ?? */
if (priv->rtl_chip != RTL8723B && priv->rtl_chip != RTL8192E) if (priv->rtl_chip != RTL8723B && priv->rtl_chip != RTL8192E)
rtl8xxxu_write32(priv, REG_FPGA0_TX_INFO, 0x00000003); rtl8xxxu_write32(priv, REG_FPGA0_TX_INFO, 0x00000003);
/* 0x07000760 */
if (priv->rtl_chip == RTL8192E) { val32 = FPGA0_RF_TRSW | FPGA0_RF_TRSWB | FPGA0_RF_ANTSW |
val32 = 0; FPGA0_RF_ANTSWB | FPGA0_RF_PAPE |
} else { ((FPGA0_RF_ANTSW | FPGA0_RF_ANTSWB | FPGA0_RF_PAPE) <<
val32 = FPGA0_RF_TRSW | FPGA0_RF_TRSWB | FPGA0_RF_ANTSW | FPGA0_RF_BD_CTRL_SHIFT);
FPGA0_RF_ANTSWB | FPGA0_RF_PAPE |
((FPGA0_RF_ANTSW | FPGA0_RF_ANTSWB | FPGA0_RF_PAPE) <<
FPGA0_RF_BD_CTRL_SHIFT);
}
rtl8xxxu_write32(priv, REG_FPGA0_XAB_RF_SW_CTRL, val32); rtl8xxxu_write32(priv, REG_FPGA0_XAB_RF_SW_CTRL, val32);
/* 0x860[6:5]= 00 - why? - this sets antenna B */ /* 0x860[6:5]= 00 - why? - this sets antenna B */
if (priv->rtl_chip != RTL8192E) if (priv->rtl_chip != RTL8192E)