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Merge branch 'omap/dt' into next/late 

As pointed out by Stephen Rothwell, commit e52117638b ("ARM: dts:
omap3: Add DT entries for OMAP 3 ISP") conflicts with b8845074cf
("ARM: dts: omap3: add minimal l4 bus layout with control module support")
in non-obvious ways, causing a build failure when both patches
are present.

This merges the two branches that introduce the respective changes
into the next/late branch to resolve the way that Stephen suggested,
as confirmed by Tony.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Link: https://lkml.org/lkml/2015/4/6/436
Acked-by: Tony Lindgren <tony@atomide.com>
This commit is contained in:
Arnd Bergmann 2015-04-15 21:35:22 +02:00
parent 9705feacb7 10709c0858
commit 30ecc84eea
39 changed files with 1565 additions and 70 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

71
Documentation/devicetree/bindings/media/ti,omap3isp.txt Normal file
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@ -0,0 +1,71 @@
OMAP 3 ISP Device Tree bindings
===============================
The DT definitions can be found in include/dt-bindings/media/omap3-isp.h.
Required properties
===================
compatible : must contain "ti,omap3-isp"
reg : the two registers sets (physical address and length) for the
ISP. The first set contains the core ISP registers up to
the end of the SBL block. The second set contains the
CSI PHYs and receivers registers.
interrupts : the ISP interrupt specifier
iommus : phandle and IOMMU specifier for the IOMMU that serves the ISP
syscon : the phandle and register offset to the Complex I/O or CSI-PHY
register
ti,phy-type : 0 -- OMAP3ISP_PHY_TYPE_COMPLEX_IO (e.g. 3430)
1 -- OMAP3ISP_PHY_TYPE_CSIPHY (e.g. 3630)
#clock-cells : Must be 1 --- the ISP provides two external clocks,
cam_xclka and cam_xclkb, at indices 0 and 1,
respectively. Please find more information on common
clock bindings in ../clock/clock-bindings.txt.
Port nodes (optional)
---------------------
More documentation on these bindings is available in
video-interfaces.txt in the same directory.
reg : The interface:
0 - parallel (CCDC)
1 - CSIPHY1 -- CSI2C / CCP2B on 3630;
CSI1 -- CSIb on 3430
2 - CSIPHY2 -- CSI2A / CCP2B on 3630;
CSI2 -- CSIa on 3430
Optional properties
===================
vdd-csiphy1-supply : voltage supply of the CSI-2 PHY 1
vdd-csiphy2-supply : voltage supply of the CSI-2 PHY 2
Endpoint nodes
--------------
lane-polarities : lane polarity (required on CSI-2)
0 -- not inverted; 1 -- inverted
data-lanes : an array of data lanes from 1 to 3. The length can
be either 1 or 2. (required on CSI-2)
clock-lanes : the clock lane (from 1 to 3). (required on CSI-2)
Example
=======
isp@480bc000 {
compatible = "ti,omap3-isp";
reg = <0x480bc000 0x12fc
0x480bd800 0x0600>;
interrupts = <24>;
iommus = <&mmu_isp>;
syscon = <&scm_conf 0x2f0>;
ti,phy-type = <OMAP3ISP_PHY_TYPE_CSIPHY>;
#clock-cells = <1>;
ports {
#address-cells = <1>;
#size-cells = <0>;
};
};

20
Documentation/devicetree/bindings/serial/omap_serial.txt
View File

@ -4,7 +4,27 @@ Required properties:
- compatible : should be "ti,omap2-uart" for OMAP2 controllers - compatible : should be "ti,omap2-uart" for OMAP2 controllers
- compatible : should be "ti,omap3-uart" for OMAP3 controllers - compatible : should be "ti,omap3-uart" for OMAP3 controllers
- compatible : should be "ti,omap4-uart" for OMAP4 controllers - compatible : should be "ti,omap4-uart" for OMAP4 controllers
- reg : address and length of the register space
- interrupts or interrupts-extended : Should contain the uart interrupt
specifier or both the interrupt
controller phandle and interrupt
specifier.
- ti,hwmods : Must be "uart<n>", n being the instance number (1-based) - ti,hwmods : Must be "uart<n>", n being the instance number (1-based)
Optional properties: Optional properties:
- clock-frequency : frequency of the clock input to the UART - clock-frequency : frequency of the clock input to the UART
- dmas : DMA specifier, consisting of a phandle to the DMA controller
node and a DMA channel number.
- dma-names : "rx" for receive channel, "tx" for transmit channel.
Example:
uart4: serial@49042000 {
compatible = "ti,omap3-uart";
reg = <0x49042000 0x400>;
interrupts = <80>;
dmas = <&sdma 81 &sdma 82>;
dma-names = "tx", "rx";
ti,hwmods = "uart4";
clock-frequency = <48000000>;
};

3
Documentation/devicetree/bindings/sound/omap-twl4030.txt
View File

@ -4,9 +4,9 @@ Required properties:
- compatible: "ti,omap-twl4030" - compatible: "ti,omap-twl4030"
- ti,model: Name of the sound card (for example "omap3beagle") - ti,model: Name of the sound card (for example "omap3beagle")
- ti,mcbsp: phandle for the McBSP node - ti,mcbsp: phandle for the McBSP node
- ti,codec: phandle for the twl4030 audio node
Optional properties: Optional properties:
- ti,codec: phandle for the twl4030 audio node
- ti,mcbsp-voice: phandle for the McBSP node connected to the voice port of twl - ti,mcbsp-voice: phandle for the McBSP node connected to the voice port of twl
- ti, jack-det-gpio: Jack detect GPIO - ti, jack-det-gpio: Jack detect GPIO
- ti,audio-routing: List of connections between audio components. - ti,audio-routing: List of connections between audio components.
@ -59,5 +59,4 @@ sound {
ti,model = "omap3beagle"; ti,model = "omap3beagle";
ti,mcbsp = <&mcbsp2>; ti,mcbsp = <&mcbsp2>;
ti,codec = <&twl_audio>;
}; };

1
Documentation/devicetree/bindings/vendor-prefixes.txt
View File

@ -77,6 +77,7 @@ giantplus Giantplus Technology Co., Ltd.
globalscale Globalscale Technologies, Inc. globalscale Globalscale Technologies, Inc.
gmt Global Mixed-mode Technology, Inc. gmt Global Mixed-mode Technology, Inc.
google Google, Inc. google Google, Inc.
grinn Grinn
gumstix Gumstix, Inc. gumstix Gumstix, Inc.
gw Gateworks Corporation gw Gateworks Corporation
hannstar HannStar Display Corporation hannstar HannStar Display Corporation

1
MAINTAINERS
View File

@ -7079,6 +7079,7 @@ OMAP IMAGING SUBSYSTEM (OMAP3 ISP and OMAP4 ISS)
M: Laurent Pinchart <laurent.pinchart@ideasonboard.com> M: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
L: linux-media@vger.kernel.org L: linux-media@vger.kernel.org
S: Maintained S: Maintained
F: Documentation/devicetree/bindings/media/ti,omap3isp.txt
F: drivers/media/platform/omap3isp/ F: drivers/media/platform/omap3isp/
F: drivers/staging/media/omap4iss/ F: drivers/staging/media/omap4iss/

5
arch/arm/boot/dts/Makefile
View File

@ -388,6 +388,8 @@ dtb-$(CONFIG_ARCH_OMAP3) += \
omap3-overo-storm-tobi.dtb \ omap3-overo-storm-tobi.dtb \
omap3-overo-summit.dtb \ omap3-overo-summit.dtb \
omap3-overo-tobi.dtb \ omap3-overo-tobi.dtb \
omap3-pandora-600mhz.dtb \
omap3-pandora-1ghz.dtb \
omap3-sbc-t3517.dtb \ omap3-sbc-t3517.dtb \
omap3-sbc-t3530.dtb \ omap3-sbc-t3530.dtb \
omap3-sbc-t3730.dtb \ omap3-sbc-t3730.dtb \
@ -403,7 +405,8 @@ dtb-$(CONFIG_SOC_AM33XX) += \
am335x-evmsk.dtb \ am335x-evmsk.dtb \
am335x-nano.dtb \ am335x-nano.dtb \
am335x-pepper.dtb \ am335x-pepper.dtb \
am335x-lxm.dtb am335x-lxm.dtb \
am335x-chiliboard.dtb
dtb-$(CONFIG_ARCH_OMAP4) += \ dtb-$(CONFIG_ARCH_OMAP4) += \
omap4-duovero-parlor.dtb \ omap4-duovero-parlor.dtb \
omap4-panda.dtb \ omap4-panda.dtb \

112
arch/arm/boot/dts/am335x-chiliboard.dts Normal file
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@ -0,0 +1,112 @@
/*
* Copyright (C) 2015 Jablotron s.r.o. -- http://www.jablotron.com/
* Author: Rostislav Lisovy <lisovy@jablotron.cz>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
/dts-v1/;
#include "am335x-chilisom.dtsi"
/ {
model = "AM335x Chiliboard";
compatible = "grinn,am335x-chiliboard", "grinn,am335x-chilisom",
"ti,am33xx";
leds {
compatible = "gpio-leds";
pinctrl-names = "default";
pinctrl-0 = <&led_gpio_pins>;
led0 {
label = "led0";
gpios = <&gpio3 7 GPIO_ACTIVE_LOW>;
default-state = "keep";
linux,default-trigger = "heartbeat";
};
led1 {
label = "led1";
gpios = <&gpio3 8 GPIO_ACTIVE_LOW>;
default-state = "keep";
};
};
};
&am33xx_pinmux {
usb1_drvvbus: usb1_drvvbus {
pinctrl-single,pins = <
0x234 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* usb1_drvvbus.usb1_drvvbus */
>;
};
sd_pins: pinmux_sd_card {
pinctrl-single,pins = <
0xf0 (PIN_INPUT | MUX_MODE0) /* mmc0_dat0.mmc0_dat0 */
0xf4 (PIN_INPUT | MUX_MODE0) /* mmc0_dat1.mmc0_dat1 */
0xf8 (PIN_INPUT | MUX_MODE0) /* mmc0_dat2.mmc0_dat2 */
0xfc (PIN_INPUT | MUX_MODE0) /* mmc0_dat3.mmc0_dat3 */
0x100 (PIN_INPUT | MUX_MODE0) /* mmc0_clk.mmc0_clk */
0x104 (PIN_INPUT | MUX_MODE0) /* mmc0_cmd.mmc0_cmd */
0x160 (PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */
>;
};
led_gpio_pins: led_gpio_pins {
pinctrl-single,pins = <
0x1e4 (PIN_OUTPUT | MUX_MODE7) /* emu0.gpio3_7 */
0x1e8 (PIN_OUTPUT | MUX_MODE7) /* emu1.gpio3_8 */
>;
};
};
&ldo4_reg {
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
/* Ethernet */
&cpsw_emac0 {
phy_id = <&davinci_mdio>, <0>;
phy-mode = "rmii";
};
&phy_sel {
rmii-clock-ext;
};
/* USB */
&usb {
status = "okay";
};
&usb_ctrl_mod {
status = "okay";
};
&usb1_phy {
status = "okay";
};
&usb1 {
pinctrl-names = "default";
pinctrl-0 = <&usb1_drvvbus>;
status = "okay";
dr_mode = "host";
};
&cppi41dma {
status = "okay";
};
/* microSD */
&mmc1 {
pinctrl-names = "default";
pinctrl-0 = <&sd_pins>;
vmmc-supply = <&ldo4_reg>;
bus-width = <0x4>;
cd-gpios = <&gpio0 6 GPIO_ACTIVE_HIGH>;
status = "okay";
};

239
arch/arm/boot/dts/am335x-chilisom.dtsi Normal file
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@ -0,0 +1,239 @@
/*
* Copyright (C) 2015 Jablotron s.r.o. -- http://www.jablotron.com/
* Author: Rostislav Lisovy <lisovy@jablotron.cz>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include "am33xx.dtsi"
/ {
model = "Grinn AM335x ChiliSOM";
compatible = "grinn,am335x-chilisom", "ti,am33xx";
cpus {
cpu@0 {
cpu0-supply = <&dcdc2_reg>;
};
};
memory {
device_type = "memory";
reg = <0x80000000 0x20000000>; /* 512 MB */
};
};
&am33xx_pinmux {
pinctrl-names = "default";
i2c0_pins: pinmux_i2c0_pins {
pinctrl-single,pins = <
0x188 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */
0x18c (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */
>;
};
uart0_pins: pinmux_uart0_pins {
pinctrl-single,pins = <
0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */
0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */
>;
};
cpsw_default: cpsw_default {
pinctrl-single,pins = <
/* Slave 1 */
0x10c (PIN_INPUT_PULLDOWN | MUX_MODE1) /* mii1_crs.rmii1_crs */
0x110 (PIN_INPUT_PULLUP | MUX_MODE1) /* mii1_rxerr.rmii1_rxerr */
0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* mii1_txen.rmii1_txen */
0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* mii1_txd1.rmii1_txd1 */
0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* mii1_txd0.rmii1_txd0 */
0x13c (PIN_INPUT_PULLUP | MUX_MODE1) /* mii1_rxd1.rmii1_rxd1 */
0x140 (PIN_INPUT_PULLUP | MUX_MODE1) /* mii1_rxd0.rmii1_rxd0 */
0x144 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* rmii1_ref_clk.rmii_ref_clk */
>;
};
cpsw_sleep: cpsw_sleep {
pinctrl-single,pins = <
/* Slave 1 reset value */
0x10c (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x110 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x144 (PIN_INPUT_PULLDOWN | MUX_MODE7)
>;
};
davinci_mdio_default: davinci_mdio_default {
pinctrl-single,pins = <
/* mdio_data.mdio_data */
0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)
/* mdio_clk.mdio_clk */
0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0)
>;
};
davinci_mdio_sleep: davinci_mdio_sleep {
pinctrl-single,pins = <
/* MDIO reset value */
0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7)
>;
};
nandflash_pins: nandflash_pins {
pinctrl-single,pins = <
0x00 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* gpmc_ad0.gpmc_ad0 */
0x04 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* gpmc_ad1.gpmc_ad1 */
0x08 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* gpmc_ad2.gpmc_ad2 */
0x0c (PIN_INPUT_PULLDOWN | MUX_MODE0) /* gpmc_ad3.gpmc_ad3 */
0x10 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* gpmc_ad4.gpmc_ad4 */
0x14 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* gpmc_ad5.gpmc_ad5 */
0x18 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* gpmc_ad6.gpmc_ad6 */
0x1c (PIN_INPUT_PULLDOWN | MUX_MODE0) /* gpmc_ad7.gpmc_ad7 */
0x70 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_wait0.gpmc_wait0 */
0x7c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* gpmc_csn0.gpmc_csn0 */
0x90 (PIN_OUTPUT_PULLUP | MUX_MODE0) /* gpmc_advn_ale.gpmc_advn_ale */
0x94 (PIN_OUTPUT_PULLUP | MUX_MODE0) /* gpmc_oen_ren.gpmc_oen_ren */
0x98 (PIN_OUTPUT_PULLUP | MUX_MODE0) /* gpmc_wen.gpmc_wen */
0x9c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* gpmc_be0n_cle.gpmc_be0n_cle */
>;
};
};
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins>;
status = "okay";
};
&i2c0 {
pinctrl-names = "default";
pinctrl-0 = <&i2c0_pins>;
status = "okay";
clock-frequency = <400000>;
tps: tps@24 {
reg = <0x24>;
};
};
/include/ "tps65217.dtsi"
&tps {
regulators {
dcdc1_reg: regulator@0 {
regulator-name = "vdds_dpr";
regulator-always-on;
};
dcdc2_reg: regulator@1 {
/* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
regulator-name = "vdd_mpu";
regulator-min-microvolt = <925000>;
regulator-max-microvolt = <1325000>;
regulator-boot-on;
regulator-always-on;
};
dcdc3_reg: regulator@2 {
/* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
regulator-name = "vdd_core";
regulator-min-microvolt = <925000>;
regulator-max-microvolt = <1150000>;
regulator-boot-on;
regulator-always-on;
};
ldo1_reg: regulator@3 {
regulator-name = "vio,vrtc,vdds";
regulator-boot-on;
regulator-always-on;
};
ldo2_reg: regulator@4 {
regulator-name = "vdd_3v3aux";
regulator-boot-on;
regulator-always-on;
};
ldo3_reg: regulator@5 {
regulator-name = "vdd_1v8";
regulator-boot-on;
regulator-always-on;
};
ldo4_reg: regulator@6 {
regulator-name = "vdd_3v3d";
regulator-boot-on;
regulator-always-on;
};
};
};
/* Ethernet MAC */
&mac {
slaves = <1>;
pinctrl-names = "default", "sleep";
pinctrl-0 = <&cpsw_default>;
pinctrl-1 = <&cpsw_sleep>;
status = "okay";
};
&davinci_mdio {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&davinci_mdio_default>;
pinctrl-1 = <&davinci_mdio_sleep>;
status = "okay";
};
/* NAND Flash */
&elm {
status = "okay";
};
&gpmc {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&nandflash_pins>;
ranges = <0 0 0x08000000 0x01000000>; /* CS0 0 @addr 0x08000000, size 0x01000000 */
nand@0,0 {
reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
ti,nand-ecc-opt = "bch8";
ti,elm-id = <&elm>;
nand-bus-width = <8>;
gpmc,device-width = <1>;
gpmc,sync-clk-ps = <0>;
gpmc,cs-on-ns = <0>;
gpmc,cs-rd-off-ns = <44>;
gpmc,cs-wr-off-ns = <44>;
gpmc,adv-on-ns = <6>;
gpmc,adv-rd-off-ns = <34>;
gpmc,adv-wr-off-ns = <44>;
gpmc,we-on-ns = <0>;
gpmc,we-off-ns = <40>;
gpmc,oe-on-ns = <0>;
gpmc,oe-off-ns = <54>;
gpmc,access-ns = <64>;
gpmc,rd-cycle-ns = <82>;
gpmc,wr-cycle-ns = <82>;
gpmc,wait-on-read = "true";
gpmc,wait-on-write = "true";
gpmc,bus-turnaround-ns = <0>;
gpmc,cycle2cycle-delay-ns = <0>;
gpmc,clk-activation-ns = <0>;
gpmc,wait-monitoring-ns = <0>;
gpmc,wr-access-ns = <40>;
gpmc,wr-data-mux-bus-ns = <0>;
};
};

18
arch/arm/boot/dts/am335x-nano.dts
View File

@ -213,7 +213,9 @@
pinctrl-0 = <&i2c0_pins>; pinctrl-0 = <&i2c0_pins>;
gpio@20 { gpio@20 {
compatible = "mcp,mcp23017"; compatible = "microchip,mcp23017";
gpio-controller;
#gpio-cells = <2>;
reg = <0x20>; reg = <0x20>;
}; };
@ -222,7 +224,7 @@
}; };
eeprom@53 { eeprom@53 {
compatible = "mcp,24c02"; compatible = "microchip,24c02";
reg = <0x53>; reg = <0x53>;
pagesize = <8>; pagesize = <8>;
}; };
@ -297,8 +299,8 @@
| |-->0x004FFFFF-> Kernel end | |-->0x004FFFFF-> Kernel end
| |-->0x00500000-> File system start | |-->0x00500000-> File system start
| | | |
| |-->0x014FFFFF-> File system end | |-->0x01FFFFFF-> File system end
| |-->0x01500000-> User data start | |-->0x02000000-> User data start
| | | |
| |-->0x03FFFFFF-> User data end | |-->0x03FFFFFF-> User data end
| |-->0x04000000-> Data storage start | |-->0x04000000-> Data storage start
@ -327,12 +329,12 @@
partition@4 { partition@4 {
label = "rootfs"; label = "rootfs";
reg = <0x00500000 0x01000000>; /* 16MB */ reg = <0x00500000 0x01b00000>; /* 27MB */
}; };
partition@5 { partition@5 {
label = "user"; label = "user";
reg = <0x01500000 0x02b00000>; /* 43MB */ reg = <0x02000000 0x02000000>; /* 32MB */
}; };
partition@6 { partition@6 {
@ -343,7 +345,7 @@
}; };
&mac { &mac {
dual_emac = <1>; dual_emac;
status = "okay"; status = "okay";
}; };
@ -353,11 +355,13 @@
&cpsw_emac0 { &cpsw_emac0 {
phy_id = <&davinci_mdio>, <0>; phy_id = <&davinci_mdio>, <0>;
phy-mode = "mii";
dual_emac_res_vlan = <1>; dual_emac_res_vlan = <1>;
}; };
&cpsw_emac1 { &cpsw_emac1 {
phy_id = <&davinci_mdio>, <1>; phy_id = <&davinci_mdio>, <1>;
phy-mode = "mii";
dual_emac_res_vlan = <2>; dual_emac_res_vlan = <2>;
}; };

2
arch/arm/boot/dts/am4372.dtsi
View File

@ -897,7 +897,7 @@
}; };
hdq: hdq@48347000 { hdq: hdq@48347000 {
compatible = "ti,am43xx-hdq"; compatible = "ti,am4372-hdq";
reg = <0x48347000 0x1000>; reg = <0x48347000 0x1000>;
interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&func_12m_clk>; clocks = <&func_12m_clk>;

22
arch/arm/boot/dts/am437x-idk-evm.dts
View File

@ -133,6 +133,20 @@
>; >;
}; };
i2c2_pins_default: i2c2_pins_default {
pinctrl-single,pins = <
0x1e8 (PIN_INPUT | SLEWCTRL_FAST | MUX_MODE3) /* cam1_data1.i2c2_scl */
0x1ec (PIN_INPUT | SLEWCTRL_FAST | MUX_MODE3) /* cam1_data0.i2c2_sda */
>;
};
i2c2_pins_sleep: i2c2_pins_sleep {
pinctrl-single,pins = <
0x1e8 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x1ec (PIN_INPUT_PULLDOWN | MUX_MODE7)
>;
};
mmc1_pins_default: pinmux_mmc1_pins_default { mmc1_pins_default: pinmux_mmc1_pins_default {
pinctrl-single,pins = < pinctrl-single,pins = <
0x100 (PIN_INPUT | MUX_MODE0) /* mmc0_clk.mmc0_clk */ 0x100 (PIN_INPUT | MUX_MODE0) /* mmc0_clk.mmc0_clk */
@ -263,6 +277,14 @@
}; };
}; };
&i2c2 {
status = "okay";
pinctrl-names = "default", "sleep";
pinctrl-0 = <&i2c2_pins_default>;
pinctrl-1 = <&i2c2_pins_sleep>;
clock-frequency = <100000>;
};
&epwmss0 { &epwmss0 {
status = "okay"; status = "okay";
}; };

9
arch/arm/boot/dts/am57xx-beagle-x15.dts
View File

@ -8,7 +8,6 @@
/dts-v1/; /dts-v1/;
#include "dra74x.dtsi" #include "dra74x.dtsi"
#include <dt-bindings/clk/ti-dra7-atl.h>
#include <dt-bindings/gpio/gpio.h> #include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/interrupt-controller/irq.h>
@ -551,6 +550,14 @@
pinctrl-0 = <&usb1_pins>; pinctrl-0 = <&usb1_pins>;
}; };
&omap_dwc3_1 {
extcon = <&extcon_usb1>;
};
&omap_dwc3_2 {
extcon = <&extcon_usb2>;
};
&usb2 { &usb2 {
dr_mode = "peripheral"; dr_mode = "peripheral";
}; };

14
arch/arm/boot/dts/dm8168-evm.dts
View File

@ -29,22 +29,22 @@
&dm816x_pinmux { &dm816x_pinmux {
mcspi1_pins: pinmux_mcspi1_pins { mcspi1_pins: pinmux_mcspi1_pins {
pinctrl-single,pins = < pinctrl-single,pins = <
DM816X_IOPAD(0x0a94, PIN_INPUT | MUX_MODE0) /* SPI_SCLK */ DM816X_IOPAD(0x0a94, MUX_MODE0) /* SPI_SCLK */
DM816X_IOPAD(0x0a98, PIN_OUTPUT | MUX_MODE0) /* SPI_SCS0 */ DM816X_IOPAD(0x0a98, MUX_MODE0) /* SPI_SCS0 */
DM816X_IOPAD(0x0aa8, PIN_INPUT | MUX_MODE0) /* SPI_D0 */ DM816X_IOPAD(0x0aa8, MUX_MODE0) /* SPI_D0 */
DM816X_IOPAD(0x0aac, PIN_INPUT | MUX_MODE0) /* SPI_D1 */ DM816X_IOPAD(0x0aac, MUX_MODE0) /* SPI_D1 */
>; >;
}; };
usb0_pins: pinmux_usb0_pins { usb0_pins: pinmux_usb0_pins {
pinctrl-single,pins = < pinctrl-single,pins = <
DM816X_IOPAD(0x0d00, MUX_MODE0) /* USB0_DRVVBUS */ DM816X_IOPAD(0x0d04, MUX_MODE0) /* USB0_DRVVBUS */
>; >;
}; };
usb1_pins: pinmux_usb0_pins { usb1_pins: pinmux_usb1_pins {
pinctrl-single,pins = < pinctrl-single,pins = <
DM816X_IOPAD(0x0d04, MUX_MODE0) /* USB1_DRVVBUS */ DM816X_IOPAD(0x0d08, MUX_MODE0) /* USB1_DRVVBUS */
>; >;
}; };
}; };

60
arch/arm/boot/dts/dm816x.dtsi
View File

@ -386,6 +386,29 @@
mentor,num-eps = <16>; mentor,num-eps = <16>;
mentor,ram-bits = <12>; mentor,ram-bits = <12>;
mentor,power = <500>; mentor,power = <500>;
dmas = <&cppi41dma 0 0 &cppi41dma 1 0
&cppi41dma 2 0 &cppi41dma 3 0
&cppi41dma 4 0 &cppi41dma 5 0
&cppi41dma 6 0 &cppi41dma 7 0
&cppi41dma 8 0 &cppi41dma 9 0
&cppi41dma 10 0 &cppi41dma 11 0
&cppi41dma 12 0 &cppi41dma 13 0
&cppi41dma 14 0 &cppi41dma 0 1
&cppi41dma 1 1 &cppi41dma 2 1
&cppi41dma 3 1 &cppi41dma 4 1
&cppi41dma 5 1 &cppi41dma 6 1
&cppi41dma 7 1 &cppi41dma 8 1
&cppi41dma 9 1 &cppi41dma 10 1
&cppi41dma 11 1 &cppi41dma 12 1
&cppi41dma 13 1 &cppi41dma 14 1>;
dma-names =
"rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
"rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
"rx14", "rx15",
"tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
"tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
"tx14", "tx15";
}; };
usb1: usb@47401800 { usb1: usb@47401800 {
@ -403,6 +426,43 @@
mentor,num-eps = <16>; mentor,num-eps = <16>;
mentor,ram-bits = <12>; mentor,ram-bits = <12>;
mentor,power = <500>; mentor,power = <500>;
dmas = <&cppi41dma 15 0 &cppi41dma 16 0
&cppi41dma 17 0 &cppi41dma 18 0
&cppi41dma 19 0 &cppi41dma 20 0
&cppi41dma 21 0 &cppi41dma 22 0
&cppi41dma 23 0 &cppi41dma 24 0
&cppi41dma 25 0 &cppi41dma 26 0
&cppi41dma 27 0 &cppi41dma 28 0
&cppi41dma 29 0 &cppi41dma 15 1
&cppi41dma 16 1 &cppi41dma 17 1
&cppi41dma 18 1 &cppi41dma 19 1
&cppi41dma 20 1 &cppi41dma 21 1
&cppi41dma 22 1 &cppi41dma 23 1
&cppi41dma 24 1 &cppi41dma 25 1
&cppi41dma 26 1 &cppi41dma 27 1
&cppi41dma 28 1 &cppi41dma 29 1>;
dma-names =
"rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
"rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
"rx14", "rx15",
"tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
"tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
"tx14", "tx15";
};
cppi41dma: dma-controller@47402000 {
compatible = "ti,am3359-cppi41";
reg = <0x47400000 0x1000
0x47402000 0x1000
0x47403000 0x1000
0x47404000 0x4000>;
reg-names = "glue", "controller", "scheduler", "queuemgr";
interrupts = <17>;
interrupt-names = "glue";
#dma-cells = <2>;
#dma-channels = <30>;
#dma-requests = <256>;
}; };
}; };

8
arch/arm/boot/dts/dra7-evm.dts
View File

@ -543,6 +543,14 @@
}; };
}; };
&omap_dwc3_1 {
extcon = <&extcon_usb1>;
};
&omap_dwc3_2 {
extcon = <&extcon_usb2>;
};
&usb1 { &usb1 {
dr_mode = "peripheral"; dr_mode = "peripheral";
pinctrl-names = "default"; pinctrl-names = "default";

7
arch/arm/boot/dts/dra7.dtsi
View File

@ -700,7 +700,6 @@
reg = <0x48820000 0x80>; reg = <0x48820000 0x80>;
interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "timer5"; ti,hwmods = "timer5";
ti,timer-dsp;
}; };
timer6: timer@48822000 { timer6: timer@48822000 {
@ -708,8 +707,6 @@
reg = <0x48822000 0x80>; reg = <0x48822000 0x80>;
interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "timer6"; ti,hwmods = "timer6";
ti,timer-dsp;
ti,timer-pwm;
}; };
timer7: timer@48824000 { timer7: timer@48824000 {
@ -717,7 +714,6 @@
reg = <0x48824000 0x80>; reg = <0x48824000 0x80>;
interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "timer7"; ti,hwmods = "timer7";
ti,timer-dsp;
}; };
timer8: timer@48826000 { timer8: timer@48826000 {
@ -725,8 +721,6 @@
reg = <0x48826000 0x80>; reg = <0x48826000 0x80>;
interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "timer8"; ti,hwmods = "timer8";
ti,timer-dsp;
ti,timer-pwm;
}; };
timer9: timer@4803e000 { timer9: timer@4803e000 {
@ -748,7 +742,6 @@
reg = <0x48088000 0x80>; reg = <0x48088000 0x80>;
interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "timer11"; ti,hwmods = "timer11";
ti,timer-pwm;
}; };
timer13: timer@48828000 { timer13: timer@48828000 {

8
arch/arm/boot/dts/dra72-evm.dts
View File

@ -380,6 +380,14 @@
phy-supply = <&ldo4_reg>; phy-supply = <&ldo4_reg>;
}; };
&omap_dwc3_1 {
extcon = <&extcon_usb1>;
};
&omap_dwc3_2 {
extcon = <&extcon_usb2>;
};
&usb1 { &usb1 {
dr_mode = "peripheral"; dr_mode = "peripheral";
pinctrl-names = "default"; pinctrl-names = "default";

8
arch/arm/boot/dts/dra7xx-clocks.dtsi
View File

@ -1421,6 +1421,14 @@
ti,dividers = <1>, <8>; ti,dividers = <1>, <8>;
}; };
clkout2_clk: clkout2_clk {
#clock-cells = <0>;
compatible = "ti,gate-clock";
clocks = <&clkoutmux2_clk_mux>;
ti,bit-shift = <8>;
reg = <0x06b0>;
};
l3init_960m_gfclk: l3init_960m_gfclk { l3init_960m_gfclk: l3init_960m_gfclk {
#clock-cells = <0>; #clock-cells = <0>;
compatible = "ti,gate-clock"; compatible = "ti,gate-clock";

1
arch/arm/boot/dts/omap3-beagle-xm.dts
View File

@ -60,7 +60,6 @@
ti,model = "omap3beagle"; ti,model = "omap3beagle";
ti,mcbsp = <&mcbsp2>; ti,mcbsp = <&mcbsp2>;
ti,codec = <&twl_audio>;
}; };
gpio_keys { gpio_keys {

53
arch/arm/boot/dts/omap3-beagle.dts
View File

@ -71,7 +71,6 @@
ti,model = "omap3beagle"; ti,model = "omap3beagle";
ti,mcbsp = <&mcbsp2>; ti,mcbsp = <&mcbsp2>;
ti,codec = <&twl_audio>;
}; };
gpio_keys { gpio_keys {
@ -379,3 +378,55 @@
}; };
}; };
}; };
&gpmc {
status = "ok";
ranges = <0 0 0x30000000 0x1000000>; /* CS0 space, 16MB */
/* Chip select 0 */
nand@0,0 {
reg = <0 0 4>; /* NAND I/O window, 4 bytes */
interrupts = <20>;
ti,nand-ecc-opt = "ham1";
nand-bus-width = <16>;
#address-cells = <1>;
#size-cells = <1>;
gpmc,device-width = <2>;
gpmc,cs-on-ns = <0>;
gpmc,cs-rd-off-ns = <36>;
gpmc,cs-wr-off-ns = <36>;
gpmc,adv-on-ns = <6>;
gpmc,adv-rd-off-ns = <24>;
gpmc,adv-wr-off-ns = <36>;
gpmc,oe-on-ns = <6>;
gpmc,oe-off-ns = <48>;
gpmc,we-on-ns = <6>;
gpmc,we-off-ns = <30>;
gpmc,rd-cycle-ns = <72>;
gpmc,wr-cycle-ns = <72>;
gpmc,access-ns = <54>;
gpmc,wr-access-ns = <30>;
partition@0 {
label = "X-Loader";
reg = <0 0x80000>;
};
partition@80000 {
label = "U-Boot";
reg = <0x80000 0x1e0000>;
};
partition@1c0000 {
label = "U-Boot Env";
reg = <0x260000 0x20000>;
};
partition@280000 {
label = "Kernel";
reg = <0x280000 0x400000>;
};
partition@780000 {
label = "Filesystem";
reg = <0x680000 0xf980000>;
};
};
};

1
arch/arm/boot/dts/omap3-cm-t3x30.dtsi
View File

@ -16,7 +16,6 @@
ti,model = "cm-t35"; ti,model = "cm-t35";
ti,mcbsp = <&mcbsp2>; ti,mcbsp = <&mcbsp2>;
ti,codec = <&twl_audio>;
}; };
}; };

1
arch/arm/boot/dts/omap3-devkit8000.dts
View File

@ -48,7 +48,6 @@
ti,model = "devkit8000"; ti,model = "devkit8000";
ti,mcbsp = <&mcbsp2>; ti,mcbsp = <&mcbsp2>;
ti,codec = <&twl_audio>;
ti,audio-routing = ti,audio-routing =
"Ext Spk", "PREDRIVEL", "Ext Spk", "PREDRIVEL",
"Ext Spk", "PREDRIVER", "Ext Spk", "PREDRIVER",

1
arch/arm/boot/dts/omap3-gta04.dtsi
View File

@ -46,7 +46,6 @@
ti,model = "gta04"; ti,model = "gta04";
ti,mcbsp = <&mcbsp2>; ti,mcbsp = <&mcbsp2>;
ti,codec = <&twl_audio>;
}; };
spi_lcd { spi_lcd {

1
arch/arm/boot/dts/omap3-igep.dtsi
View File

@ -22,7 +22,6 @@
compatible = "ti,omap-twl4030"; compatible = "ti,omap-twl4030";
ti,model = "igep2"; ti,model = "igep2";
ti,mcbsp = <&mcbsp2>; ti,mcbsp = <&mcbsp2>;
ti,codec = <&twl_audio>;
}; };
vdd33: regulator-vdd33 { vdd33: regulator-vdd33 {

1
arch/arm/boot/dts/omap3-lilly-a83x.dtsi
View File

@ -38,7 +38,6 @@
ti,model = "lilly-a83x"; ti,model = "lilly-a83x";
ti,mcbsp = <&mcbsp2>; ti,mcbsp = <&mcbsp2>;
ti,codec = <&twl_audio>;
}; };
reg_vcc3: vcc3 { reg_vcc3: vcc3 {

37
arch/arm/boot/dts/omap3-n9.dts
View File

@ -16,3 +16,40 @@
model = "Nokia N9"; model = "Nokia N9";
compatible = "nokia,omap3-n9", "ti,omap36xx", "ti,omap3"; compatible = "nokia,omap3-n9", "ti,omap36xx", "ti,omap3";
}; };
&i2c2 {
smia_1: camera@10 {
compatible = "nokia,smia";
reg = <0x10>;
/* No reset gpio */
vana-supply = <&vaux3>;
clocks = <&isp 0>;
clock-frequency = <9600000>;
nokia,nvm-size = <(16 * 64)>;
port {
smia_1_1: endpoint {
link-frequencies = /bits/ 64 <199200000 210000000 499200000>;
clock-lanes = <0>;
data-lanes = <1 2>;
remote-endpoint = <&csi2a_ep>;
};
};
};
};
&isp {
vdd-csiphy1-supply = <&vaux2>;
vdd-csiphy2-supply = <&vaux2>;
ports {
port@2 {
reg = <2>;
csi2a_ep: endpoint {
remote-endpoint = <&smia_1_1>;
clock-lanes = <2>;
data-lanes = <1 3>;
crc = <1>;
lane-polarities = <1 1 1>;
};
};
};
};

16
arch/arm/boot/dts/omap3-n900.dts
View File

@ -9,9 +9,23 @@
/dts-v1/; /dts-v1/;
#include "omap34xx-hs.dtsi" #include "omap34xx.dtsi"
#include <dt-bindings/input/input.h> #include <dt-bindings/input/input.h>
/*
* Default secure signed bootloader (Nokia X-Loader) does not enable L3 firewall
* for omap AES HW crypto support. When linux kernel try to access memory of AES
* blocks then kernel receive "Unhandled fault: external abort on non-linefetch"
* and crash. Until somebody fix omap-aes.c and omap_hwmod_3xxx_data.c code (no
* crash anymore) omap AES support will be disabled for all Nokia N900 devices.
* There is "unofficial" version of bootloader which enables AES in L3 firewall
* but it is not widely used and to prevent kernel crash rather AES is disabled.
* There is also no runtime detection code if AES is disabled in L3 firewall...
*/
&aes {
status = "disabled";
};
/ { / {
model = "Nokia N900"; model = "Nokia N900";
compatible = "nokia,omap3-n900", "ti,omap3430", "ti,omap3"; compatible = "nokia,omap3-n900", "ti,omap3430", "ti,omap3";

2
arch/arm/boot/dts/omap3-n950-n9.dtsi
View File

@ -8,7 +8,7 @@
* published by the Free Software Foundation. * published by the Free Software Foundation.
*/ */
#include "omap36xx-hs.dtsi" #include "omap36xx.dtsi"
/ { / {
cpus { cpus {

37
arch/arm/boot/dts/omap3-n950.dts
View File

@ -16,3 +16,40 @@
model = "Nokia N950"; model = "Nokia N950";
compatible = "nokia,omap3-n950", "ti,omap36xx", "ti,omap3"; compatible = "nokia,omap3-n950", "ti,omap36xx", "ti,omap3";
}; };
&i2c2 {
smia_1: camera@10 {
compatible = "nokia,smia";
reg = <0x10>;
/* No reset gpio */
vana-supply = <&vaux3>;
clocks = <&isp 0>;
clock-frequency = <9600000>;
nokia,nvm-size = <(16 * 64)>;
port {
smia_1_1: endpoint {
link-frequencies = /bits/ 64 <210000000 333600000 398400000>;
clock-lanes = <0>;
data-lanes = <1 2>;
remote-endpoint = <&csi2a_ep>;
};
};
};
};
&isp {
vdd-csiphy1-supply = <&vaux2>;
vdd-csiphy2-supply = <&vaux2>;
ports {
port@2 {
reg = <2>;
csi2a_ep: endpoint {
remote-endpoint = <&smia_1_1>;
clock-lanes = <2>;
data-lanes = <3 1>;
crc = <1>;
lane-polarities = <1 1 1>;
};
};
};
};

1
arch/arm/boot/dts/omap3-overo-base.dtsi
View File

@ -27,7 +27,6 @@
ti,model = "overo"; ti,model = "overo";
ti,mcbsp = <&mcbsp2>; ti,mcbsp = <&mcbsp2>;
ti,codec = <&twl_audio>;
}; };
/* HS USB Port 2 Power */ /* HS USB Port 2 Power */

70
arch/arm/boot/dts/omap3-pandora-1ghz.dts Normal file
View File

@ -0,0 +1,70 @@
/*
* Copyright (C) 2015
* Nikolaus Schaller <hns@goldelico.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
/*
* device tree for OpenPandora 1GHz with DM3730
*/
/dts-v1/;
#include "omap36xx.dtsi"
#include "omap3-pandora-common.dtsi"
/ {
model = "Pandora Handheld Console 1GHz";
compatible = "ti,omap36xx", "ti,omap3";
};
&omap3_pmx_core2 {
pinctrl-names = "default";
pinctrl-0 = <
&hsusb2_2_pins
&control_pins
>;
hsusb2_2_pins: pinmux_hsusb2_2_pins {
pinctrl-single,pins = <
OMAP3630_CORE2_IOPAD(0x25f0, PIN_OUTPUT | MUX_MODE3) /* etk_d10.hsusb2_clk */
OMAP3630_CORE2_IOPAD(0x25f2, PIN_OUTPUT | MUX_MODE3) /* etk_d11.hsusb2_stp */
OMAP3630_CORE2_IOPAD(0x25f4, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d12.hsusb2_dir */
OMAP3630_CORE2_IOPAD(0x25f6, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d13.hsusb2_nxt */
OMAP3630_CORE2_IOPAD(0x25f8, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d14.hsusb2_data0 */
OMAP3630_CORE2_IOPAD(0x25fa, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d15.hsusb2_data1 */
>;
};
mmc3_pins: pinmux_mmc3_pins {
pinctrl-single,pins = <
OMAP3630_CORE2_IOPAD(0x25d8, PIN_INPUT_PULLUP | MUX_MODE2) /* etk_clk.sdmmc3_clk */
OMAP3630_CORE2_IOPAD(0x25da, PIN_INPUT_PULLUP | MUX_MODE2) /* etk_ctl.sdmmc3_cmd */
OMAP3630_CORE2_IOPAD(0x25e2, PIN_INPUT_PULLUP | MUX_MODE2) /* etk_d3.sdmmc3_dat3 */
OMAP3630_CORE2_IOPAD(0x25e4, PIN_INPUT_PULLUP | MUX_MODE2) /* etk_d4.sdmmc3_dat0 */
OMAP3630_CORE2_IOPAD(0x25e6, PIN_INPUT_PULLUP | MUX_MODE2) /* etk_d5.sdmmc3_dat1 */
OMAP3630_CORE2_IOPAD(0x25e8, PIN_INPUT_PULLUP | MUX_MODE2) /* etk_d6.sdmmc3_dat2 */
>;
};
control_pins: pinmux_control_pins {
pinctrl-single,pins = <
OMAP3630_CORE2_IOPAD(0x25dc, PIN_INPUT_PULLDOWN | MUX_MODE4) /* etk_d0.gpio_14 = HP_SHUTDOWN */
OMAP3630_CORE2_IOPAD(0x25de, PIN_OUTPUT | MUX_MODE4) /* etk_d1.gpio_15 = BT_SHUTDOWN */
OMAP3630_CORE2_IOPAD(0x25e0, PIN_OUTPUT | MUX_MODE4) /* etk_d2.gpio_16 = RESET_USB_HOST */
OMAP3630_CORE2_IOPAD(0x25ea, PIN_INPUT | MUX_MODE4) /* etk_d7.gpio_21 = WIFI IRQ */
OMAP3630_CORE2_IOPAD(0x25ec, PIN_OUTPUT | MUX_MODE4) /* etk_d8.gpio_22 = MSECURE */
OMAP3630_CORE2_IOPAD(0x25ee, PIN_OUTPUT | MUX_MODE4) /* etk_d9.gpio_23 = WIFI_POWER */
OMAP3_WKUP_IOPAD(0x2a54, PIN_INPUT | MUX_MODE4) /* reserved.gpio_127 = MMC2_WP */
OMAP3_WKUP_IOPAD(0x2a56, PIN_INPUT | MUX_MODE4) /* reserved.gpio_126 = MMC1_WP */
OMAP3_WKUP_IOPAD(0x2a58, PIN_OUTPUT | MUX_MODE4) /* reserved.gpio_128 = LED_MMC1 */
OMAP3_WKUP_IOPAD(0x2a5a, PIN_OUTPUT | MUX_MODE4) /* reserved.gpio_129 = LED_MMC2 */
>;
};
};

65
arch/arm/boot/dts/omap3-pandora-600mhz.dts Normal file
View File

@ -0,0 +1,65 @@
/*
* Copyright (C) 2015
* Nikolaus Schaller <hns@goldelico.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
/*
* device tree for OpenPandora with OMAP3530
*/
/dts-v1/;
#include "omap34xx.dtsi"
#include "omap3-pandora-common.dtsi"
/ {
model = "Pandora Handheld Console";
compatible = "ti,omap3";
};
&omap3_pmx_core2 {
pinctrl-names = "default";
pinctrl-0 = <
&hsusb2_2_pins
&control_pins
>;
hsusb2_2_pins: pinmux_hsusb2_2_pins {
pinctrl-single,pins = <
OMAP3430_CORE2_IOPAD(0x25f0, PIN_OUTPUT | MUX_MODE3) /* etk_d10.hsusb2_clk */
OMAP3430_CORE2_IOPAD(0x25f2, PIN_OUTPUT | MUX_MODE3) /* etk_d11.hsusb2_stp */
OMAP3430_CORE2_IOPAD(0x25f4, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d12.hsusb2_dir */
OMAP3430_CORE2_IOPAD(0x25f6, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d13.hsusb2_nxt */
OMAP3430_CORE2_IOPAD(0x25f8, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d14.hsusb2_data0 */
OMAP3430_CORE2_IOPAD(0x25fa, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d15.hsusb2_data1 */
>;
};
mmc3_pins: pinmux_mmc3_pins {
pinctrl-single,pins = <
OMAP3430_CORE2_IOPAD(0x25d8, PIN_INPUT_PULLUP | MUX_MODE2) /* etk_clk.sdmmc3_clk */
OMAP3430_CORE2_IOPAD(0x25da, PIN_INPUT_PULLUP | MUX_MODE2) /* etk_ctl.sdmmc3_cmd */
OMAP3430_CORE2_IOPAD(0x25e2, PIN_INPUT_PULLUP | MUX_MODE2) /* etk_d3.sdmmc3_dat3 */
OMAP3430_CORE2_IOPAD(0x25e4, PIN_INPUT_PULLUP | MUX_MODE2) /* etk_d4.sdmmc3_dat0 */
OMAP3430_CORE2_IOPAD(0x25e6, PIN_INPUT_PULLUP | MUX_MODE2) /* etk_d5.sdmmc3_dat1 */
OMAP3430_CORE2_IOPAD(0x25e8, PIN_INPUT_PULLUP | MUX_MODE2) /* etk_d6.sdmmc3_dat2 */
>;
};
control_pins: pinmux_control_pins {
pinctrl-single,pins = <
OMAP3430_CORE2_IOPAD(0x25dc, PIN_INPUT_PULLDOWN | MUX_MODE4) /* etk_d0.gpio_14 = HP_SHUTDOWN */
OMAP3430_CORE2_IOPAD(0x25de, PIN_OUTPUT | MUX_MODE4) /* etk_d1.gpio_15 = BT_SHUTDOWN */
OMAP3430_CORE2_IOPAD(0x25e0, PIN_OUTPUT | MUX_MODE4) /* etk_d2.gpio_16 = RESET_USB_HOST */
OMAP3430_CORE2_IOPAD(0x25ea, PIN_INPUT | MUX_MODE4) /* etk_d7.gpio_21 = WIFI IRQ */
OMAP3430_CORE2_IOPAD(0x25ec, PIN_OUTPUT | MUX_MODE4) /* etk_d8.gpio_22 = MSECURE */
OMAP3430_CORE2_IOPAD(0x25ee, PIN_OUTPUT | MUX_MODE4) /* etk_d9.gpio_23 = WIFI_POWER */
>;
};
};

640
arch/arm/boot/dts/omap3-pandora-common.dtsi Normal file
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/*
* Copyright (C) 2015
* Nikolaus Schaller <hns@goldelico.com>
*
* Common device tree include for OpenPandora devices.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include <dt-bindings/input/input.h>
/ {
cpus {
cpu@0 {
cpu0-supply = <&vcc>;
};
};
memory {
device_type = "memory";
reg = <0x80000000 0x20000000>; /* 512 MB */
};
aliases {
display0 = &lcd;
};
tv: connector@1 {
compatible = "connector-analog-tv";
label = "tv";
port {
tv_connector_in: endpoint {
remote-endpoint = <&venc_out>;
};
};
};
gpio-leds {
compatible = "gpio-leds";
pinctrl-names = "default";
pinctrl-0 = <&led_pins>;
led@1 {
label = "pandora::sd1";
gpios = <&gpio5 0 GPIO_ACTIVE_HIGH>; /* GPIO_128 */
linux,default-trigger = "mmc0";
default-state = "off";
};
led@2 {
label = "pandora::sd2";
gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>; /* GPIO_129 */
linux,default-trigger = "mmc1";
default-state = "off";
};
led@3 {
label = "pandora::bluetooth";
gpios = <&gpio5 30 GPIO_ACTIVE_HIGH>; /* GPIO_158 */
linux,default-trigger = "heartbeat";
default-state = "off";
};
led@4 {
label = "pandora::wifi";
gpios = <&gpio5 31 GPIO_ACTIVE_HIGH>; /* GPIO_159 */
linux,default-trigger = "mmc2";
default-state = "off";
};
};
gpio-keys {
compatible = "gpio-keys";
pinctrl-names = "default";
pinctrl-0 = <&button_pins>;
up-button {
label = "up";
linux,code = <KEY_UP>;
gpios = <&gpio4 14 GPIO_ACTIVE_LOW>; /* GPIO_110 */
gpio-key,wakeup;
};
down-button {
label = "down";
linux,code = <KEY_DOWN>;
gpios = <&gpio4 7 GPIO_ACTIVE_LOW>; /* GPIO_103 */
gpio-key,wakeup;
};
left-button {
label = "left";
linux,code = <KEY_LEFT>;
gpios = <&gpio4 0 GPIO_ACTIVE_LOW>; /* GPIO_96 */
gpio-key,wakeup;
};
right-button {
label = "right";
linux,code = <KEY_RIGHT>;
gpios = <&gpio4 2 GPIO_ACTIVE_LOW>; /* GPIO_98 */
gpio-key,wakeup;
};
pageup-button {
label = "game 1";
linux,code = <KEY_PAGEUP>;
gpios = <&gpio4 13 GPIO_ACTIVE_LOW>; /* GPIO_109 */
gpio-key,wakeup;
};
pagedown-button {
label = "game 3";
linux,code = <KEY_PAGEDOWN>;
gpios = <&gpio4 10 GPIO_ACTIVE_LOW>; /* GPIO_106 */
gpio-key,wakeup;
};
home-button {
label = "game 4";
linux,code = <KEY_HOME>;
gpios = <&gpio4 5 GPIO_ACTIVE_LOW>; /* GPIO_101 */
gpio-key,wakeup;
};
end-button {
label = "game 2";
linux,code = <KEY_END>;
gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; /* GPIO_111 */
gpio-key,wakeup;
};
right-shift {
label = "l";
linux,code = <KEY_RIGHTSHIFT>;
gpios = <&gpio4 6 GPIO_ACTIVE_LOW>; /* GPIO_102 */
gpio-key,wakeup;
};
kp-plus {
label = "l2";
linux,code = <KEY_KPPLUS>;
gpios = <&gpio4 1 GPIO_ACTIVE_LOW>; /* GPIO_97 */
gpio-key,wakeup;
};
right-ctrl {
label = "r";
linux,code = <KEY_RIGHTCTRL>;
gpios = <&gpio4 9 GPIO_ACTIVE_LOW>; /* GPIO_105 */
gpio-key,wakeup;
};
kp-minus {
label = "r2";
linux,code = <KEY_KPMINUS>;
gpios = <&gpio4 11 GPIO_ACTIVE_LOW>; /* GPIO_107 */
gpio-key,wakeup;
};
left-ctrl {
label = "ctrl";
linux,code = <KEY_LEFTCTRL>;
gpios = <&gpio4 8 GPIO_ACTIVE_LOW>; /* GPIO_104 */
gpio-key,wakeup;
};
menu {
label = "menu";
linux,code = <KEY_MENU>;
gpios = <&gpio4 3 GPIO_ACTIVE_LOW>; /* GPIO_99 */
gpio-key,wakeup;
};
hold {
label = "hold";
linux,code = <KEY_COFFEE>;
gpios = <&gpio6 16 GPIO_ACTIVE_LOW>; /* GPIO_176 */
gpio-key,wakeup;
};
left-alt {
label = "alt";
linux,code = <KEY_LEFTALT>;
gpios = <&gpio4 4 GPIO_ACTIVE_HIGH>; /* GPIO_100 */
gpio-key,wakeup;
};
lid {
label = "lid";
linux,code = <0x00>; /* SW_LID lid shut */
linux,input-type = <0x05>; /* EV_SW */
gpios = <&gpio4 12 GPIO_ACTIVE_HIGH>; /* GPIO_108 */
};
};
};
&omap3_pmx_core {
mmc1_pins: pinmux_mmc1_pins {
pinctrl-single,pins = <
OMAP3_CORE1_IOPAD(0x2144, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_clk.sdmmc1_clk */
OMAP3_CORE1_IOPAD(0x2146, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_cmd.sdmmc1_cmd */
OMAP3_CORE1_IOPAD(0x2148, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat0.sdmmc1_dat0 */
OMAP3_CORE1_IOPAD(0x214a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat1.sdmmc1_dat1 */
OMAP3_CORE1_IOPAD(0x214c, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat2.sdmmc1_dat2 */
OMAP3_CORE1_IOPAD(0x214e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat3.sdmmc1_dat3 */
>;
};
mmc2_pins: pinmux_mmc2_pins {
pinctrl-single,pins = <
OMAP3_CORE1_IOPAD(0x2158, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_clk.sdmmc2_clk */
OMAP3_CORE1_IOPAD(0x215a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_cmd.sdmmc2_cmd */
OMAP3_CORE1_IOPAD(0x215c, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat0.sdmmc2_dat0 */
OMAP3_CORE1_IOPAD(0x215e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat1.sdmmc2_dat1 */
OMAP3_CORE1_IOPAD(0x2160, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat2.sdmmc2_dat2 */
OMAP3_CORE1_IOPAD(0x2162, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat3.sdmmc2_dat3 */
OMAP3_CORE1_IOPAD(0x2164, PIN_OUTPUT_PULLUP | MUX_MODE1) /* sdmmc2_dat4.sdmmc2_dirdat0 */
OMAP3_CORE1_IOPAD(0x2166, PIN_OUTPUT_PULLUP | MUX_MODE1) /* sdmmc2_dat5.sdmmc2_dirdat1 */
OMAP3_CORE1_IOPAD(0x2168, PIN_OUTPUT_PULLUP | MUX_MODE1) /* sdmmc2_dat6.sdmmc2_dircmd */
OMAP3_CORE1_IOPAD(0x216a, PIN_INPUT_PULLUP | MUX_MODE1) /* sdmmc2_dat7.sdmmc2_clkin */
>;
};
dss_dpi_pins: pinmux_dss_dpi_pins {
pinctrl-single,pins = <
OMAP3_CORE1_IOPAD(0x20d4, PIN_OUTPUT | MUX_MODE0) /* dss_pclk.dss_pclk */
OMAP3_CORE1_IOPAD(0x20d6, PIN_OUTPUT | MUX_MODE0) /* dss_hsync.dss_hsync */
OMAP3_CORE1_IOPAD(0x20d8, PIN_OUTPUT | MUX_MODE0) /* dss_vsync.dss_vsync */
OMAP3_CORE1_IOPAD(0x20da, PIN_OUTPUT | MUX_MODE0) /* dss_acbias.dss_acbias */
OMAP3_CORE1_IOPAD(0x20dc, PIN_OUTPUT | MUX_MODE0) /* dss_data0.dss_data0 */
OMAP3_CORE1_IOPAD(0x20de, PIN_OUTPUT | MUX_MODE0) /* dss_data1.dss_data1 */
OMAP3_CORE1_IOPAD(0x20e0, PIN_OUTPUT | MUX_MODE0) /* dss_data2.dss_data2 */
OMAP3_CORE1_IOPAD(0x20e2, PIN_OUTPUT | MUX_MODE0) /* dss_data3.dss_data3 */
OMAP3_CORE1_IOPAD(0x20e4, PIN_OUTPUT | MUX_MODE0) /* dss_data4.dss_data4 */
OMAP3_CORE1_IOPAD(0x20e6, PIN_OUTPUT | MUX_MODE0) /* dss_data5.dss_data5 */
OMAP3_CORE1_IOPAD(0x20e8, PIN_OUTPUT | MUX_MODE0) /* dss_data6.dss_data6 */
OMAP3_CORE1_IOPAD(0x20ea, PIN_OUTPUT | MUX_MODE0) /* dss_data7.dss_data7 */
OMAP3_CORE1_IOPAD(0x20ec, PIN_OUTPUT | MUX_MODE0) /* dss_data8.dss_data8 */
OMAP3_CORE1_IOPAD(0x20ee, PIN_OUTPUT | MUX_MODE0) /* dss_data9.dss_data9 */
OMAP3_CORE1_IOPAD(0x20f0, PIN_OUTPUT | MUX_MODE0) /* dss_data10.dss_data10 */
OMAP3_CORE1_IOPAD(0x20f2, PIN_OUTPUT | MUX_MODE0) /* dss_data11.dss_data11 */
OMAP3_CORE1_IOPAD(0x20f4, PIN_OUTPUT | MUX_MODE0) /* dss_data12.dss_data12 */
OMAP3_CORE1_IOPAD(0x20f6, PIN_OUTPUT | MUX_MODE0) /* dss_data13.dss_data13 */
OMAP3_CORE1_IOPAD(0x20f8, PIN_OUTPUT | MUX_MODE0) /* dss_data14.dss_data14 */
OMAP3_CORE1_IOPAD(0x20fa, PIN_OUTPUT | MUX_MODE0) /* dss_data15.dss_data15 */
OMAP3_CORE1_IOPAD(0x20fc, PIN_OUTPUT | MUX_MODE0) /* dss_data16.dss_data16 */
OMAP3_CORE1_IOPAD(0x20fe, PIN_OUTPUT | MUX_MODE0) /* dss_data17.dss_data17 */
OMAP3_CORE1_IOPAD(0x2100, PIN_OUTPUT | MUX_MODE0) /* dss_data18.dss_data18 */
OMAP3_CORE1_IOPAD(0x2102, PIN_OUTPUT | MUX_MODE0) /* dss_data19.dss_data19 */
OMAP3_CORE1_IOPAD(0x2104, PIN_OUTPUT | MUX_MODE0) /* dss_data20.dss_data20 */
OMAP3_CORE1_IOPAD(0x2106, PIN_OUTPUT | MUX_MODE0) /* dss_data21.dss_data21 */
OMAP3_CORE1_IOPAD(0x2108, PIN_OUTPUT | MUX_MODE0) /* dss_data22.dss_data22 */
OMAP3_CORE1_IOPAD(0x210a, PIN_OUTPUT | MUX_MODE0) /* dss_data23.dss_data23 */
OMAP3_CORE1_IOPAD(0x218e, PIN_OUTPUT | MUX_MODE4) /* GPIO_157 = lcd reset */
>;
};
uart3_pins: pinmux_uart3_pins {
pinctrl-single,pins = <
OMAP3_CORE1_IOPAD(0x219e, PIN_INPUT | PIN_OFF_WAKEUPENABLE | MUX_MODE0) /* uart3_rx_irrx.uart3_rx_irrx */
OMAP3_CORE1_IOPAD(0x21a0, PIN_OUTPUT | MUX_MODE0) /* uart3_tx_irtx.uart3_tx_irtx */
>;
};
led_pins: pinmux_leds_pins {
pinctrl-single,pins = <
OMAP3_CORE1_IOPAD(0x2154, PIN_OUTPUT | MUX_MODE4) /* GPIO_128 */
OMAP3_CORE1_IOPAD(0x2156, PIN_OUTPUT | MUX_MODE4) /* GPIO_129 */
OMAP3_CORE1_IOPAD(0x2190, PIN_OUTPUT | MUX_MODE4) /* GPIO_158 */
OMAP3_CORE1_IOPAD(0x2192, PIN_OUTPUT | MUX_MODE4) /* GPIO_159 */
>;
};
button_pins: pinmux_button_pins {
pinctrl-single,pins = <
OMAP3_CORE1_IOPAD(0x2110, PIN_INPUT | MUX_MODE4) /* GPIO_96 */
OMAP3_CORE1_IOPAD(0x2112, PIN_INPUT | MUX_MODE4) /* GPIO_97 */
OMAP3_CORE1_IOPAD(0x2114, PIN_INPUT | MUX_MODE4) /* GPIO_98 */
OMAP3_CORE1_IOPAD(0x2116, PIN_INPUT | MUX_MODE4) /* GPIO_99 */
OMAP3_CORE1_IOPAD(0x2118, PIN_INPUT | MUX_MODE4) /* GPIO_100 */
OMAP3_CORE1_IOPAD(0x211a, PIN_INPUT | MUX_MODE4) /* GPIO_101 */
OMAP3_CORE1_IOPAD(0x211c, PIN_INPUT | MUX_MODE4) /* GPIO_102 */
OMAP3_CORE1_IOPAD(0x211e, PIN_INPUT | MUX_MODE4) /* GPIO_103 */
OMAP3_CORE1_IOPAD(0x2120, PIN_INPUT | MUX_MODE4) /* GPIO_104 */
OMAP3_CORE1_IOPAD(0x2122, PIN_INPUT | MUX_MODE4) /* GPIO_105 */
OMAP3_CORE1_IOPAD(0x2124, PIN_INPUT | MUX_MODE4) /* GPIO_106 */
OMAP3_CORE1_IOPAD(0x2126, PIN_INPUT | MUX_MODE4) /* GPIO_107 */
OMAP3_CORE1_IOPAD(0x2128, PIN_INPUT | MUX_MODE4) /* GPIO_108 */
OMAP3_CORE1_IOPAD(0x212a, PIN_INPUT | MUX_MODE4) /* GPIO_109 */
OMAP3_CORE1_IOPAD(0x212c, PIN_INPUT | MUX_MODE4) /* GPIO_110 */
OMAP3_CORE1_IOPAD(0x212e, PIN_INPUT | MUX_MODE4) /* GPIO_111 */
OMAP3_CORE1_IOPAD(0x21d2, PIN_INPUT | MUX_MODE4) /* GPIO_176 */
>;
};
penirq_pins: pinmux_penirq_pins {
pinctrl-single,pins = <
/* here we could enable to wakeup the cpu from suspend by a pen touch */
OMAP3_CORE1_IOPAD(0x210c, PIN_INPUT | MUX_MODE4) /* GPIO_94 */
>;
};
};
&omap3_pmx_core2 {
/* define in CPU specific file that includes this one
* use either OMAP3430_CORE2_IOPAD() or OMAP3630_CORE2_IOPAD()
*/
};
&i2c1 {
clock-frequency = <2600000>;
twl: twl@48 {
reg = <0x48>;
interrupts = <7>; /* SYS_NIRQ cascaded to intc */
interrupt-parent = <&intc>;
twl_power: power {
compatible = "ti,twl4030-power-reset";
ti,use_poweroff;
};
twl_audio: audio {
compatible = "ti,twl4030-audio";
codec {
ti,ramp_delay_value = <3>;
};
};
};
};
#include "twl4030.dtsi"
#include "twl4030_omap3.dtsi"
&twl_keypad {
keypad,num-rows = <8>;
keypad,num-columns = <6>;
linux,keymap = <
MATRIX_KEY(0, 0, KEY_9)
MATRIX_KEY(0, 1, KEY_8)
MATRIX_KEY(0, 2, KEY_I)
MATRIX_KEY(0, 3, KEY_J)
MATRIX_KEY(0, 4, KEY_N)
MATRIX_KEY(0, 5, KEY_M)
MATRIX_KEY(1, 0, KEY_0)
MATRIX_KEY(1, 1, KEY_7)
MATRIX_KEY(1, 2, KEY_U)
MATRIX_KEY(1, 3, KEY_H)
MATRIX_KEY(1, 4, KEY_B)
MATRIX_KEY(1, 5, KEY_SPACE)
MATRIX_KEY(2, 0, KEY_BACKSPACE)
MATRIX_KEY(2, 1, KEY_6)
MATRIX_KEY(2, 2, KEY_Y)
MATRIX_KEY(2, 3, KEY_G)
MATRIX_KEY(2, 4, KEY_V)
MATRIX_KEY(2, 5, KEY_FN)
MATRIX_KEY(3, 0, KEY_O)
MATRIX_KEY(3, 1, KEY_5)
MATRIX_KEY(3, 2, KEY_T)
MATRIX_KEY(3, 3, KEY_F)
MATRIX_KEY(3, 4, KEY_C)
MATRIX_KEY(4, 0, KEY_P)
MATRIX_KEY(4, 1, KEY_4)
MATRIX_KEY(4, 2, KEY_R)
MATRIX_KEY(4, 3, KEY_D)
MATRIX_KEY(4, 4, KEY_X)
MATRIX_KEY(5, 0, KEY_K)
MATRIX_KEY(5, 1, KEY_3)
MATRIX_KEY(5, 2, KEY_E)
MATRIX_KEY(5, 3, KEY_S)
MATRIX_KEY(5, 4, KEY_Z)
MATRIX_KEY(6, 0, KEY_L)
MATRIX_KEY(6, 1, KEY_2)
MATRIX_KEY(6, 2, KEY_W)
MATRIX_KEY(6, 3, KEY_A)
MATRIX_KEY(6, 4, KEY_RIGHTBRACE)
MATRIX_KEY(7, 0, KEY_ENTER)
MATRIX_KEY(7, 1, KEY_1)
MATRIX_KEY(7, 2, KEY_Q)
MATRIX_KEY(7, 3, KEY_LEFTSHIFT)
MATRIX_KEY(7, 4, KEY_LEFTBRACE )
>;
};
/* backup battery charger */
&charger {
ti,bb-uvolt = <3200000>;
ti,bb-uamp = <150>;
};
/* MMC2 */
&vmmc2 {
regulator-min-microvolt = <1850000>;
regulator-max-microvolt = <3150000>;
};
/* LCD */
&vaux1 {
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3000000>;
};
/* USB Host PHY */
&vaux2 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
/* available on expansion connector */
&vaux3 {
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
};
/* ADS7846 and nubs */
&vaux4 {
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
};
/* power audio DAC and LID sensor */
&vsim {
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
regulator-always-on;
};
&i2c2 {
clock-frequency = <100000>;
/* no clients so we should disable clock */
};
&i2c3 {
clock-frequency = <100000>;
bq27500@55 {
compatible = "ti,bq27500";
reg = <0x55>;
};
};
&usb_otg_hs {
interface-type = <0>;
usb-phy = <&usb2_phy>;
phys = <&usb2_phy>;
phy-names = "usb2-phy";
mode = <3>;
power = <50>;
};
&mmc1 {
pinctrl-names = "default";
pinctrl-0 = <&mmc1_pins>;
vmmc-supply = <&vmmc1>;
bus-width = <4>;
cd-gpios = <&twl_gpio 0 GPIO_ACTIVE_LOW>;
wp-gpios = <&gpio4 30 GPIO_ACTIVE_LOW>; /* GPIO_126 */
};
&mmc2 {
pinctrl-names = "default";
pinctrl-0 = <&mmc2_pins>;
vmmc-supply = <&vmmc2>;
bus-width = <4>;
cd-gpios = <&twl_gpio 1 GPIO_ACTIVE_HIGH>;
wp-gpios = <&gpio4 31 GPIO_ACTIVE_LOW>; /* GPIO_127 */
};
/* bluetooth*/
&uart1 {
};
/* spare (expansion connector) */
&uart2 {
};
/* console (expansion connector) */
&uart3 {
pinctrl-names = "default";
pinctrl-0 = <&uart3_pins>;
interrupts-extended = <&intc 74 &omap3_pmx_core OMAP3_UART3_RX>;
};
&usbhshost {
port2-mode = "ehci-phy";
};
&gpmc {
ranges = <0 0 0x30000000 0x1000000>; /* CS0: 16MB for NAND */
nand@0,0 {
reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
nand-bus-width = <16>;
ti,nand-ecc-opt = "sw";
gpmc,sync-clk-ps = <0>;
gpmc,cs-on-ns = <0>;
gpmc,cs-rd-off-ns = <44>;
gpmc,cs-wr-off-ns = <44>;
gpmc,adv-on-ns = <6>;
gpmc,adv-rd-off-ns = <34>;
gpmc,adv-wr-off-ns = <44>;
gpmc,we-off-ns = <40>;
gpmc,oe-off-ns = <54>;
gpmc,access-ns = <64>;
gpmc,rd-cycle-ns = <82>;
gpmc,wr-cycle-ns = <82>;
gpmc,wr-access-ns = <40>;
gpmc,wr-data-mux-bus-ns = <0>;
gpmc,device-width = <2>;
#address-cells = <1>;
#size-cells = <1>;
/* u-boot uses mtdparts=nand:512k(xloader),1920k(uboot),128k(uboot-env),10m(boot),-(rootfs) */
x-loader@0 {
label = "xloader";
reg = <0 0x80000>;
};
bootloaders@80000 {
label = "uboot";
reg = <0x80000 0x1e0000>;
};
bootloaders_env@260000 {
label = "uboot-env";
reg = <0x260000 0x20000>;
};
kernel@280000 {
label = "boot";
reg = <0x280000 0xa00000>;
};
filesystem@680000 {
label = "rootfs";
reg = <0xc80000 0>; /* 0 = MTDPART_SIZ_FULL */
};
};
};
&mcspi1 {
tsc2046@0 {
reg = <0>; /* CS0 */
compatible = "ti,tsc2046";
spi-max-frequency = <1000000>;
pinctrl-names = "default";
pinctrl-0 = <&penirq_pins>;
interrupt-parent = <&gpio3>;
interrupts = <30 0>; /* GPIO_94 */
pendown-gpio = <&gpio3 30 0>;
vcc-supply = <&vaux4>;
ti,x-min = /bits/ 16 <0>;
ti,x-max = /bits/ 16 <8000>;
ti,y-min = /bits/ 16 <0>;
ti,y-max = /bits/ 16 <4800>;
ti,x-plate-ohms = /bits/ 16 <40>;
ti,pressure-max = /bits/ 16 <255>;
linux,wakeup;
};
lcd: lcd@1 {
reg = <1>; /* CS1 */
compatible = "omapdss,tpo,td043mtea1";
spi-max-frequency = <100000>;
spi-cpol;
spi-cpha;
label = "lcd";
reset-gpios = <&gpio5 29 GPIO_ACTIVE_LOW>; /* GPIO_157 */
vcc-supply = <&vaux1>;
port {
lcd_in: endpoint {
remote-endpoint = <&dpi_out>;
};
};
};
};
/* n/a - used as GPIOs */
&mcbsp1 {
};
/* audio DAC */
&mcbsp2 {
};
/* bluetooth */
&mcbsp3 {
};
/* to twl4030*/
&mcbsp4 {
};
&venc {
status = "ok";
vdda-supply = <&vdac>;
port {
venc_out: endpoint {
remote-endpoint = <&tv_connector_in>;
ti,channels = <2>;
};
};
};
&dss {
pinctrl-names = "default";
pinctrl-0 = < &dss_dpi_pins >;
status = "ok";
vdds_dsi-supply = <&vpll2>;
port {
dpi_out: endpoint {
remote-endpoint = <&lcd_in>;
data-lines = <24>;
};
};
};

12
arch/arm/boot/dts/omap3-tao3530.dtsi
View File

@ -8,7 +8,16 @@
*/ */
/dts-v1/; /dts-v1/;
#include "omap34xx-hs.dtsi" #include "omap34xx.dtsi"
/* Secure omaps have some devices inaccessible depending on the firmware */
&aes {
status = "disabled";
};
&sham {
status = "disabled";
};
/ { / {
cpus { cpus {
@ -45,7 +54,6 @@
/* McBSP2 is used for onboard sound, same as on beagle */ /* McBSP2 is used for onboard sound, same as on beagle */
ti,mcbsp = <&mcbsp2>; ti,mcbsp = <&mcbsp2>;
ti,codec = <&twl_audio>;
}; };
/* Regulator to enable/switch the vcc of the Wifi module */ /* Regulator to enable/switch the vcc of the Wifi module */

16
arch/arm/boot/dts/omap34xx-hs.dtsi
View File

@ -1,16 +0,0 @@
/* Disabled modules for secure omaps */
#include "omap34xx.dtsi"
/* Secure omaps have some devices inaccessible depending on the firmware */
&aes {
status = "disabled";
};
&sham {
status = "disabled";
};
&timer12 {
status = "disabled";
};

17
arch/arm/boot/dts/omap34xx.dtsi
View File

@ -8,6 +8,8 @@
* kind, whether express or implied. * kind, whether express or implied.
*/ */
#include <dt-bindings/media/omap3-isp.h>
#include "omap3.dtsi" #include "omap3.dtsi"
/ { / {
@ -37,6 +39,21 @@
pinctrl-single,register-width = <16>; pinctrl-single,register-width = <16>;
pinctrl-single,function-mask = <0xff1f>; pinctrl-single,function-mask = <0xff1f>;
}; };
isp: isp@480bc000 {
compatible = "ti,omap3-isp";
reg = <0x480bc000 0x12fc
0x480bd800 0x017c>;
interrupts = <24>;
iommus = <&mmu_isp>;
syscon = <&scm_conf 0xdc>;
ti,phy-type = <OMAP3ISP_PHY_TYPE_COMPLEX_IO>;
#clock-cells = <1>;
ports {
#address-cells = <1>;
#size-cells = <0>;
};
};
}; };
}; };

16
arch/arm/boot/dts/omap36xx-hs.dtsi
View File

@ -1,16 +0,0 @@
/* Disabled modules for secure omaps */
#include "omap36xx.dtsi"
/* Secure omaps have some devices inaccessible depending on the firmware */
&aes {
status = "disabled";
};
&sham {
status = "disabled";
};
&timer12 {
status = "disabled";
};

17
arch/arm/boot/dts/omap36xx.dtsi
View File

@ -8,6 +8,8 @@
* kind, whether express or implied. * kind, whether express or implied.
*/ */
#include <dt-bindings/media/omap3-isp.h>
#include "omap3.dtsi" #include "omap3.dtsi"
/ { / {
@ -69,6 +71,21 @@
pinctrl-single,register-width = <16>; pinctrl-single,register-width = <16>;
pinctrl-single,function-mask = <0xff1f>; pinctrl-single,function-mask = <0xff1f>;
}; };
isp: isp@480bc000 {
compatible = "ti,omap3-isp";
reg = <0x480bc000 0x12fc
0x480bd800 0x0600>;
interrupts = <24>;
iommus = <&mmu_isp>;
syscon = <&scm_conf 0x2f0>;
ti,phy-type = <OMAP3ISP_PHY_TYPE_CSIPHY>;
#clock-cells = <1>;
ports {
#address-cells = <1>;
#size-cells = <0>;
};
};
}; };
}; };

22
include/dt-bindings/media/omap3-isp.h Normal file
View File

@ -0,0 +1,22 @@
/*
* include/dt-bindings/media/omap3-isp.h
*
* Copyright (C) 2015 Sakari Ailus
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* General Public License for more details.
*/
#ifndef __DT_BINDINGS_OMAP3_ISP_H__
#define __DT_BINDINGS_OMAP3_ISP_H__
#define OMAP3ISP_PHY_TYPE_COMPLEX_IO 0
#define OMAP3ISP_PHY_TYPE_CSIPHY 1
#endif /* __DT_BINDINGS_OMAP3_ISP_H__ */